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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-LE3; RUN: llc -mtriple=thumbebv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-BE4 5declare arm_aapcs_vfpcc <2 x i64> @ext_i64(<2 x i64> %c)6declare arm_aapcs_vfpcc <4 x i32> @ext_i32(<4 x i32> %c)7declare arm_aapcs_vfpcc <8 x i16> @ext_i16(<8 x i16> %c)8declare arm_aapcs_vfpcc <16 x i8> @ext_i8(<16 x i8> %c)9 10define arm_aapcs_vfpcc <2 x i64> @shuffle1_v2i64(<2 x i64> %src, <2 x i64> %a) {11; CHECK-LE-LABEL: shuffle1_v2i64:12; CHECK-LE: @ %bb.0: @ %entry13; CHECK-LE-NEXT: .save {r7, lr}14; CHECK-LE-NEXT: push {r7, lr}15; CHECK-LE-NEXT: .vsave {d8, d9}16; CHECK-LE-NEXT: vpush {d8, d9}17; CHECK-LE-NEXT: .pad #818; CHECK-LE-NEXT: sub sp, #819; CHECK-LE-NEXT: vmov r0, r1, d020; CHECK-LE-NEXT: vmov q4, q121; CHECK-LE-NEXT: orrs r0, r122; CHECK-LE-NEXT: mov.w r1, #023; CHECK-LE-NEXT: csetm r0, eq24; CHECK-LE-NEXT: bfi r1, r0, #0, #825; CHECK-LE-NEXT: vmov r0, r2, d126; CHECK-LE-NEXT: vmov.i32 q0, #0x027; CHECK-LE-NEXT: orrs r0, r228; CHECK-LE-NEXT: csetm r0, eq29; CHECK-LE-NEXT: bfi r1, r0, #8, #830; CHECK-LE-NEXT: vmsr p0, r131; CHECK-LE-NEXT: vpsel q0, q1, q032; CHECK-LE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill33; CHECK-LE-NEXT: bl ext_i6434; CHECK-LE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload35; CHECK-LE-NEXT: vpsel q0, q4, q036; CHECK-LE-NEXT: add sp, #837; CHECK-LE-NEXT: vpop {d8, d9}38; CHECK-LE-NEXT: pop {r7, pc}39;40; CHECK-BE-LABEL: shuffle1_v2i64:41; CHECK-BE: @ %bb.0: @ %entry42; CHECK-BE-NEXT: .save {r7, lr}43; CHECK-BE-NEXT: push {r7, lr}44; CHECK-BE-NEXT: .vsave {d8, d9}45; CHECK-BE-NEXT: vpush {d8, d9}46; CHECK-BE-NEXT: .pad #847; CHECK-BE-NEXT: sub sp, #848; CHECK-BE-NEXT: vmov q4, q149; CHECK-BE-NEXT: vrev64.32 q1, q050; CHECK-BE-NEXT: vmov r0, r1, d251; CHECK-BE-NEXT: vmov.i32 q0, #0x052; CHECK-BE-NEXT: orrs r0, r153; CHECK-BE-NEXT: mov.w r1, #054; CHECK-BE-NEXT: csetm r0, eq55; CHECK-BE-NEXT: bfi r1, r0, #0, #856; CHECK-BE-NEXT: vmov r0, r2, d357; CHECK-BE-NEXT: orrs r0, r258; CHECK-BE-NEXT: csetm r0, eq59; CHECK-BE-NEXT: bfi r1, r0, #8, #860; CHECK-BE-NEXT: vmsr p0, r161; CHECK-BE-NEXT: vpsel q0, q4, q062; CHECK-BE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill63; CHECK-BE-NEXT: bl ext_i6464; CHECK-BE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload65; CHECK-BE-NEXT: vpsel q0, q4, q066; CHECK-BE-NEXT: add sp, #867; CHECK-BE-NEXT: vpop {d8, d9}68; CHECK-BE-NEXT: pop {r7, pc}69entry:70 %c = icmp eq <2 x i64> %src, zeroinitializer71 %s1 = select <2 x i1> %c, <2 x i64> %a, <2 x i64> zeroinitializer72 %ext = call arm_aapcs_vfpcc <2 x i64> @ext_i64(<2 x i64> %s1)73 %s = select <2 x i1> %c, <2 x i64> %a, <2 x i64> %ext74 ret <2 x i64> %s75}76 77define arm_aapcs_vfpcc <4 x i32> @shuffle1_v4i32(<4 x i32> %src, <4 x i32> %a) {78; CHECK-LE-LABEL: shuffle1_v4i32:79; CHECK-LE: @ %bb.0: @ %entry80; CHECK-LE-NEXT: .save {r7, lr}81; CHECK-LE-NEXT: push {r7, lr}82; CHECK-LE-NEXT: .vsave {d8, d9}83; CHECK-LE-NEXT: vpush {d8, d9}84; CHECK-LE-NEXT: .pad #885; CHECK-LE-NEXT: sub sp, #886; CHECK-LE-NEXT: vcmp.i32 eq, q0, zr87; CHECK-LE-NEXT: vmov.i32 q0, #0x088; CHECK-LE-NEXT: vpsel q0, q1, q089; CHECK-LE-NEXT: vmov q4, q190; CHECK-LE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill91; CHECK-LE-NEXT: bl ext_i3292; CHECK-LE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload93; CHECK-LE-NEXT: vpsel q0, q4, q094; CHECK-LE-NEXT: add sp, #895; CHECK-LE-NEXT: vpop {d8, d9}96; CHECK-LE-NEXT: pop {r7, pc}97;98; CHECK-BE-LABEL: shuffle1_v4i32:99; CHECK-BE: @ %bb.0: @ %entry100; CHECK-BE-NEXT: .save {r7, lr}101; CHECK-BE-NEXT: push {r7, lr}102; CHECK-BE-NEXT: .vsave {d8, d9}103; CHECK-BE-NEXT: vpush {d8, d9}104; CHECK-BE-NEXT: .pad #8105; CHECK-BE-NEXT: sub sp, #8106; CHECK-BE-NEXT: vrev64.32 q4, q1107; CHECK-BE-NEXT: vrev64.32 q1, q0108; CHECK-BE-NEXT: vcmp.i32 eq, q1, zr109; CHECK-BE-NEXT: vmov.i32 q0, #0x0110; CHECK-BE-NEXT: vpsel q1, q4, q0111; CHECK-BE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill112; CHECK-BE-NEXT: vrev64.32 q0, q1113; CHECK-BE-NEXT: bl ext_i32114; CHECK-BE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload115; CHECK-BE-NEXT: vrev64.32 q1, q0116; CHECK-BE-NEXT: vpsel q1, q4, q1117; CHECK-BE-NEXT: vrev64.32 q0, q1118; CHECK-BE-NEXT: add sp, #8119; CHECK-BE-NEXT: vpop {d8, d9}120; CHECK-BE-NEXT: pop {r7, pc}121entry:122 %c = icmp eq <4 x i32> %src, zeroinitializer123 %s1 = select <4 x i1> %c, <4 x i32> %a, <4 x i32> zeroinitializer124 %ext = call arm_aapcs_vfpcc <4 x i32> @ext_i32(<4 x i32> %s1)125 %s = select <4 x i1> %c, <4 x i32> %a, <4 x i32> %ext126 ret <4 x i32> %s127}128 129define arm_aapcs_vfpcc <8 x i16> @shuffle1_v8i16(<8 x i16> %src, <8 x i16> %a) {130; CHECK-LE-LABEL: shuffle1_v8i16:131; CHECK-LE: @ %bb.0: @ %entry132; CHECK-LE-NEXT: .save {r7, lr}133; CHECK-LE-NEXT: push {r7, lr}134; CHECK-LE-NEXT: .vsave {d8, d9}135; CHECK-LE-NEXT: vpush {d8, d9}136; CHECK-LE-NEXT: .pad #8137; CHECK-LE-NEXT: sub sp, #8138; CHECK-LE-NEXT: vcmp.i16 eq, q0, zr139; CHECK-LE-NEXT: vmov.i32 q0, #0x0140; CHECK-LE-NEXT: vpsel q0, q1, q0141; CHECK-LE-NEXT: vmov q4, q1142; CHECK-LE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill143; CHECK-LE-NEXT: bl ext_i16144; CHECK-LE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload145; CHECK-LE-NEXT: vpsel q0, q4, q0146; CHECK-LE-NEXT: add sp, #8147; CHECK-LE-NEXT: vpop {d8, d9}148; CHECK-LE-NEXT: pop {r7, pc}149;150; CHECK-BE-LABEL: shuffle1_v8i16:151; CHECK-BE: @ %bb.0: @ %entry152; CHECK-BE-NEXT: .save {r7, lr}153; CHECK-BE-NEXT: push {r7, lr}154; CHECK-BE-NEXT: .vsave {d8, d9}155; CHECK-BE-NEXT: vpush {d8, d9}156; CHECK-BE-NEXT: .pad #8157; CHECK-BE-NEXT: sub sp, #8158; CHECK-BE-NEXT: vrev64.16 q4, q1159; CHECK-BE-NEXT: vrev64.16 q1, q0160; CHECK-BE-NEXT: vcmp.i16 eq, q1, zr161; CHECK-BE-NEXT: vmov.i32 q0, #0x0162; CHECK-BE-NEXT: vpsel q1, q4, q0163; CHECK-BE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill164; CHECK-BE-NEXT: vrev64.16 q0, q1165; CHECK-BE-NEXT: bl ext_i16166; CHECK-BE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload167; CHECK-BE-NEXT: vrev64.16 q1, q0168; CHECK-BE-NEXT: vpsel q1, q4, q1169; CHECK-BE-NEXT: vrev64.16 q0, q1170; CHECK-BE-NEXT: add sp, #8171; CHECK-BE-NEXT: vpop {d8, d9}172; CHECK-BE-NEXT: pop {r7, pc}173entry:174 %c = icmp eq <8 x i16> %src, zeroinitializer175 %s1 = select <8 x i1> %c, <8 x i16> %a, <8 x i16> zeroinitializer176 %ext = call arm_aapcs_vfpcc <8 x i16> @ext_i16(<8 x i16> %s1)177 %s = select <8 x i1> %c, <8 x i16> %a, <8 x i16> %ext178 ret <8 x i16> %s179}180 181define arm_aapcs_vfpcc <16 x i8> @shuffle1_v16i8(<16 x i8> %src, <16 x i8> %a) {182; CHECK-LE-LABEL: shuffle1_v16i8:183; CHECK-LE: @ %bb.0: @ %entry184; CHECK-LE-NEXT: .save {r7, lr}185; CHECK-LE-NEXT: push {r7, lr}186; CHECK-LE-NEXT: .vsave {d8, d9}187; CHECK-LE-NEXT: vpush {d8, d9}188; CHECK-LE-NEXT: .pad #8189; CHECK-LE-NEXT: sub sp, #8190; CHECK-LE-NEXT: vcmp.i8 eq, q0, zr191; CHECK-LE-NEXT: vmov.i32 q0, #0x0192; CHECK-LE-NEXT: vpsel q0, q1, q0193; CHECK-LE-NEXT: vmov q4, q1194; CHECK-LE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill195; CHECK-LE-NEXT: bl ext_i8196; CHECK-LE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload197; CHECK-LE-NEXT: vpsel q0, q4, q0198; CHECK-LE-NEXT: add sp, #8199; CHECK-LE-NEXT: vpop {d8, d9}200; CHECK-LE-NEXT: pop {r7, pc}201;202; CHECK-BE-LABEL: shuffle1_v16i8:203; CHECK-BE: @ %bb.0: @ %entry204; CHECK-BE-NEXT: .save {r7, lr}205; CHECK-BE-NEXT: push {r7, lr}206; CHECK-BE-NEXT: .vsave {d8, d9}207; CHECK-BE-NEXT: vpush {d8, d9}208; CHECK-BE-NEXT: .pad #8209; CHECK-BE-NEXT: sub sp, #8210; CHECK-BE-NEXT: vrev64.8 q4, q1211; CHECK-BE-NEXT: vrev64.8 q1, q0212; CHECK-BE-NEXT: vcmp.i8 eq, q1, zr213; CHECK-BE-NEXT: vmov.i32 q0, #0x0214; CHECK-BE-NEXT: vpsel q1, q4, q0215; CHECK-BE-NEXT: vstr p0, [sp, #4] @ 4-byte Spill216; CHECK-BE-NEXT: vrev64.8 q0, q1217; CHECK-BE-NEXT: bl ext_i8218; CHECK-BE-NEXT: vldr p0, [sp, #4] @ 4-byte Reload219; CHECK-BE-NEXT: vrev64.8 q1, q0220; CHECK-BE-NEXT: vpsel q1, q4, q1221; CHECK-BE-NEXT: vrev64.8 q0, q1222; CHECK-BE-NEXT: add sp, #8223; CHECK-BE-NEXT: vpop {d8, d9}224; CHECK-BE-NEXT: pop {r7, pc}225entry:226 %c = icmp eq <16 x i8> %src, zeroinitializer227 %s1 = select <16 x i1> %c, <16 x i8> %a, <16 x i8> zeroinitializer228 %ext = call arm_aapcs_vfpcc <16 x i8> @ext_i8(<16 x i8> %s1)229 %s = select <16 x i1> %c, <16 x i8> %a, <16 x i8> %ext230 ret <16 x i8> %s231}232