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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -enable-arm-maskedldst -verify-machineinstrs %s -o - | FileCheck %s3 4define arm_aapcs_vfpcc void @thres_i32(ptr %data, i16 zeroext %N, i32 %T) {5; CHECK-LABEL: thres_i32:6; CHECK: @ %bb.0: @ %entry7; CHECK-NEXT: .save {r7, lr}8; CHECK-NEXT: push {r7, lr}9; CHECK-NEXT: cmp r1, #010; CHECK-NEXT: it eq11; CHECK-NEXT: popeq {r7, pc}12; CHECK-NEXT: .LBB0_1: @ %vector.ph13; CHECK-NEXT: mvn r3, #314; CHECK-NEXT: add.w r1, r3, r1, lsl #215; CHECK-NEXT: movs r3, #116; CHECK-NEXT: vmov.i32 q0, #0x017; CHECK-NEXT: add.w lr, r3, r1, lsr #218; CHECK-NEXT: rsbs r1, r2, #019; CHECK-NEXT: .LBB0_2: @ %vector.body20; CHECK-NEXT: @ =>This Inner Loop Header: Depth=121; CHECK-NEXT: vldrw.u32 q1, [r0]22; CHECK-NEXT: vpte.s32 ge, q1, r223; CHECK-NEXT: vcmpt.s32 le, q1, r124; CHECK-NEXT: vstrwe.32 q0, [r0], #1625; CHECK-NEXT: le lr, .LBB0_226; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup27; CHECK-NEXT: pop {r7, pc}28entry:29 %conv = zext i16 %N to i3230 %mul = shl nuw nsw i32 %conv, 231 %cmp15 = icmp eq i16 %N, 032 br i1 %cmp15, label %for.cond.cleanup, label %vector.ph33 34vector.ph: ; preds = %entry35 %sub = sub nsw i32 0, %T36 %broadcast.splatinsert17 = insertelement <4 x i32> undef, i32 %T, i32 037 %broadcast.splat18 = shufflevector <4 x i32> %broadcast.splatinsert17, <4 x i32> undef, <4 x i32> zeroinitializer38 %broadcast.splatinsert19 = insertelement <4 x i32> undef, i32 %sub, i32 039 %broadcast.splat20 = shufflevector <4 x i32> %broadcast.splatinsert19, <4 x i32> undef, <4 x i32> zeroinitializer40 br label %vector.body41 42vector.body: ; preds = %vector.body, %vector.ph43 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]44 %0 = getelementptr inbounds i32, ptr %data, i32 %index45 %wide.load = load <4 x i32>, ptr %0, align 446 %1 = icmp slt <4 x i32> %wide.load, %broadcast.splat1847 %2 = icmp sgt <4 x i32> %wide.load, %broadcast.splat2048 %3 = or <4 x i1> %1, %249 call void @llvm.masked.store.v4i32.p0(<4 x i32> zeroinitializer, ptr %0, i32 4, <4 x i1> %3)50 %index.next = add i32 %index, 451 %4 = icmp eq i32 %index.next, %mul52 br i1 %4, label %for.cond.cleanup, label %vector.body53 54for.cond.cleanup: ; preds = %vector.body, %entry55 ret void56}57 58define arm_aapcs_vfpcc void @thresh_i16(ptr %data, i16 zeroext %N, i16 signext %T) {59; CHECK-LABEL: thresh_i16:60; CHECK: @ %bb.0: @ %entry61; CHECK-NEXT: .save {r7, lr}62; CHECK-NEXT: push {r7, lr}63; CHECK-NEXT: cmp r1, #064; CHECK-NEXT: it eq65; CHECK-NEXT: popeq {r7, pc}66; CHECK-NEXT: .LBB1_1: @ %vector.ph67; CHECK-NEXT: mvn r3, #768; CHECK-NEXT: add.w r1, r3, r1, lsl #369; CHECK-NEXT: movs r3, #170; CHECK-NEXT: vmov.i32 q0, #0x071; CHECK-NEXT: add.w lr, r3, r1, lsr #372; CHECK-NEXT: rsbs r1, r2, #073; CHECK-NEXT: .LBB1_2: @ %vector.body74; CHECK-NEXT: @ =>This Inner Loop Header: Depth=175; CHECK-NEXT: vldrh.u16 q1, [r0]76; CHECK-NEXT: vpte.s16 ge, q1, r277; CHECK-NEXT: vcmpt.s16 le, q1, r178; CHECK-NEXT: vstrhe.16 q0, [r0], #1679; CHECK-NEXT: le lr, .LBB1_280; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup81; CHECK-NEXT: pop {r7, pc}82entry:83 %conv2 = zext i16 %N to i3284 %mul = shl nuw nsw i32 %conv2, 385 %cmp22 = icmp eq i16 %N, 086 br i1 %cmp22, label %for.cond.cleanup, label %vector.ph87 88vector.ph: ; preds = %entry89 %sub = sub i16 0, %T90 %broadcast.splatinsert24 = insertelement <8 x i16> undef, i16 %T, i32 091 %broadcast.splat25 = shufflevector <8 x i16> %broadcast.splatinsert24, <8 x i16> undef, <8 x i32> zeroinitializer92 %broadcast.splatinsert26 = insertelement <8 x i16> undef, i16 %sub, i32 093 %broadcast.splat27 = shufflevector <8 x i16> %broadcast.splatinsert26, <8 x i16> undef, <8 x i32> zeroinitializer94 br label %vector.body95 96vector.body: ; preds = %vector.body, %vector.ph97 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]98 %0 = getelementptr inbounds i16, ptr %data, i32 %index99 %wide.load = load <8 x i16>, ptr %0, align 2100 %1 = icmp slt <8 x i16> %wide.load, %broadcast.splat25101 %2 = icmp sgt <8 x i16> %wide.load, %broadcast.splat27102 %3 = or <8 x i1> %1, %2103 call void @llvm.masked.store.v8i16.p0(<8 x i16> zeroinitializer, ptr %0, i32 2, <8 x i1> %3)104 %index.next = add i32 %index, 8105 %4 = icmp eq i32 %index.next, %mul106 br i1 %4, label %for.cond.cleanup, label %vector.body107 108for.cond.cleanup: ; preds = %vector.body, %entry109 ret void110}111 112define arm_aapcs_vfpcc void @thresh_i8(ptr %data, i16 zeroext %N, i8 signext %T) {113; CHECK-LABEL: thresh_i8:114; CHECK: @ %bb.0: @ %entry115; CHECK-NEXT: .save {r7, lr}116; CHECK-NEXT: push {r7, lr}117; CHECK-NEXT: cmp r1, #0118; CHECK-NEXT: it eq119; CHECK-NEXT: popeq {r7, pc}120; CHECK-NEXT: .LBB2_1: @ %vector.ph121; CHECK-NEXT: mvn r3, #15122; CHECK-NEXT: add.w r1, r3, r1, lsl #4123; CHECK-NEXT: movs r3, #1124; CHECK-NEXT: vmov.i32 q0, #0x0125; CHECK-NEXT: add.w lr, r3, r1, lsr #4126; CHECK-NEXT: rsbs r1, r2, #0127; CHECK-NEXT: .LBB2_2: @ %vector.body128; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1129; CHECK-NEXT: vldrb.u8 q1, [r0]130; CHECK-NEXT: vpte.s8 ge, q1, r2131; CHECK-NEXT: vcmpt.s8 le, q1, r1132; CHECK-NEXT: vstrbe.8 q0, [r0], #16133; CHECK-NEXT: le lr, .LBB2_2134; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup135; CHECK-NEXT: pop {r7, pc}136entry:137 %conv2 = zext i16 %N to i32138 %mul = shl nuw nsw i32 %conv2, 4139 %cmp20 = icmp eq i16 %N, 0140 br i1 %cmp20, label %for.cond.cleanup, label %vector.ph141 142vector.ph: ; preds = %entry143 %sub = sub i8 0, %T144 %broadcast.splatinsert22 = insertelement <16 x i8> undef, i8 %T, i32 0145 %broadcast.splat23 = shufflevector <16 x i8> %broadcast.splatinsert22, <16 x i8> undef, <16 x i32> zeroinitializer146 %broadcast.splatinsert24 = insertelement <16 x i8> undef, i8 %sub, i32 0147 %broadcast.splat25 = shufflevector <16 x i8> %broadcast.splatinsert24, <16 x i8> undef, <16 x i32> zeroinitializer148 br label %vector.body149 150vector.body: ; preds = %vector.body, %vector.ph151 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]152 %0 = getelementptr inbounds i8, ptr %data, i32 %index153 %wide.load = load <16 x i8>, ptr %0, align 1154 %1 = icmp slt <16 x i8> %wide.load, %broadcast.splat23155 %2 = icmp sgt <16 x i8> %wide.load, %broadcast.splat25156 %3 = or <16 x i1> %1, %2157 call void @llvm.masked.store.v16i8.p0(<16 x i8> zeroinitializer, ptr %0, i32 1, <16 x i1> %3)158 %index.next = add i32 %index, 16159 %4 = icmp eq i32 %index.next, %mul160 br i1 %4, label %for.cond.cleanup, label %vector.body161 162for.cond.cleanup: ; preds = %vector.body, %entry163 ret void164}165 166define arm_aapcs_vfpcc void @thresh_f32(ptr %data, i16 zeroext %N, float %T) {167; CHECK-LABEL: thresh_f32:168; CHECK: @ %bb.0: @ %entry169; CHECK-NEXT: .save {r7, lr}170; CHECK-NEXT: push {r7, lr}171; CHECK-NEXT: cmp r1, #0172; CHECK-NEXT: it eq173; CHECK-NEXT: popeq {r7, pc}174; CHECK-NEXT: .LBB3_1: @ %vector.ph175; CHECK-NEXT: mvn r2, #3176; CHECK-NEXT: add.w r1, r2, r1, lsl #2177; CHECK-NEXT: movs r2, #1178; CHECK-NEXT: add.w lr, r2, r1, lsr #2179; CHECK-NEXT: vmov r1, s0180; CHECK-NEXT: vmov.i32 q0, #0x0181; CHECK-NEXT: eor r2, r1, #-2147483648182; CHECK-NEXT: .LBB3_2: @ %vector.body183; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1184; CHECK-NEXT: vldrw.u32 q1, [r0]185; CHECK-NEXT: vpte.f32 ge, q1, r1186; CHECK-NEXT: vcmpt.f32 le, q1, r2187; CHECK-NEXT: vstrwe.32 q0, [r0], #16188; CHECK-NEXT: le lr, .LBB3_2189; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup190; CHECK-NEXT: pop {r7, pc}191entry:192 %conv = zext i16 %N to i32193 %mul = shl nuw nsw i32 %conv, 2194 %cmp15 = icmp eq i16 %N, 0195 br i1 %cmp15, label %for.cond.cleanup, label %vector.ph196 197vector.ph: ; preds = %entry198 %fneg = fneg fast float %T199 %broadcast.splatinsert17 = insertelement <4 x float> undef, float %T, i32 0200 %broadcast.splat18 = shufflevector <4 x float> %broadcast.splatinsert17, <4 x float> undef, <4 x i32> zeroinitializer201 %broadcast.splatinsert19 = insertelement <4 x float> undef, float %fneg, i32 0202 %broadcast.splat20 = shufflevector <4 x float> %broadcast.splatinsert19, <4 x float> undef, <4 x i32> zeroinitializer203 br label %vector.body204 205vector.body: ; preds = %vector.body, %vector.ph206 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]207 %0 = getelementptr inbounds float, ptr %data, i32 %index208 %wide.load = load <4 x float>, ptr %0, align 4209 %1 = fcmp fast olt <4 x float> %wide.load, %broadcast.splat18210 %2 = fcmp fast ogt <4 x float> %wide.load, %broadcast.splat20211 %3 = or <4 x i1> %1, %2212 call void @llvm.masked.store.v4f32.p0(<4 x float> zeroinitializer, ptr %0, i32 4, <4 x i1> %3)213 %index.next = add i32 %index, 4214 %4 = icmp eq i32 %index.next, %mul215 br i1 %4, label %for.cond.cleanup, label %vector.body216 217for.cond.cleanup: ; preds = %vector.body, %entry218 ret void219}220 221define arm_aapcs_vfpcc void @thresh_f16(ptr %data, i16 zeroext %N, float %T.coerce) {222; CHECK-LABEL: thresh_f16:223; CHECK: @ %bb.0: @ %entry224; CHECK-NEXT: .save {r7, lr}225; CHECK-NEXT: push {r7, lr}226; CHECK-NEXT: cmp r1, #0227; CHECK-NEXT: it eq228; CHECK-NEXT: popeq {r7, pc}229; CHECK-NEXT: .LBB4_1: @ %vector.ph230; CHECK-NEXT: mvn r3, #7231; CHECK-NEXT: add.w r1, r3, r1, lsl #3232; CHECK-NEXT: vmov r2, s0233; CHECK-NEXT: vneg.f16 s0, s0234; CHECK-NEXT: movs r3, #1235; CHECK-NEXT: add.w lr, r3, r1, lsr #3236; CHECK-NEXT: vmov.f16 r1, s0237; CHECK-NEXT: vmov.i32 q0, #0x0238; CHECK-NEXT: .LBB4_2: @ %vector.body239; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1240; CHECK-NEXT: vldrh.u16 q1, [r0]241; CHECK-NEXT: vpte.f16 ge, q1, r2242; CHECK-NEXT: vcmpt.f16 le, q1, r1243; CHECK-NEXT: vstrhe.16 q0, [r0], #16244; CHECK-NEXT: le lr, .LBB4_2245; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup246; CHECK-NEXT: pop {r7, pc}247entry:248 %0 = bitcast float %T.coerce to i32249 %tmp.0.extract.trunc = trunc i32 %0 to i16250 %1 = bitcast i16 %tmp.0.extract.trunc to half251 %conv = zext i16 %N to i32252 %mul = shl nuw nsw i32 %conv, 3253 %cmp17 = icmp eq i16 %N, 0254 br i1 %cmp17, label %for.cond.cleanup, label %vector.ph255 256vector.ph: ; preds = %entry257 %fneg = fneg fast half %1258 %broadcast.splatinsert19 = insertelement <8 x half> undef, half %1, i32 0259 %broadcast.splat20 = shufflevector <8 x half> %broadcast.splatinsert19, <8 x half> undef, <8 x i32> zeroinitializer260 %broadcast.splatinsert21 = insertelement <8 x half> undef, half %fneg, i32 0261 %broadcast.splat22 = shufflevector <8 x half> %broadcast.splatinsert21, <8 x half> undef, <8 x i32> zeroinitializer262 br label %vector.body263 264vector.body: ; preds = %vector.body, %vector.ph265 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]266 %2 = getelementptr inbounds half, ptr %data, i32 %index267 %wide.load = load <8 x half>, ptr %2, align 2268 %3 = fcmp fast olt <8 x half> %wide.load, %broadcast.splat20269 %4 = fcmp fast ogt <8 x half> %wide.load, %broadcast.splat22270 %5 = or <8 x i1> %3, %4271 call void @llvm.masked.store.v8f16.p0(<8 x half> zeroinitializer, ptr %2, i32 2, <8 x i1> %5)272 %index.next = add i32 %index, 8273 %6 = icmp eq i32 %index.next, %mul274 br i1 %6, label %for.cond.cleanup, label %vector.body275 276for.cond.cleanup: ; preds = %vector.body, %entry277 ret void278}279 280 281 282define arm_aapcs_vfpcc void @thres_rev_i32(ptr %data, i16 zeroext %N, i32 %T) {283; CHECK-LABEL: thres_rev_i32:284; CHECK: @ %bb.0: @ %entry285; CHECK-NEXT: .save {r7, lr}286; CHECK-NEXT: push {r7, lr}287; CHECK-NEXT: cmp r1, #0288; CHECK-NEXT: it eq289; CHECK-NEXT: popeq {r7, pc}290; CHECK-NEXT: .LBB5_1: @ %vector.ph291; CHECK-NEXT: mvn r3, #3292; CHECK-NEXT: add.w r1, r3, r1, lsl #2293; CHECK-NEXT: movs r3, #1294; CHECK-NEXT: vmov.i32 q0, #0x0295; CHECK-NEXT: add.w lr, r3, r1, lsr #2296; CHECK-NEXT: rsbs r1, r2, #0297; CHECK-NEXT: .LBB5_2: @ %vector.body298; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1299; CHECK-NEXT: vldrw.u32 q1, [r0]300; CHECK-NEXT: vpte.s32 ge, q1, r2301; CHECK-NEXT: vcmpt.s32 le, q1, r1302; CHECK-NEXT: vstrwe.32 q0, [r0], #16303; CHECK-NEXT: le lr, .LBB5_2304; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup305; CHECK-NEXT: pop {r7, pc}306entry:307 %conv = zext i16 %N to i32308 %mul = shl nuw nsw i32 %conv, 2309 %cmp15 = icmp eq i16 %N, 0310 br i1 %cmp15, label %for.cond.cleanup, label %vector.ph311 312vector.ph: ; preds = %entry313 %sub = sub nsw i32 0, %T314 %broadcast.splatinsert17 = insertelement <4 x i32> undef, i32 %T, i32 0315 %broadcast.splat18 = shufflevector <4 x i32> %broadcast.splatinsert17, <4 x i32> undef, <4 x i32> zeroinitializer316 %broadcast.splatinsert19 = insertelement <4 x i32> undef, i32 %sub, i32 0317 %broadcast.splat20 = shufflevector <4 x i32> %broadcast.splatinsert19, <4 x i32> undef, <4 x i32> zeroinitializer318 br label %vector.body319 320vector.body: ; preds = %vector.body, %vector.ph321 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]322 %0 = getelementptr inbounds i32, ptr %data, i32 %index323 %wide.load = load <4 x i32>, ptr %0, align 4324 %1 = icmp sgt <4 x i32> %broadcast.splat18, %wide.load325 %2 = icmp slt <4 x i32> %broadcast.splat20, %wide.load326 %3 = or <4 x i1> %1, %2327 call void @llvm.masked.store.v4i32.p0(<4 x i32> zeroinitializer, ptr %0, i32 4, <4 x i1> %3)328 %index.next = add i32 %index, 4329 %4 = icmp eq i32 %index.next, %mul330 br i1 %4, label %for.cond.cleanup, label %vector.body331 332for.cond.cleanup: ; preds = %vector.body, %entry333 ret void334}335 336define arm_aapcs_vfpcc void @thresh_rev_i16(ptr %data, i16 zeroext %N, i16 signext %T) {337; CHECK-LABEL: thresh_rev_i16:338; CHECK: @ %bb.0: @ %entry339; CHECK-NEXT: .save {r7, lr}340; CHECK-NEXT: push {r7, lr}341; CHECK-NEXT: cmp r1, #0342; CHECK-NEXT: it eq343; CHECK-NEXT: popeq {r7, pc}344; CHECK-NEXT: .LBB6_1: @ %vector.ph345; CHECK-NEXT: mvn r3, #7346; CHECK-NEXT: add.w r1, r3, r1, lsl #3347; CHECK-NEXT: movs r3, #1348; CHECK-NEXT: vmov.i32 q0, #0x0349; CHECK-NEXT: add.w lr, r3, r1, lsr #3350; CHECK-NEXT: rsbs r1, r2, #0351; CHECK-NEXT: .LBB6_2: @ %vector.body352; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1353; CHECK-NEXT: vldrh.u16 q1, [r0]354; CHECK-NEXT: vpte.s16 ge, q1, r2355; CHECK-NEXT: vcmpt.s16 le, q1, r1356; CHECK-NEXT: vstrhe.16 q0, [r0], #16357; CHECK-NEXT: le lr, .LBB6_2358; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup359; CHECK-NEXT: pop {r7, pc}360entry:361 %conv2 = zext i16 %N to i32362 %mul = shl nuw nsw i32 %conv2, 3363 %cmp22 = icmp eq i16 %N, 0364 br i1 %cmp22, label %for.cond.cleanup, label %vector.ph365 366vector.ph: ; preds = %entry367 %sub = sub i16 0, %T368 %broadcast.splatinsert24 = insertelement <8 x i16> undef, i16 %T, i32 0369 %broadcast.splat25 = shufflevector <8 x i16> %broadcast.splatinsert24, <8 x i16> undef, <8 x i32> zeroinitializer370 %broadcast.splatinsert26 = insertelement <8 x i16> undef, i16 %sub, i32 0371 %broadcast.splat27 = shufflevector <8 x i16> %broadcast.splatinsert26, <8 x i16> undef, <8 x i32> zeroinitializer372 br label %vector.body373 374vector.body: ; preds = %vector.body, %vector.ph375 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]376 %0 = getelementptr inbounds i16, ptr %data, i32 %index377 %wide.load = load <8 x i16>, ptr %0, align 2378 %1 = icmp sgt <8 x i16> %broadcast.splat25, %wide.load379 %2 = icmp slt <8 x i16> %broadcast.splat27, %wide.load380 %3 = or <8 x i1> %1, %2381 call void @llvm.masked.store.v8i16.p0(<8 x i16> zeroinitializer, ptr %0, i32 2, <8 x i1> %3)382 %index.next = add i32 %index, 8383 %4 = icmp eq i32 %index.next, %mul384 br i1 %4, label %for.cond.cleanup, label %vector.body385 386for.cond.cleanup: ; preds = %vector.body, %entry387 ret void388}389 390define arm_aapcs_vfpcc void @thresh_rev_i8(ptr %data, i16 zeroext %N, i8 signext %T) {391; CHECK-LABEL: thresh_rev_i8:392; CHECK: @ %bb.0: @ %entry393; CHECK-NEXT: .save {r7, lr}394; CHECK-NEXT: push {r7, lr}395; CHECK-NEXT: cmp r1, #0396; CHECK-NEXT: it eq397; CHECK-NEXT: popeq {r7, pc}398; CHECK-NEXT: .LBB7_1: @ %vector.ph399; CHECK-NEXT: mvn r3, #15400; CHECK-NEXT: add.w r1, r3, r1, lsl #4401; CHECK-NEXT: movs r3, #1402; CHECK-NEXT: vmov.i32 q0, #0x0403; CHECK-NEXT: add.w lr, r3, r1, lsr #4404; CHECK-NEXT: rsbs r1, r2, #0405; CHECK-NEXT: .LBB7_2: @ %vector.body406; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1407; CHECK-NEXT: vldrb.u8 q1, [r0]408; CHECK-NEXT: vpte.s8 ge, q1, r2409; CHECK-NEXT: vcmpt.s8 le, q1, r1410; CHECK-NEXT: vstrbe.8 q0, [r0], #16411; CHECK-NEXT: le lr, .LBB7_2412; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup413; CHECK-NEXT: pop {r7, pc}414entry:415 %conv2 = zext i16 %N to i32416 %mul = shl nuw nsw i32 %conv2, 4417 %cmp20 = icmp eq i16 %N, 0418 br i1 %cmp20, label %for.cond.cleanup, label %vector.ph419 420vector.ph: ; preds = %entry421 %sub = sub i8 0, %T422 %broadcast.splatinsert22 = insertelement <16 x i8> undef, i8 %T, i32 0423 %broadcast.splat23 = shufflevector <16 x i8> %broadcast.splatinsert22, <16 x i8> undef, <16 x i32> zeroinitializer424 %broadcast.splatinsert24 = insertelement <16 x i8> undef, i8 %sub, i32 0425 %broadcast.splat25 = shufflevector <16 x i8> %broadcast.splatinsert24, <16 x i8> undef, <16 x i32> zeroinitializer426 br label %vector.body427 428vector.body: ; preds = %vector.body, %vector.ph429 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]430 %0 = getelementptr inbounds i8, ptr %data, i32 %index431 %wide.load = load <16 x i8>, ptr %0, align 1432 %1 = icmp sgt <16 x i8> %broadcast.splat23, %wide.load433 %2 = icmp slt <16 x i8> %broadcast.splat25, %wide.load434 %3 = or <16 x i1> %1, %2435 call void @llvm.masked.store.v16i8.p0(<16 x i8> zeroinitializer, ptr %0, i32 1, <16 x i1> %3)436 %index.next = add i32 %index, 16437 %4 = icmp eq i32 %index.next, %mul438 br i1 %4, label %for.cond.cleanup, label %vector.body439 440for.cond.cleanup: ; preds = %vector.body, %entry441 ret void442}443 444define arm_aapcs_vfpcc void @thresh_rev_f32(ptr %data, i16 zeroext %N, float %T) {445; CHECK-LABEL: thresh_rev_f32:446; CHECK: @ %bb.0: @ %entry447; CHECK-NEXT: .save {r7, lr}448; CHECK-NEXT: push {r7, lr}449; CHECK-NEXT: cmp r1, #0450; CHECK-NEXT: it eq451; CHECK-NEXT: popeq {r7, pc}452; CHECK-NEXT: .LBB8_1: @ %vector.ph453; CHECK-NEXT: mvn r2, #3454; CHECK-NEXT: add.w r1, r2, r1, lsl #2455; CHECK-NEXT: movs r2, #1456; CHECK-NEXT: add.w lr, r2, r1, lsr #2457; CHECK-NEXT: vmov r1, s0458; CHECK-NEXT: vmov.i32 q0, #0x0459; CHECK-NEXT: eor r2, r1, #-2147483648460; CHECK-NEXT: .LBB8_2: @ %vector.body461; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1462; CHECK-NEXT: vldrw.u32 q1, [r0]463; CHECK-NEXT: vpte.f32 ge, q1, r1464; CHECK-NEXT: vcmpt.f32 le, q1, r2465; CHECK-NEXT: vstrwe.32 q0, [r0], #16466; CHECK-NEXT: le lr, .LBB8_2467; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup468; CHECK-NEXT: pop {r7, pc}469entry:470 %conv = zext i16 %N to i32471 %mul = shl nuw nsw i32 %conv, 2472 %cmp15 = icmp eq i16 %N, 0473 br i1 %cmp15, label %for.cond.cleanup, label %vector.ph474 475vector.ph: ; preds = %entry476 %fneg = fneg fast float %T477 %broadcast.splatinsert17 = insertelement <4 x float> undef, float %T, i32 0478 %broadcast.splat18 = shufflevector <4 x float> %broadcast.splatinsert17, <4 x float> undef, <4 x i32> zeroinitializer479 %broadcast.splatinsert19 = insertelement <4 x float> undef, float %fneg, i32 0480 %broadcast.splat20 = shufflevector <4 x float> %broadcast.splatinsert19, <4 x float> undef, <4 x i32> zeroinitializer481 br label %vector.body482 483vector.body: ; preds = %vector.body, %vector.ph484 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]485 %0 = getelementptr inbounds float, ptr %data, i32 %index486 %wide.load = load <4 x float>, ptr %0, align 4487 %1 = fcmp fast ogt <4 x float> %broadcast.splat18, %wide.load488 %2 = fcmp fast olt <4 x float> %broadcast.splat20, %wide.load489 %3 = or <4 x i1> %1, %2490 call void @llvm.masked.store.v4f32.p0(<4 x float> zeroinitializer, ptr %0, i32 4, <4 x i1> %3)491 %index.next = add i32 %index, 4492 %4 = icmp eq i32 %index.next, %mul493 br i1 %4, label %for.cond.cleanup, label %vector.body494 495for.cond.cleanup: ; preds = %vector.body, %entry496 ret void497}498 499define arm_aapcs_vfpcc void @thresh_rev_f16(ptr %data, i16 zeroext %N, float %T.coerce) {500; CHECK-LABEL: thresh_rev_f16:501; CHECK: @ %bb.0: @ %entry502; CHECK-NEXT: .save {r7, lr}503; CHECK-NEXT: push {r7, lr}504; CHECK-NEXT: cmp r1, #0505; CHECK-NEXT: it eq506; CHECK-NEXT: popeq {r7, pc}507; CHECK-NEXT: .LBB9_1: @ %vector.ph508; CHECK-NEXT: mvn r3, #7509; CHECK-NEXT: add.w r1, r3, r1, lsl #3510; CHECK-NEXT: vmov r2, s0511; CHECK-NEXT: vneg.f16 s0, s0512; CHECK-NEXT: movs r3, #1513; CHECK-NEXT: add.w lr, r3, r1, lsr #3514; CHECK-NEXT: vmov.f16 r1, s0515; CHECK-NEXT: vmov.i32 q0, #0x0516; CHECK-NEXT: .LBB9_2: @ %vector.body517; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1518; CHECK-NEXT: vldrh.u16 q1, [r0]519; CHECK-NEXT: vpte.f16 ge, q1, r2520; CHECK-NEXT: vcmpt.f16 le, q1, r1521; CHECK-NEXT: vstrhe.16 q0, [r0], #16522; CHECK-NEXT: le lr, .LBB9_2523; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup524; CHECK-NEXT: pop {r7, pc}525entry:526 %0 = bitcast float %T.coerce to i32527 %tmp.0.extract.trunc = trunc i32 %0 to i16528 %1 = bitcast i16 %tmp.0.extract.trunc to half529 %conv = zext i16 %N to i32530 %mul = shl nuw nsw i32 %conv, 3531 %cmp17 = icmp eq i16 %N, 0532 br i1 %cmp17, label %for.cond.cleanup, label %vector.ph533 534vector.ph: ; preds = %entry535 %fneg = fneg fast half %1536 %broadcast.splatinsert19 = insertelement <8 x half> undef, half %1, i32 0537 %broadcast.splat20 = shufflevector <8 x half> %broadcast.splatinsert19, <8 x half> undef, <8 x i32> zeroinitializer538 %broadcast.splatinsert21 = insertelement <8 x half> undef, half %fneg, i32 0539 %broadcast.splat22 = shufflevector <8 x half> %broadcast.splatinsert21, <8 x half> undef, <8 x i32> zeroinitializer540 br label %vector.body541 542vector.body: ; preds = %vector.body, %vector.ph543 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]544 %2 = getelementptr inbounds half, ptr %data, i32 %index545 %wide.load = load <8 x half>, ptr %2, align 2546 %3 = fcmp fast ogt <8 x half> %broadcast.splat20, %wide.load547 %4 = fcmp fast olt <8 x half> %broadcast.splat22, %wide.load548 %5 = or <8 x i1> %3, %4549 call void @llvm.masked.store.v8f16.p0(<8 x half> zeroinitializer, ptr %2, i32 2, <8 x i1> %5)550 %index.next = add i32 %index, 8551 %6 = icmp eq i32 %index.next, %mul552 br i1 %6, label %for.cond.cleanup, label %vector.body553 554for.cond.cleanup: ; preds = %vector.body, %entry555 ret void556}557 558 559 560 561declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i32 immarg, <4 x i1>)562declare void @llvm.masked.store.v8i16.p0(<8 x i16>, ptr, i32 immarg, <8 x i1>)563declare void @llvm.masked.store.v16i8.p0(<16 x i8>, ptr, i32 immarg, <16 x i1>)564declare void @llvm.masked.store.v4f32.p0(<4 x float>, ptr, i32 immarg, <4 x i1>)565declare void @llvm.masked.store.v8f16.p0(<8 x half>, ptr, i32 immarg, <8 x i1>)566