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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s3 4define arm_aapcs_vfpcc void @ssatmul_s_q31(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {5; CHECK-LABEL: ssatmul_s_q31:6; CHECK:       @ %bb.0: @ %entry7; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}8; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}9; CHECK-NEXT:    .pad #810; CHECK-NEXT:    sub sp, #811; CHECK-NEXT:    cmp r3, #012; CHECK-NEXT:    beq.w .LBB0_813; CHECK-NEXT:  @ %bb.1: @ %entry14; CHECK-NEXT:    mov r11, r215; CHECK-NEXT:    cmp r3, #116; CHECK-NEXT:    bne .LBB0_317; CHECK-NEXT:  @ %bb.2:18; CHECK-NEXT:    movs r2, #019; CHECK-NEXT:    mov r12, r020; CHECK-NEXT:    mov r8, r121; CHECK-NEXT:    mov r10, r1122; CHECK-NEXT:    b .LBB0_623; CHECK-NEXT:  .LBB0_3: @ %vector.ph24; CHECK-NEXT:    bic r2, r3, #125; CHECK-NEXT:    adr r4, .LCPI0_026; CHECK-NEXT:    subs r7, r2, #227; CHECK-NEXT:    movs r6, #128; CHECK-NEXT:    str r3, [sp, #4] @ 4-byte Spill29; CHECK-NEXT:    add.w r10, r11, r2, lsl #230; CHECK-NEXT:    add.w lr, r6, r7, lsr #131; CHECK-NEXT:    str r2, [sp] @ 4-byte Spill32; CHECK-NEXT:    add.w r8, r1, r2, lsl #233; CHECK-NEXT:    add.w r12, r0, r2, lsl #234; CHECK-NEXT:    vldrw.u32 q0, [r4]35; CHECK-NEXT:    vmvn.i32 q1, #0x8000000036; CHECK-NEXT:  .LBB0_4: @ %vector.body37; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=138; CHECK-NEXT:    ldrd r4, r2, [r0], #839; CHECK-NEXT:    movs r5, #040; CHECK-NEXT:    ldrd r7, r6, [r1], #841; CHECK-NEXT:    smull r4, r7, r7, r442; CHECK-NEXT:    asrl r4, r7, #3143; CHECK-NEXT:    rsbs.w r9, r4, #-214748364844; CHECK-NEXT:    mov.w r9, #-145; CHECK-NEXT:    sbcs.w r3, r9, r746; CHECK-NEXT:    csetm r3, lt47; CHECK-NEXT:    bfi r5, r3, #0, #848; CHECK-NEXT:    smull r2, r3, r6, r249; CHECK-NEXT:    asrl r2, r3, #3150; CHECK-NEXT:    rsbs.w r6, r2, #-214748364851; CHECK-NEXT:    vmov q2[2], q2[0], r4, r252; CHECK-NEXT:    sbcs.w r6, r9, r353; CHECK-NEXT:    vmov q2[3], q2[1], r7, r354; CHECK-NEXT:    csetm r6, lt55; CHECK-NEXT:    bfi r5, r6, #8, #856; CHECK-NEXT:    vmsr p0, r557; CHECK-NEXT:    mvn r5, #-214748364858; CHECK-NEXT:    vpsel q2, q2, q059; CHECK-NEXT:    vmov r2, r3, d460; CHECK-NEXT:    subs r2, r2, r561; CHECK-NEXT:    sbcs r2, r3, #062; CHECK-NEXT:    mov.w r3, #063; CHECK-NEXT:    csetm r2, lt64; CHECK-NEXT:    bfi r3, r2, #0, #865; CHECK-NEXT:    vmov r2, r4, d566; CHECK-NEXT:    subs r2, r2, r567; CHECK-NEXT:    sbcs r2, r4, #068; CHECK-NEXT:    csetm r2, lt69; CHECK-NEXT:    bfi r3, r2, #8, #870; CHECK-NEXT:    vmsr p0, r371; CHECK-NEXT:    vpsel q2, q2, q172; CHECK-NEXT:    vmov r2, s1073; CHECK-NEXT:    vmov r3, s874; CHECK-NEXT:    strd r3, r2, [r11], #875; CHECK-NEXT:    le lr, .LBB0_476; CHECK-NEXT:  @ %bb.5: @ %middle.block77; CHECK-NEXT:    ldrd r2, r3, [sp] @ 8-byte Folded Reload78; CHECK-NEXT:    cmp r2, r379; CHECK-NEXT:    beq .LBB0_880; CHECK-NEXT:  .LBB0_6: @ %for.body.preheader81; CHECK-NEXT:    sub.w lr, r3, r282; CHECK-NEXT:    mov.w r0, #-183; CHECK-NEXT:    mov.w r1, #-214748364884; CHECK-NEXT:    mvn r3, #-214748364885; CHECK-NEXT:  .LBB0_7: @ %for.body86; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=187; CHECK-NEXT:    ldr r2, [r12], #488; CHECK-NEXT:    ldr r4, [r8], #489; CHECK-NEXT:    smull r2, r5, r4, r290; CHECK-NEXT:    asrl r2, r5, #3191; CHECK-NEXT:    subs r4, r1, r292; CHECK-NEXT:    sbcs.w r4, r0, r593; CHECK-NEXT:    csel r2, r2, r1, lt94; CHECK-NEXT:    csel r4, r5, r0, lt95; CHECK-NEXT:    subs r5, r2, r396; CHECK-NEXT:    sbcs r4, r4, #097; CHECK-NEXT:    csel r2, r2, r3, lt98; CHECK-NEXT:    str r2, [r10], #499; CHECK-NEXT:    le lr, .LBB0_7100; CHECK-NEXT:  .LBB0_8: @ %for.cond.cleanup101; CHECK-NEXT:    add sp, #8102; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}103; CHECK-NEXT:    .p2align 4104; CHECK-NEXT:  @ %bb.9:105; CHECK-NEXT:  .LCPI0_0:106; CHECK-NEXT:    .long 2147483648 @ 0x80000000107; CHECK-NEXT:    .long 4294967295 @ 0xffffffff108; CHECK-NEXT:    .long 2147483648 @ 0x80000000109; CHECK-NEXT:    .long 4294967295 @ 0xffffffff110entry:111  switch i32 %N, label %vector.ph [112    i32 0, label %for.cond.cleanup113    i32 1, label %for.body.preheader114  ]115 116vector.ph:                                        ; preds = %entry117  %n.vec = and i32 %N, -2118  %ind.end = getelementptr i32, ptr %pSrcA, i32 %n.vec119  %ind.end15 = getelementptr i32, ptr %pSrcB, i32 %n.vec120  %ind.end17 = getelementptr i32, ptr %pDst, i32 %n.vec121  br label %vector.body122 123vector.body:                                      ; preds = %vector.body, %vector.ph124  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]125  %next.gep = getelementptr i32, ptr %pSrcA, i32 %index126  %next.gep18 = getelementptr i32, ptr %pSrcB, i32 %index127  %next.gep19 = getelementptr i32, ptr %pDst, i32 %index128  %wide.load = load <2 x i32>, ptr %next.gep, align 4129  %0 = sext <2 x i32> %wide.load to <2 x i64>130  %wide.load20 = load <2 x i32>, ptr %next.gep18, align 4131  %1 = sext <2 x i32> %wide.load20 to <2 x i64>132  %2 = mul nsw <2 x i64> %1, %0133  %3 = ashr <2 x i64> %2, <i64 31, i64 31>134  %4 = icmp sgt <2 x i64> %3, <i64 -2147483648, i64 -2147483648>135  %5 = select <2 x i1> %4, <2 x i64> %3, <2 x i64> <i64 -2147483648, i64 -2147483648>136  %6 = icmp slt <2 x i64> %5, <i64 2147483647, i64 2147483647>137  %7 = select <2 x i1> %6, <2 x i64> %5, <2 x i64> <i64 2147483647, i64 2147483647>138  %8 = trunc <2 x i64> %7 to <2 x i32>139  store <2 x i32> %8, ptr %next.gep19, align 4140  %index.next = add i32 %index, 2141  %9 = icmp eq i32 %index.next, %n.vec142  br i1 %9, label %middle.block, label %vector.body143 144middle.block:                                     ; preds = %vector.body145  %cmp.n = icmp eq i32 %n.vec, %N146  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader147 148for.body.preheader:                               ; preds = %entry, %middle.block149  %i.012.ph = phi i32 [ 0, %entry ], [ %n.vec, %middle.block ]150  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %entry ], [ %ind.end, %middle.block ]151  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %entry ], [ %ind.end15, %middle.block ]152  %pDst.addr.09.ph = phi ptr [ %pDst, %entry ], [ %ind.end17, %middle.block ]153  br label %for.body154 155for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry156  ret void157 158for.body:                                         ; preds = %for.body.preheader, %for.body159  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader ]160  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader ]161  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader ]162  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader ]163  %incdec.ptr = getelementptr inbounds i32, ptr %pSrcA.addr.011, i32 1164  %10 = load i32, ptr %pSrcA.addr.011, align 4165  %conv = sext i32 %10 to i64166  %incdec.ptr1 = getelementptr inbounds i32, ptr %pSrcB.addr.010, i32 1167  %11 = load i32, ptr %pSrcB.addr.010, align 4168  %conv2 = sext i32 %11 to i64169  %mul = mul nsw i64 %conv2, %conv170  %shr = ashr i64 %mul, 31171  %12 = icmp sgt i64 %shr, -2147483648172  %.val.i = select i1 %12, i64 %shr, i64 -2147483648173  %13 = icmp slt i64 %.val.i, 2147483647174  %retval.0.i = select i1 %13, i64 %.val.i, i64 2147483647175  %conv3 = trunc i64 %retval.0.i to i32176  %incdec.ptr4 = getelementptr inbounds i32, ptr %pDst.addr.09, i32 1177  store i32 %conv3, ptr %pDst.addr.09, align 4178  %inc = add nuw i32 %i.012, 1179  %exitcond = icmp eq i32 %inc, %N180  br i1 %exitcond, label %for.cond.cleanup, label %for.body181}182 183define arm_aapcs_vfpcc void @ssatmul_4_q31(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {184; CHECK-LABEL: ssatmul_4_q31:185; CHECK:       @ %bb.0: @ %entry186; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}187; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}188; CHECK-NEXT:    .pad #4189; CHECK-NEXT:    sub sp, #4190; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13}191; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13}192; CHECK-NEXT:    .pad #16193; CHECK-NEXT:    sub sp, #16194; CHECK-NEXT:    cmp r3, #0195; CHECK-NEXT:    beq.w .LBB1_8196; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader197; CHECK-NEXT:    mov r5, r1198; CHECK-NEXT:    movs r1, #0199; CHECK-NEXT:    cmp r3, #3200; CHECK-NEXT:    bhi .LBB1_3201; CHECK-NEXT:  @ %bb.2:202; CHECK-NEXT:    mov r12, r0203; CHECK-NEXT:    mov r9, r5204; CHECK-NEXT:    mov r11, r2205; CHECK-NEXT:    b .LBB1_6206; CHECK-NEXT:  .LBB1_3: @ %vector.ph207; CHECK-NEXT:    bic r1, r3, #3208; CHECK-NEXT:    adr r4, .LCPI1_0209; CHECK-NEXT:    subs r7, r1, #4210; CHECK-NEXT:    movs r6, #1211; CHECK-NEXT:    vldrw.u32 q0, [r4]212; CHECK-NEXT:    adr r4, .LCPI1_1213; CHECK-NEXT:    str r3, [sp, #4] @ 4-byte Spill214; CHECK-NEXT:    add.w lr, r6, r7, lsr #2215; CHECK-NEXT:    str r1, [sp] @ 4-byte Spill216; CHECK-NEXT:    add.w r11, r2, r1, lsl #2217; CHECK-NEXT:    add.w r9, r5, r1, lsl #2218; CHECK-NEXT:    add.w r12, r0, r1, lsl #2219; CHECK-NEXT:    vldrw.u32 q1, [r4]220; CHECK-NEXT:  .LBB1_4: @ %vector.body221; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1222; CHECK-NEXT:    vldrw.u32 q3, [r5], #16223; CHECK-NEXT:    vldrw.u32 q2, [r0], #16224; CHECK-NEXT:    str r2, [sp, #12] @ 4-byte Spill225; CHECK-NEXT:    mov.w r2, #-1226; CHECK-NEXT:    vmov.f32 s16, s10227; CHECK-NEXT:    str r5, [sp, #8] @ 4-byte Spill228; CHECK-NEXT:    vmov.f32 s20, s14229; CHECK-NEXT:    mov.w r8, #0230; CHECK-NEXT:    vmov.f32 s18, s11231; CHECK-NEXT:    vmov.f32 s22, s15232; CHECK-NEXT:    vmullb.s32 q6, q5, q4233; CHECK-NEXT:    vmov.f32 s14, s13234; CHECK-NEXT:    vmov r4, r7, d12235; CHECK-NEXT:    asrl r4, r7, #31236; CHECK-NEXT:    vmov.f32 s10, s9237; CHECK-NEXT:    rsbs.w r5, r4, #-2147483648238; CHECK-NEXT:    sbcs.w r5, r2, r7239; CHECK-NEXT:    csetm r5, lt240; CHECK-NEXT:    bfi r8, r5, #0, #8241; CHECK-NEXT:    vmov r10, r5, d13242; CHECK-NEXT:    asrl r10, r5, #31243; CHECK-NEXT:    vmov r6, s14244; CHECK-NEXT:    rsbs.w r3, r10, #-2147483648245; CHECK-NEXT:    vmov q4[2], q4[0], r4, r10246; CHECK-NEXT:    sbcs.w r3, r2, r5247; CHECK-NEXT:    vmov q4[3], q4[1], r7, r5248; CHECK-NEXT:    csetm r3, lt249; CHECK-NEXT:    bfi r8, r3, #8, #8250; CHECK-NEXT:    vmsr p0, r8251; CHECK-NEXT:    mvn r8, #-2147483648252; CHECK-NEXT:    vpsel q4, q4, q0253; CHECK-NEXT:    vmov r3, r4, d8254; CHECK-NEXT:    subs.w r3, r3, r8255; CHECK-NEXT:    sbcs r3, r4, #0256; CHECK-NEXT:    mov.w r4, #0257; CHECK-NEXT:    csetm r3, lt258; CHECK-NEXT:    bfi r4, r3, #0, #8259; CHECK-NEXT:    vmov r3, r5, d9260; CHECK-NEXT:    subs.w r3, r3, r8261; CHECK-NEXT:    sbcs r3, r5, #0262; CHECK-NEXT:    mov.w r5, #0263; CHECK-NEXT:    csetm r3, lt264; CHECK-NEXT:    bfi r4, r3, #8, #8265; CHECK-NEXT:    vmov r3, s8266; CHECK-NEXT:    vmsr p0, r4267; CHECK-NEXT:    vmov r4, s12268; CHECK-NEXT:    vpsel q4, q4, q1269; CHECK-NEXT:    smull r4, r7, r4, r3270; CHECK-NEXT:    asrl r4, r7, #31271; CHECK-NEXT:    rsbs.w r3, r4, #-2147483648272; CHECK-NEXT:    sbcs.w r3, r2, r7273; CHECK-NEXT:    csetm r3, lt274; CHECK-NEXT:    bfi r5, r3, #0, #8275; CHECK-NEXT:    vmov r3, s10276; CHECK-NEXT:    smull r6, r3, r6, r3277; CHECK-NEXT:    asrl r6, r3, #31278; CHECK-NEXT:    rsbs.w r1, r6, #-2147483648279; CHECK-NEXT:    vmov q2[2], q2[0], r4, r6280; CHECK-NEXT:    sbcs.w r1, r2, r3281; CHECK-NEXT:    vmov q2[3], q2[1], r7, r3282; CHECK-NEXT:    csetm r1, lt283; CHECK-NEXT:    bfi r5, r1, #8, #8284; CHECK-NEXT:    vmsr p0, r5285; CHECK-NEXT:    ldrd r5, r2, [sp, #8] @ 8-byte Folded Reload286; CHECK-NEXT:    vpsel q2, q2, q0287; CHECK-NEXT:    vmov r1, r3, d4288; CHECK-NEXT:    subs.w r1, r1, r8289; CHECK-NEXT:    sbcs r1, r3, #0290; CHECK-NEXT:    mov.w r3, #0291; CHECK-NEXT:    csetm r1, lt292; CHECK-NEXT:    bfi r3, r1, #0, #8293; CHECK-NEXT:    vmov r1, r4, d5294; CHECK-NEXT:    subs.w r1, r1, r8295; CHECK-NEXT:    sbcs r1, r4, #0296; CHECK-NEXT:    csetm r1, lt297; CHECK-NEXT:    bfi r3, r1, #8, #8298; CHECK-NEXT:    vmsr p0, r3299; CHECK-NEXT:    vpsel q2, q2, q1300; CHECK-NEXT:    vmov.f32 s9, s10301; CHECK-NEXT:    vmov.f32 s10, s16302; CHECK-NEXT:    vmov.f32 s11, s18303; CHECK-NEXT:    vstrb.8 q2, [r2], #16304; CHECK-NEXT:    le lr, .LBB1_4305; CHECK-NEXT:  @ %bb.5: @ %middle.block306; CHECK-NEXT:    ldrd r1, r3, [sp] @ 8-byte Folded Reload307; CHECK-NEXT:    cmp r1, r3308; CHECK-NEXT:    beq .LBB1_8309; CHECK-NEXT:  .LBB1_6: @ %for.body.preheader21310; CHECK-NEXT:    sub.w lr, r3, r1311; CHECK-NEXT:    mov.w r0, #-1312; CHECK-NEXT:    mov.w r3, #-2147483648313; CHECK-NEXT:    mvn r2, #-2147483648314; CHECK-NEXT:  .LBB1_7: @ %for.body315; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1316; CHECK-NEXT:    ldr r1, [r12], #4317; CHECK-NEXT:    ldr r4, [r9], #4318; CHECK-NEXT:    smull r4, r1, r4, r1319; CHECK-NEXT:    asrl r4, r1, #31320; CHECK-NEXT:    subs r5, r3, r4321; CHECK-NEXT:    sbcs.w r5, r0, r1322; CHECK-NEXT:    csel r4, r4, r3, lt323; CHECK-NEXT:    csel r1, r1, r0, lt324; CHECK-NEXT:    subs r5, r4, r2325; CHECK-NEXT:    sbcs r1, r1, #0326; CHECK-NEXT:    csel r1, r4, r2, lt327; CHECK-NEXT:    str r1, [r11], #4328; CHECK-NEXT:    le lr, .LBB1_7329; CHECK-NEXT:  .LBB1_8: @ %for.cond.cleanup330; CHECK-NEXT:    add sp, #16331; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13}332; CHECK-NEXT:    add sp, #4333; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}334; CHECK-NEXT:    .p2align 4335; CHECK-NEXT:  @ %bb.9:336; CHECK-NEXT:  .LCPI1_0:337; CHECK-NEXT:    .long 2147483648 @ 0x80000000338; CHECK-NEXT:    .long 4294967295 @ 0xffffffff339; CHECK-NEXT:    .long 2147483648 @ 0x80000000340; CHECK-NEXT:    .long 4294967295 @ 0xffffffff341; CHECK-NEXT:  .LCPI1_1:342; CHECK-NEXT:    .long 2147483647 @ 0x7fffffff343; CHECK-NEXT:    .long 0 @ 0x0344; CHECK-NEXT:    .long 2147483647 @ 0x7fffffff345; CHECK-NEXT:    .long 0 @ 0x0346entry:347  %cmp8 = icmp eq i32 %N, 0348  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader349 350for.body.preheader:                               ; preds = %entry351  %min.iters.check = icmp ult i32 %N, 4352  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph353 354for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader355  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]356  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]357  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]358  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]359  br label %for.body360 361vector.ph:                                        ; preds = %for.body.preheader362  %n.vec = and i32 %N, -4363  %ind.end = getelementptr i32, ptr %pSrcA, i32 %n.vec364  %ind.end15 = getelementptr i32, ptr %pSrcB, i32 %n.vec365  %ind.end17 = getelementptr i32, ptr %pDst, i32 %n.vec366  br label %vector.body367 368vector.body:                                      ; preds = %vector.body, %vector.ph369  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]370  %next.gep = getelementptr i32, ptr %pSrcA, i32 %index371  %next.gep18 = getelementptr i32, ptr %pSrcB, i32 %index372  %next.gep19 = getelementptr i32, ptr %pDst, i32 %index373  %wide.load = load <4 x i32>, ptr %next.gep, align 4374  %0 = sext <4 x i32> %wide.load to <4 x i64>375  %wide.load20 = load <4 x i32>, ptr %next.gep18, align 4376  %1 = sext <4 x i32> %wide.load20 to <4 x i64>377  %2 = mul nsw <4 x i64> %1, %0378  %3 = ashr <4 x i64> %2, <i64 31, i64 31, i64 31, i64 31>379  %4 = icmp sgt <4 x i64> %3, <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>380  %5 = select <4 x i1> %4, <4 x i64> %3, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>381  %6 = icmp slt <4 x i64> %5, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>382  %7 = select <4 x i1> %6, <4 x i64> %5, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>383  %8 = trunc <4 x i64> %7 to <4 x i32>384  store <4 x i32> %8, ptr %next.gep19, align 4385  %index.next = add i32 %index, 4386  %9 = icmp eq i32 %index.next, %n.vec387  br i1 %9, label %middle.block, label %vector.body388 389middle.block:                                     ; preds = %vector.body390  %cmp.n = icmp eq i32 %n.vec, %N391  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader21392 393for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry394  ret void395 396for.body:                                         ; preds = %for.body.preheader21, %for.body397  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]398  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]399  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]400  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]401  %incdec.ptr = getelementptr inbounds i32, ptr %pSrcA.addr.011, i32 1402  %10 = load i32, ptr %pSrcA.addr.011, align 4403  %conv = sext i32 %10 to i64404  %incdec.ptr1 = getelementptr inbounds i32, ptr %pSrcB.addr.010, i32 1405  %11 = load i32, ptr %pSrcB.addr.010, align 4406  %conv2 = sext i32 %11 to i64407  %mul = mul nsw i64 %conv2, %conv408  %shr = ashr i64 %mul, 31409  %12 = icmp sgt i64 %shr, -2147483648410  %.val.i = select i1 %12, i64 %shr, i64 -2147483648411  %13 = icmp slt i64 %.val.i, 2147483647412  %retval.0.i = select i1 %13, i64 %.val.i, i64 2147483647413  %conv3 = trunc i64 %retval.0.i to i32414  %incdec.ptr4 = getelementptr inbounds i32, ptr %pDst.addr.09, i32 1415  store i32 %conv3, ptr %pDst.addr.09, align 4416  %inc = add nuw i32 %i.012, 1417  %exitcond = icmp eq i32 %inc, %N418  br i1 %exitcond, label %for.cond.cleanup, label %for.body419}420 421define arm_aapcs_vfpcc void @ssatmul_4t_q31(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {422; CHECK-LABEL: ssatmul_4t_q31:423; CHECK:       @ %bb.0: @ %entry424; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, lr}425; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, lr}426; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13, d14, d15}427; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13, d14, d15}428; CHECK-NEXT:    .pad #24429; CHECK-NEXT:    sub sp, #24430; CHECK-NEXT:    cmp r3, #0431; CHECK-NEXT:    beq.w .LBB2_3432; CHECK-NEXT:  @ %bb.1: @ %vector.ph433; CHECK-NEXT:    adds r6, r3, #3434; CHECK-NEXT:    movs r5, #1435; CHECK-NEXT:    bic r6, r6, #3436; CHECK-NEXT:    adr r4, .LCPI2_1437; CHECK-NEXT:    subs r6, #4438; CHECK-NEXT:    vldrw.u32 q2, [r4]439; CHECK-NEXT:    mov.w r9, #0440; CHECK-NEXT:    mov.w r12, #-1441; CHECK-NEXT:    add.w lr, r5, r6, lsr #2442; CHECK-NEXT:    adr r5, .LCPI2_0443; CHECK-NEXT:    vldrw.u32 q0, [r5]444; CHECK-NEXT:    adr r5, .LCPI2_2445; CHECK-NEXT:    subs r6, r3, #1446; CHECK-NEXT:    vldrw.u32 q3, [r5]447; CHECK-NEXT:    vdup.32 q1, r6448; CHECK-NEXT:    mvn r8, #-2147483648449; CHECK-NEXT:    vstrw.32 q0, [sp] @ 16-byte Spill450; CHECK-NEXT:  .LBB2_2: @ %vector.body451; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1452; CHECK-NEXT:    vldrw.u32 q0, [sp] @ 16-byte Reload453; CHECK-NEXT:    vdup.32 q4, r9454; CHECK-NEXT:    movs r4, #0455; CHECK-NEXT:    add.w r9, r9, #4456; CHECK-NEXT:    vorr q4, q4, q0457; CHECK-NEXT:    vcmp.u32 cs, q1, q4458; CHECK-NEXT:    vstr p0, [sp, #20] @ 4-byte Spill459; CHECK-NEXT:    vpstt460; CHECK-NEXT:    vldrwt.u32 q4, [r0], #16461; CHECK-NEXT:    vldrwt.u32 q5, [r1], #16462; CHECK-NEXT:    vmov.f32 s24, s18463; CHECK-NEXT:    vmov.f32 s26, s19464; CHECK-NEXT:    vmov.f32 s28, s22465; CHECK-NEXT:    vmov.f32 s30, s23466; CHECK-NEXT:    vmullb.s32 q0, q7, q6467; CHECK-NEXT:    vmov.f32 s18, s21468; CHECK-NEXT:    vmov r10, r5, d0469; CHECK-NEXT:    asrl r10, r5, #31470; CHECK-NEXT:    rsbs.w r7, r10, #-2147483648471; CHECK-NEXT:    sbcs.w r7, r12, r5472; CHECK-NEXT:    csetm r7, lt473; CHECK-NEXT:    bfi r4, r7, #0, #8474; CHECK-NEXT:    vmov r6, r7, d1475; CHECK-NEXT:    asrl r6, r7, #31476; CHECK-NEXT:    rsbs.w r3, r6, #-2147483648477; CHECK-NEXT:    vmov q0[2], q0[0], r10, r6478; CHECK-NEXT:    sbcs.w r3, r12, r7479; CHECK-NEXT:    vmov q0[3], q0[1], r5, r7480; CHECK-NEXT:    csetm r3, lt481; CHECK-NEXT:    vmov r7, s18482; CHECK-NEXT:    bfi r4, r3, #8, #8483; CHECK-NEXT:    vmsr p0, r4484; CHECK-NEXT:    vpsel q0, q0, q2485; CHECK-NEXT:    vmov r3, r4, d0486; CHECK-NEXT:    subs.w r3, r3, r8487; CHECK-NEXT:    sbcs r3, r4, #0488; CHECK-NEXT:    mov.w r4, #0489; CHECK-NEXT:    csetm r3, lt490; CHECK-NEXT:    bfi r4, r3, #0, #8491; CHECK-NEXT:    vmov r3, r5, d1492; CHECK-NEXT:    subs.w r3, r3, r8493; CHECK-NEXT:    sbcs r3, r5, #0494; CHECK-NEXT:    csetm r3, lt495; CHECK-NEXT:    bfi r4, r3, #8, #8496; CHECK-NEXT:    vmov r3, s16497; CHECK-NEXT:    vmsr p0, r4498; CHECK-NEXT:    vmov r4, s20499; CHECK-NEXT:    vpsel q6, q0, q3500; CHECK-NEXT:    vmov.f32 s2, s17501; CHECK-NEXT:    smull r10, r5, r4, r3502; CHECK-NEXT:    movs r4, #0503; CHECK-NEXT:    asrl r10, r5, #31504; CHECK-NEXT:    rsbs.w r3, r10, #-2147483648505; CHECK-NEXT:    sbcs.w r3, r12, r5506; CHECK-NEXT:    csetm r3, lt507; CHECK-NEXT:    bfi r4, r3, #0, #8508; CHECK-NEXT:    vmov r3, s2509; CHECK-NEXT:    smull r6, r3, r7, r3510; CHECK-NEXT:    asrl r6, r3, #31511; CHECK-NEXT:    rsbs.w r7, r6, #-2147483648512; CHECK-NEXT:    vmov q0[2], q0[0], r10, r6513; CHECK-NEXT:    sbcs.w r7, r12, r3514; CHECK-NEXT:    vmov q0[3], q0[1], r5, r3515; CHECK-NEXT:    csetm r7, lt516; CHECK-NEXT:    bfi r4, r7, #8, #8517; CHECK-NEXT:    vmsr p0, r4518; CHECK-NEXT:    vpsel q0, q0, q2519; CHECK-NEXT:    vmov r3, r4, d0520; CHECK-NEXT:    subs.w r3, r3, r8521; CHECK-NEXT:    sbcs r3, r4, #0522; CHECK-NEXT:    mov.w r4, #0523; CHECK-NEXT:    csetm r3, lt524; CHECK-NEXT:    bfi r4, r3, #0, #8525; CHECK-NEXT:    vmov r3, r5, d1526; CHECK-NEXT:    subs.w r3, r3, r8527; CHECK-NEXT:    sbcs r3, r5, #0528; CHECK-NEXT:    csetm r3, lt529; CHECK-NEXT:    bfi r4, r3, #8, #8530; CHECK-NEXT:    vmsr p0, r4531; CHECK-NEXT:    vpsel q0, q0, q3532; CHECK-NEXT:    vldr p0, [sp, #20] @ 4-byte Reload533; CHECK-NEXT:    vmov.f32 s1, s2534; CHECK-NEXT:    vmov.f32 s2, s24535; CHECK-NEXT:    vmov.f32 s3, s26536; CHECK-NEXT:    vpst537; CHECK-NEXT:    vstrwt.32 q0, [r2], #16538; CHECK-NEXT:    le lr, .LBB2_2539; CHECK-NEXT:  .LBB2_3: @ %for.cond.cleanup540; CHECK-NEXT:    add sp, #24541; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13, d14, d15}542; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, pc}543; CHECK-NEXT:    .p2align 4544; CHECK-NEXT:  @ %bb.4:545; CHECK-NEXT:  .LCPI2_0:546; CHECK-NEXT:    .long 0 @ 0x0547; CHECK-NEXT:    .long 1 @ 0x1548; CHECK-NEXT:    .long 2 @ 0x2549; CHECK-NEXT:    .long 3 @ 0x3550; CHECK-NEXT:  .LCPI2_1:551; CHECK-NEXT:    .long 2147483648 @ 0x80000000552; CHECK-NEXT:    .long 4294967295 @ 0xffffffff553; CHECK-NEXT:    .long 2147483648 @ 0x80000000554; CHECK-NEXT:    .long 4294967295 @ 0xffffffff555; CHECK-NEXT:  .LCPI2_2:556; CHECK-NEXT:    .long 2147483647 @ 0x7fffffff557; CHECK-NEXT:    .long 0 @ 0x0558; CHECK-NEXT:    .long 2147483647 @ 0x7fffffff559; CHECK-NEXT:    .long 0 @ 0x0560entry:561  %cmp8 = icmp eq i32 %N, 0562  br i1 %cmp8, label %for.cond.cleanup, label %vector.ph563 564vector.ph:                                        ; preds = %entry565  %n.rnd.up = add i32 %N, 3566  %n.vec = and i32 %n.rnd.up, -4567  %trip.count.minus.1 = add i32 %N, -1568  %broadcast.splatinsert20 = insertelement <4 x i32> undef, i32 %trip.count.minus.1, i32 0569  %broadcast.splat21 = shufflevector <4 x i32> %broadcast.splatinsert20, <4 x i32> undef, <4 x i32> zeroinitializer570  br label %vector.body571 572vector.body:                                      ; preds = %vector.body, %vector.ph573  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]574  %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 0575  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer576  %induction = or <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3>577  %next.gep = getelementptr i32, ptr %pSrcA, i32 %index578  %next.gep18 = getelementptr i32, ptr %pSrcB, i32 %index579  %next.gep19 = getelementptr i32, ptr %pDst, i32 %index580  %0 = icmp ule <4 x i32> %induction, %broadcast.splat21581  %wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %next.gep, i32 4, <4 x i1> %0, <4 x i32> undef)582  %1 = sext <4 x i32> %wide.masked.load to <4 x i64>583  %wide.masked.load22 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %next.gep18, i32 4, <4 x i1> %0, <4 x i32> undef)584  %2 = sext <4 x i32> %wide.masked.load22 to <4 x i64>585  %3 = mul nsw <4 x i64> %2, %1586  %4 = ashr <4 x i64> %3, <i64 31, i64 31, i64 31, i64 31>587  %5 = icmp sgt <4 x i64> %4, <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>588  %6 = select <4 x i1> %5, <4 x i64> %4, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>589  %7 = icmp slt <4 x i64> %6, <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>590  %8 = select <4 x i1> %7, <4 x i64> %6, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>591  %9 = trunc <4 x i64> %8 to <4 x i32>592  call void @llvm.masked.store.v4i32.p0(<4 x i32> %9, ptr %next.gep19, i32 4, <4 x i1> %0)593  %index.next = add i32 %index, 4594  %10 = icmp eq i32 %index.next, %n.vec595  br i1 %10, label %for.cond.cleanup, label %vector.body596 597for.cond.cleanup:                                 ; preds = %vector.body, %entry598  ret void599}600 601define arm_aapcs_vfpcc void @usatmul_2_q31(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {602; CHECK-LABEL: usatmul_2_q31:603; CHECK:       @ %bb.0: @ %entry604; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}605; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}606; CHECK-NEXT:    .pad #4607; CHECK-NEXT:    sub sp, #4608; CHECK-NEXT:    cmp r3, #0609; CHECK-NEXT:    beq .LBB3_8610; CHECK-NEXT:  @ %bb.1: @ %entry611; CHECK-NEXT:    mov r8, r2612; CHECK-NEXT:    cmp r3, #1613; CHECK-NEXT:    bne .LBB3_3614; CHECK-NEXT:  @ %bb.2:615; CHECK-NEXT:    movs r7, #0616; CHECK-NEXT:    mov r12, r0617; CHECK-NEXT:    mov r11, r1618; CHECK-NEXT:    mov r2, r8619; CHECK-NEXT:    b .LBB3_6620; CHECK-NEXT:  .LBB3_3: @ %vector.ph621; CHECK-NEXT:    bic r5, r3, #1622; CHECK-NEXT:    movs r6, #1623; CHECK-NEXT:    subs r7, r5, #2624; CHECK-NEXT:    str r5, [sp] @ 4-byte Spill625; CHECK-NEXT:    add.w r2, r8, r5, lsl #2626; CHECK-NEXT:    add.w r11, r1, r5, lsl #2627; CHECK-NEXT:    add.w lr, r6, r7, lsr #1628; CHECK-NEXT:    add.w r12, r0, r5, lsl #2629; CHECK-NEXT:    vmov.i8 q0, #0xff630; CHECK-NEXT:  .LBB3_4: @ %vector.body631; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1632; CHECK-NEXT:    ldrd r4, r9, [r0], #8633; CHECK-NEXT:    ldrd r5, r10, [r1], #8634; CHECK-NEXT:    umull r4, r5, r5, r4635; CHECK-NEXT:    lsrl r4, r5, #31636; CHECK-NEXT:    subs.w r6, r4, #-1637; CHECK-NEXT:    sbcs r5, r5, #0638; CHECK-NEXT:    mov.w r6, #0639; CHECK-NEXT:    csetm r5, lo640; CHECK-NEXT:    bfi r6, r5, #0, #8641; CHECK-NEXT:    umull r10, r5, r10, r9642; CHECK-NEXT:    lsrl r10, r5, #31643; CHECK-NEXT:    subs.w r7, r10, #-1644; CHECK-NEXT:    vmov q1[2], q1[0], r4, r10645; CHECK-NEXT:    sbcs r5, r5, #0646; CHECK-NEXT:    csetm r5, lo647; CHECK-NEXT:    bfi r6, r5, #8, #8648; CHECK-NEXT:    vmsr p0, r6649; CHECK-NEXT:    vpsel q1, q1, q0650; CHECK-NEXT:    vmov r4, s6651; CHECK-NEXT:    vmov r5, s4652; CHECK-NEXT:    strd r5, r4, [r8], #8653; CHECK-NEXT:    le lr, .LBB3_4654; CHECK-NEXT:  @ %bb.5: @ %middle.block655; CHECK-NEXT:    ldr r7, [sp] @ 4-byte Reload656; CHECK-NEXT:    cmp r7, r3657; CHECK-NEXT:    beq .LBB3_8658; CHECK-NEXT:  .LBB3_6: @ %for.body.preheader659; CHECK-NEXT:    sub.w lr, r3, r7660; CHECK-NEXT:  .LBB3_7: @ %for.body661; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1662; CHECK-NEXT:    ldr r0, [r12], #4663; CHECK-NEXT:    ldr r1, [r11], #4664; CHECK-NEXT:    umull r0, r1, r1, r0665; CHECK-NEXT:    lsrl r0, r1, #31666; CHECK-NEXT:    subs.w r3, r0, #-1667; CHECK-NEXT:    sbcs r1, r1, #0668; CHECK-NEXT:    it hs669; CHECK-NEXT:    movhs.w r0, #-1670; CHECK-NEXT:    str r0, [r2], #4671; CHECK-NEXT:    le lr, .LBB3_7672; CHECK-NEXT:  .LBB3_8: @ %for.cond.cleanup673; CHECK-NEXT:    add sp, #4674; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}675entry:676  switch i32 %N, label %vector.ph [677    i32 0, label %for.cond.cleanup678    i32 1, label %for.body.preheader679  ]680 681vector.ph:                                        ; preds = %entry682  %n.vec = and i32 %N, -2683  %ind.end = getelementptr i32, ptr %pSrcA, i32 %n.vec684  %ind.end15 = getelementptr i32, ptr %pSrcB, i32 %n.vec685  %ind.end17 = getelementptr i32, ptr %pDst, i32 %n.vec686  br label %vector.body687 688vector.body:                                      ; preds = %vector.body, %vector.ph689  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]690  %next.gep = getelementptr i32, ptr %pSrcA, i32 %index691  %next.gep18 = getelementptr i32, ptr %pSrcB, i32 %index692  %next.gep19 = getelementptr i32, ptr %pDst, i32 %index693  %wide.load = load <2 x i32>, ptr %next.gep, align 4694  %0 = zext <2 x i32> %wide.load to <2 x i64>695  %wide.load20 = load <2 x i32>, ptr %next.gep18, align 4696  %1 = zext <2 x i32> %wide.load20 to <2 x i64>697  %2 = mul nuw <2 x i64> %1, %0698  %3 = lshr <2 x i64> %2, <i64 31, i64 31>699  %4 = icmp ult <2 x i64> %3, <i64 4294967295, i64 4294967295>700  %5 = select <2 x i1> %4, <2 x i64> %3, <2 x i64> <i64 4294967295, i64 4294967295>701  %6 = trunc <2 x i64> %5 to <2 x i32>702  store <2 x i32> %6, ptr %next.gep19, align 4703  %index.next = add i32 %index, 2704  %7 = icmp eq i32 %index.next, %n.vec705  br i1 %7, label %middle.block, label %vector.body706 707middle.block:                                     ; preds = %vector.body708  %cmp.n = icmp eq i32 %n.vec, %N709  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader710 711for.body.preheader:                               ; preds = %entry, %middle.block712  %i.012.ph = phi i32 [ 0, %entry ], [ %n.vec, %middle.block ]713  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %entry ], [ %ind.end, %middle.block ]714  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %entry ], [ %ind.end15, %middle.block ]715  %pDst.addr.09.ph = phi ptr [ %pDst, %entry ], [ %ind.end17, %middle.block ]716  br label %for.body717 718for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry719  ret void720 721for.body:                                         ; preds = %for.body.preheader, %for.body722  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader ]723  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader ]724  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader ]725  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader ]726  %incdec.ptr = getelementptr inbounds i32, ptr %pSrcA.addr.011, i32 1727  %8 = load i32, ptr %pSrcA.addr.011, align 4728  %conv = zext i32 %8 to i64729  %incdec.ptr1 = getelementptr inbounds i32, ptr %pSrcB.addr.010, i32 1730  %9 = load i32, ptr %pSrcB.addr.010, align 4731  %conv2 = zext i32 %9 to i64732  %mul = mul nuw i64 %conv2, %conv733  %shr = lshr i64 %mul, 31734  %10 = icmp ult i64 %shr, 4294967295735  %retval.0.i = select i1 %10, i64 %shr, i64 4294967295736  %conv3 = trunc i64 %retval.0.i to i32737  %incdec.ptr4 = getelementptr inbounds i32, ptr %pDst.addr.09, i32 1738  store i32 %conv3, ptr %pDst.addr.09, align 4739  %inc = add nuw i32 %i.012, 1740  %exitcond = icmp eq i32 %inc, %N741  br i1 %exitcond, label %for.cond.cleanup, label %for.body742}743 744define arm_aapcs_vfpcc void @usatmul_4_q31(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {745; CHECK-LABEL: usatmul_4_q31:746; CHECK:       @ %bb.0: @ %entry747; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}748; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}749; CHECK-NEXT:    .pad #4750; CHECK-NEXT:    sub sp, #4751; CHECK-NEXT:    .vsave {d8, d9, d10, d11}752; CHECK-NEXT:    vpush {d8, d9, d10, d11}753; CHECK-NEXT:    cmp r3, #0754; CHECK-NEXT:    beq.w .LBB4_8755; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader756; CHECK-NEXT:    mov.w r8, #0757; CHECK-NEXT:    cmp r3, #3758; CHECK-NEXT:    bhi .LBB4_3759; CHECK-NEXT:  @ %bb.2:760; CHECK-NEXT:    mov r12, r0761; CHECK-NEXT:    mov r9, r1762; CHECK-NEXT:    mov r11, r2763; CHECK-NEXT:    b .LBB4_6764; CHECK-NEXT:  .LBB4_3: @ %vector.ph765; CHECK-NEXT:    bic r8, r3, #3766; CHECK-NEXT:    movs r6, #1767; CHECK-NEXT:    sub.w r7, r8, #4768; CHECK-NEXT:    vmov.i64 q0, #0xffffffff769; CHECK-NEXT:    add.w r11, r2, r8, lsl #2770; CHECK-NEXT:    add.w r9, r1, r8, lsl #2771; CHECK-NEXT:    add.w lr, r6, r7, lsr #2772; CHECK-NEXT:    add.w r12, r0, r8, lsl #2773; CHECK-NEXT:  .LBB4_4: @ %vector.body774; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1775; CHECK-NEXT:    vldrw.u32 q1, [r0], #16776; CHECK-NEXT:    vldrw.u32 q2, [r1], #16777; CHECK-NEXT:    vmov.f32 s12, s6778; CHECK-NEXT:    vmov.f32 s14, s7779; CHECK-NEXT:    vmov.f32 s16, s10780; CHECK-NEXT:    vmov.f32 s18, s11781; CHECK-NEXT:    vmullb.u32 q5, q4, q3782; CHECK-NEXT:    vmov.f32 s6, s5783; CHECK-NEXT:    vmov r10, r5, d10784; CHECK-NEXT:    lsrl r10, r5, #31785; CHECK-NEXT:    vmov.f32 s10, s9786; CHECK-NEXT:    subs.w r6, r10, #-1787; CHECK-NEXT:    sbcs r5, r5, #0788; CHECK-NEXT:    mov.w r6, #0789; CHECK-NEXT:    csetm r5, lo790; CHECK-NEXT:    vmullb.u32 q4, q2, q1791; CHECK-NEXT:    bfi r6, r5, #0, #8792; CHECK-NEXT:    vmov r4, r5, d11793; CHECK-NEXT:    lsrl r4, r5, #31794; CHECK-NEXT:    subs.w r7, r4, #-1795; CHECK-NEXT:    vmov q3[2], q3[0], r10, r4796; CHECK-NEXT:    sbcs r5, r5, #0797; CHECK-NEXT:    csetm r5, lo798; CHECK-NEXT:    bfi r6, r5, #8, #8799; CHECK-NEXT:    vmov r10, r5, d8800; CHECK-NEXT:    lsrl r10, r5, #31801; CHECK-NEXT:    vmsr p0, r6802; CHECK-NEXT:    subs.w r6, r10, #-1803; CHECK-NEXT:    vpsel q3, q3, q0804; CHECK-NEXT:    sbcs r5, r5, #0805; CHECK-NEXT:    mov.w r6, #0806; CHECK-NEXT:    csetm r5, lo807; CHECK-NEXT:    bfi r6, r5, #0, #8808; CHECK-NEXT:    vmov r4, r5, d9809; CHECK-NEXT:    lsrl r4, r5, #31810; CHECK-NEXT:    subs.w r7, r4, #-1811; CHECK-NEXT:    vmov q1[2], q1[0], r10, r4812; CHECK-NEXT:    sbcs r5, r5, #0813; CHECK-NEXT:    csetm r5, lo814; CHECK-NEXT:    bfi r6, r5, #8, #8815; CHECK-NEXT:    vmsr p0, r6816; CHECK-NEXT:    vpsel q1, q1, q0817; CHECK-NEXT:    vmov.f32 s5, s6818; CHECK-NEXT:    vmov.f32 s6, s12819; CHECK-NEXT:    vmov.f32 s7, s14820; CHECK-NEXT:    vstrb.8 q1, [r2], #16821; CHECK-NEXT:    le lr, .LBB4_4822; CHECK-NEXT:  @ %bb.5: @ %middle.block823; CHECK-NEXT:    cmp r8, r3824; CHECK-NEXT:    beq .LBB4_8825; CHECK-NEXT:  .LBB4_6: @ %for.body.preheader21826; CHECK-NEXT:    sub.w lr, r3, r8827; CHECK-NEXT:  .LBB4_7: @ %for.body828; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1829; CHECK-NEXT:    ldr r0, [r12], #4830; CHECK-NEXT:    ldr r1, [r9], #4831; CHECK-NEXT:    umull r0, r1, r1, r0832; CHECK-NEXT:    lsrl r0, r1, #31833; CHECK-NEXT:    subs.w r2, r0, #-1834; CHECK-NEXT:    sbcs r1, r1, #0835; CHECK-NEXT:    it hs836; CHECK-NEXT:    movhs.w r0, #-1837; CHECK-NEXT:    str r0, [r11], #4838; CHECK-NEXT:    le lr, .LBB4_7839; CHECK-NEXT:  .LBB4_8: @ %for.cond.cleanup840; CHECK-NEXT:    vpop {d8, d9, d10, d11}841; CHECK-NEXT:    add sp, #4842; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}843entry:844  %cmp8 = icmp eq i32 %N, 0845  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader846 847for.body.preheader:                               ; preds = %entry848  %min.iters.check = icmp ult i32 %N, 4849  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph850 851for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader852  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]853  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]854  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]855  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]856  br label %for.body857 858vector.ph:                                        ; preds = %for.body.preheader859  %n.vec = and i32 %N, -4860  %ind.end = getelementptr i32, ptr %pSrcA, i32 %n.vec861  %ind.end15 = getelementptr i32, ptr %pSrcB, i32 %n.vec862  %ind.end17 = getelementptr i32, ptr %pDst, i32 %n.vec863  br label %vector.body864 865vector.body:                                      ; preds = %vector.body, %vector.ph866  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]867  %next.gep = getelementptr i32, ptr %pSrcA, i32 %index868  %next.gep18 = getelementptr i32, ptr %pSrcB, i32 %index869  %next.gep19 = getelementptr i32, ptr %pDst, i32 %index870  %wide.load = load <4 x i32>, ptr %next.gep, align 4871  %0 = zext <4 x i32> %wide.load to <4 x i64>872  %wide.load20 = load <4 x i32>, ptr %next.gep18, align 4873  %1 = zext <4 x i32> %wide.load20 to <4 x i64>874  %2 = mul nuw <4 x i64> %1, %0875  %3 = lshr <4 x i64> %2, <i64 31, i64 31, i64 31, i64 31>876  %4 = icmp ult <4 x i64> %3, <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>877  %5 = select <4 x i1> %4, <4 x i64> %3, <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>878  %6 = trunc <4 x i64> %5 to <4 x i32>879  store <4 x i32> %6, ptr %next.gep19, align 4880  %index.next = add i32 %index, 4881  %7 = icmp eq i32 %index.next, %n.vec882  br i1 %7, label %middle.block, label %vector.body883 884middle.block:                                     ; preds = %vector.body885  %cmp.n = icmp eq i32 %n.vec, %N886  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader21887 888for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry889  ret void890 891for.body:                                         ; preds = %for.body.preheader21, %for.body892  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]893  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]894  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]895  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]896  %incdec.ptr = getelementptr inbounds i32, ptr %pSrcA.addr.011, i32 1897  %8 = load i32, ptr %pSrcA.addr.011, align 4898  %conv = zext i32 %8 to i64899  %incdec.ptr1 = getelementptr inbounds i32, ptr %pSrcB.addr.010, i32 1900  %9 = load i32, ptr %pSrcB.addr.010, align 4901  %conv2 = zext i32 %9 to i64902  %mul = mul nuw i64 %conv2, %conv903  %shr = lshr i64 %mul, 31904  %10 = icmp ult i64 %shr, 4294967295905  %retval.0.i = select i1 %10, i64 %shr, i64 4294967295906  %conv3 = trunc i64 %retval.0.i to i32907  %incdec.ptr4 = getelementptr inbounds i32, ptr %pDst.addr.09, i32 1908  store i32 %conv3, ptr %pDst.addr.09, align 4909  %inc = add nuw i32 %i.012, 1910  %exitcond = icmp eq i32 %inc, %N911  br i1 %exitcond, label %for.cond.cleanup, label %for.body912}913 914 915; i16916 917define arm_aapcs_vfpcc void @ssatmul_4_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {918; CHECK-LABEL: ssatmul_4_q15:919; CHECK:       @ %bb.0: @ %entry920; CHECK-NEXT:    .save {r4, r5, r6, lr}921; CHECK-NEXT:    push {r4, r5, r6, lr}922; CHECK-NEXT:    cbz r3, .LBB5_8923; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader924; CHECK-NEXT:    cmp r3, #3925; CHECK-NEXT:    bhi .LBB5_3926; CHECK-NEXT:  @ %bb.2:927; CHECK-NEXT:    movs r5, #0928; CHECK-NEXT:    mov r12, r0929; CHECK-NEXT:    mov r6, r1930; CHECK-NEXT:    mov r4, r2931; CHECK-NEXT:    b .LBB5_6932; CHECK-NEXT:  .LBB5_3: @ %vector.ph933; CHECK-NEXT:    bic r5, r3, #3934; CHECK-NEXT:    movs r4, #1935; CHECK-NEXT:    subs r6, r5, #4936; CHECK-NEXT:    add.w r12, r0, r5, lsl #1937; CHECK-NEXT:    add.w lr, r4, r6, lsr #2938; CHECK-NEXT:    add.w r4, r2, r5, lsl #1939; CHECK-NEXT:    add.w r6, r1, r5, lsl #1940; CHECK-NEXT:  .LBB5_4: @ %vector.body941; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1942; CHECK-NEXT:    vldrh.s32 q0, [r0], #8943; CHECK-NEXT:    vldrh.s32 q1, [r1], #8944; CHECK-NEXT:    vmul.i32 q0, q1, q0945; CHECK-NEXT:    vqshrnb.s32 q0, q0, #15946; CHECK-NEXT:    vstrh.32 q0, [r2], #8947; CHECK-NEXT:    le lr, .LBB5_4948; CHECK-NEXT:  @ %bb.5: @ %middle.block949; CHECK-NEXT:    cmp r5, r3950; CHECK-NEXT:    it eq951; CHECK-NEXT:    popeq {r4, r5, r6, pc}952; CHECK-NEXT:  .LBB5_6: @ %for.body.preheader21953; CHECK-NEXT:    sub.w lr, r3, r5954; CHECK-NEXT:  .LBB5_7: @ %for.body955; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1956; CHECK-NEXT:    ldrsh r0, [r12], #2957; CHECK-NEXT:    ldrsh r1, [r6], #2958; CHECK-NEXT:    muls r0, r1, r0959; CHECK-NEXT:    ssat r0, #16, r0, asr #15960; CHECK-NEXT:    strh r0, [r4], #2961; CHECK-NEXT:    le lr, .LBB5_7962; CHECK-NEXT:  .LBB5_8: @ %for.cond.cleanup963; CHECK-NEXT:    pop {r4, r5, r6, pc}964entry:965  %cmp8 = icmp eq i32 %N, 0966  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader967 968for.body.preheader:                               ; preds = %entry969  %min.iters.check = icmp ult i32 %N, 4970  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph971 972for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader973  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]974  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]975  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]976  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]977  br label %for.body978 979vector.ph:                                        ; preds = %for.body.preheader980  %n.vec = and i32 %N, -4981  %ind.end = getelementptr i16, ptr %pSrcA, i32 %n.vec982  %ind.end15 = getelementptr i16, ptr %pSrcB, i32 %n.vec983  %ind.end17 = getelementptr i16, ptr %pDst, i32 %n.vec984  br label %vector.body985 986vector.body:                                      ; preds = %vector.body, %vector.ph987  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]988  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index989  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index990  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index991  %wide.load = load <4 x i16>, ptr %next.gep, align 2992  %0 = sext <4 x i16> %wide.load to <4 x i32>993  %wide.load20 = load <4 x i16>, ptr %next.gep18, align 2994  %1 = sext <4 x i16> %wide.load20 to <4 x i32>995  %2 = mul nsw <4 x i32> %1, %0996  %3 = ashr <4 x i32> %2, <i32 15, i32 15, i32 15, i32 15>997  %4 = icmp sgt <4 x i32> %3, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>998  %5 = select <4 x i1> %4, <4 x i32> %3, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>999  %6 = icmp slt <4 x i32> %5, <i32 32767, i32 32767, i32 32767, i32 32767>1000  %7 = select <4 x i1> %6, <4 x i32> %5, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>1001  %8 = trunc <4 x i32> %7 to <4 x i16>1002  store <4 x i16> %8, ptr %next.gep19, align 21003  %index.next = add i32 %index, 41004  %9 = icmp eq i32 %index.next, %n.vec1005  br i1 %9, label %middle.block, label %vector.body1006 1007middle.block:                                     ; preds = %vector.body1008  %cmp.n = icmp eq i32 %n.vec, %N1009  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader211010 1011for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry1012  ret void1013 1014for.body:                                         ; preds = %for.body.preheader21, %for.body1015  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]1016  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]1017  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]1018  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]1019  %incdec.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.011, i32 11020  %10 = load i16, ptr %pSrcA.addr.011, align 21021  %conv = sext i16 %10 to i321022  %incdec.ptr1 = getelementptr inbounds i16, ptr %pSrcB.addr.010, i32 11023  %11 = load i16, ptr %pSrcB.addr.010, align 21024  %conv2 = sext i16 %11 to i321025  %mul = mul nsw i32 %conv2, %conv1026  %shr = ashr i32 %mul, 151027  %12 = icmp sgt i32 %shr, -327681028  %.val.i = select i1 %12, i32 %shr, i32 -327681029  %13 = icmp slt i32 %.val.i, 327671030  %retval.0.i = select i1 %13, i32 %.val.i, i32 327671031  %conv3 = trunc i32 %retval.0.i to i161032  %incdec.ptr4 = getelementptr inbounds i16, ptr %pDst.addr.09, i32 11033  store i16 %conv3, ptr %pDst.addr.09, align 21034  %inc = add nuw i32 %i.012, 11035  %exitcond = icmp eq i32 %inc, %N1036  br i1 %exitcond, label %for.cond.cleanup, label %for.body1037}1038 1039define arm_aapcs_vfpcc void @ssatmul_8_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1040; CHECK-LABEL: ssatmul_8_q15:1041; CHECK:       @ %bb.0: @ %entry1042; CHECK-NEXT:    .save {r4, r5, r6, lr}1043; CHECK-NEXT:    push {r4, r5, r6, lr}1044; CHECK-NEXT:    cbz r3, .LBB6_81045; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader1046; CHECK-NEXT:    cmp r3, #71047; CHECK-NEXT:    bhi .LBB6_31048; CHECK-NEXT:  @ %bb.2:1049; CHECK-NEXT:    movs r5, #01050; CHECK-NEXT:    mov r12, r01051; CHECK-NEXT:    mov r6, r11052; CHECK-NEXT:    mov r4, r21053; CHECK-NEXT:    b .LBB6_61054; CHECK-NEXT:  .LBB6_3: @ %vector.ph1055; CHECK-NEXT:    bic r5, r3, #71056; CHECK-NEXT:    movs r4, #11057; CHECK-NEXT:    sub.w r6, r5, #81058; CHECK-NEXT:    add.w r12, r0, r5, lsl #11059; CHECK-NEXT:    add.w lr, r4, r6, lsr #31060; CHECK-NEXT:    add.w r4, r2, r5, lsl #11061; CHECK-NEXT:    add.w r6, r1, r5, lsl #11062; CHECK-NEXT:  .LBB6_4: @ %vector.body1063; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11064; CHECK-NEXT:    vldrh.u16 q0, [r0], #161065; CHECK-NEXT:    vldrh.u16 q1, [r1], #161066; CHECK-NEXT:    vmullt.s16 q2, q1, q01067; CHECK-NEXT:    vmullb.s16 q0, q1, q01068; CHECK-NEXT:    vqshrnb.s32 q0, q0, #151069; CHECK-NEXT:    vqshrnt.s32 q0, q2, #151070; CHECK-NEXT:    vstrb.8 q0, [r2], #161071; CHECK-NEXT:    le lr, .LBB6_41072; CHECK-NEXT:  @ %bb.5: @ %middle.block1073; CHECK-NEXT:    cmp r5, r31074; CHECK-NEXT:    it eq1075; CHECK-NEXT:    popeq {r4, r5, r6, pc}1076; CHECK-NEXT:  .LBB6_6: @ %for.body.preheader211077; CHECK-NEXT:    sub.w lr, r3, r51078; CHECK-NEXT:  .LBB6_7: @ %for.body1079; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11080; CHECK-NEXT:    ldrsh r0, [r12], #21081; CHECK-NEXT:    ldrsh r1, [r6], #21082; CHECK-NEXT:    muls r0, r1, r01083; CHECK-NEXT:    ssat r0, #16, r0, asr #151084; CHECK-NEXT:    strh r0, [r4], #21085; CHECK-NEXT:    le lr, .LBB6_71086; CHECK-NEXT:  .LBB6_8: @ %for.cond.cleanup1087; CHECK-NEXT:    pop {r4, r5, r6, pc}1088entry:1089  %cmp8 = icmp eq i32 %N, 01090  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader1091 1092for.body.preheader:                               ; preds = %entry1093  %min.iters.check = icmp ult i32 %N, 81094  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph1095 1096for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader1097  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]1098  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]1099  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]1100  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]1101  br label %for.body1102 1103vector.ph:                                        ; preds = %for.body.preheader1104  %n.vec = and i32 %N, -81105  %ind.end = getelementptr i16, ptr %pSrcA, i32 %n.vec1106  %ind.end15 = getelementptr i16, ptr %pSrcB, i32 %n.vec1107  %ind.end17 = getelementptr i16, ptr %pDst, i32 %n.vec1108  br label %vector.body1109 1110vector.body:                                      ; preds = %vector.body, %vector.ph1111  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1112  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index1113  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index1114  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index1115  %wide.load = load <8 x i16>, ptr %next.gep, align 21116  %0 = sext <8 x i16> %wide.load to <8 x i32>1117  %wide.load20 = load <8 x i16>, ptr %next.gep18, align 21118  %1 = sext <8 x i16> %wide.load20 to <8 x i32>1119  %2 = mul nsw <8 x i32> %1, %01120  %3 = ashr <8 x i32> %2, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>1121  %4 = icmp sgt <8 x i32> %3, <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>1122  %5 = select <8 x i1> %4, <8 x i32> %3, <8 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>1123  %6 = icmp slt <8 x i32> %5, <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>1124  %7 = select <8 x i1> %6, <8 x i32> %5, <8 x i32> <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>1125  %8 = trunc <8 x i32> %7 to <8 x i16>1126  store <8 x i16> %8, ptr %next.gep19, align 21127  %index.next = add i32 %index, 81128  %9 = icmp eq i32 %index.next, %n.vec1129  br i1 %9, label %middle.block, label %vector.body1130 1131middle.block:                                     ; preds = %vector.body1132  %cmp.n = icmp eq i32 %n.vec, %N1133  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader211134 1135for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry1136  ret void1137 1138for.body:                                         ; preds = %for.body.preheader21, %for.body1139  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]1140  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]1141  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]1142  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]1143  %incdec.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.011, i32 11144  %10 = load i16, ptr %pSrcA.addr.011, align 21145  %conv = sext i16 %10 to i321146  %incdec.ptr1 = getelementptr inbounds i16, ptr %pSrcB.addr.010, i32 11147  %11 = load i16, ptr %pSrcB.addr.010, align 21148  %conv2 = sext i16 %11 to i321149  %mul = mul nsw i32 %conv2, %conv1150  %shr = ashr i32 %mul, 151151  %12 = icmp sgt i32 %shr, -327681152  %.val.i = select i1 %12, i32 %shr, i32 -327681153  %13 = icmp slt i32 %.val.i, 327671154  %retval.0.i = select i1 %13, i32 %.val.i, i32 327671155  %conv3 = trunc i32 %retval.0.i to i161156  %incdec.ptr4 = getelementptr inbounds i16, ptr %pDst.addr.09, i32 11157  store i16 %conv3, ptr %pDst.addr.09, align 21158  %inc = add nuw i32 %i.012, 11159  %exitcond = icmp eq i32 %inc, %N1160  br i1 %exitcond, label %for.cond.cleanup, label %for.body1161}1162 1163define arm_aapcs_vfpcc void @ssatmul_8i_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1164; CHECK-LABEL: ssatmul_8i_q15:1165; CHECK:       @ %bb.0: @ %entry1166; CHECK-NEXT:    .save {r4, r5, r6, lr}1167; CHECK-NEXT:    push {r4, r5, r6, lr}1168; CHECK-NEXT:    cbz r3, .LBB7_81169; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader1170; CHECK-NEXT:    cmp r3, #71171; CHECK-NEXT:    bhi .LBB7_31172; CHECK-NEXT:  @ %bb.2:1173; CHECK-NEXT:    movs r5, #01174; CHECK-NEXT:    mov r12, r01175; CHECK-NEXT:    mov r6, r11176; CHECK-NEXT:    mov r4, r21177; CHECK-NEXT:    b .LBB7_61178; CHECK-NEXT:  .LBB7_3: @ %vector.ph1179; CHECK-NEXT:    bic r5, r3, #71180; CHECK-NEXT:    movs r4, #11181; CHECK-NEXT:    sub.w r6, r5, #81182; CHECK-NEXT:    add.w r12, r0, r5, lsl #11183; CHECK-NEXT:    add.w lr, r4, r6, lsr #31184; CHECK-NEXT:    add.w r4, r2, r5, lsl #11185; CHECK-NEXT:    add.w r6, r1, r5, lsl #11186; CHECK-NEXT:  .LBB7_4: @ %vector.body1187; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11188; CHECK-NEXT:    vldrh.u16 q0, [r0], #161189; CHECK-NEXT:    vldrh.u16 q1, [r1], #161190; CHECK-NEXT:    vmullt.s16 q2, q1, q01191; CHECK-NEXT:    vmullb.s16 q0, q1, q01192; CHECK-NEXT:    vqshrnb.s32 q0, q0, #151193; CHECK-NEXT:    vqshrnt.s32 q0, q2, #151194; CHECK-NEXT:    vstrb.8 q0, [r2], #161195; CHECK-NEXT:    le lr, .LBB7_41196; CHECK-NEXT:  @ %bb.5: @ %middle.block1197; CHECK-NEXT:    cmp r5, r31198; CHECK-NEXT:    it eq1199; CHECK-NEXT:    popeq {r4, r5, r6, pc}1200; CHECK-NEXT:  .LBB7_6: @ %for.body.preheader211201; CHECK-NEXT:    sub.w lr, r3, r51202; CHECK-NEXT:  .LBB7_7: @ %for.body1203; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11204; CHECK-NEXT:    ldrsh r0, [r12], #21205; CHECK-NEXT:    ldrsh r1, [r6], #21206; CHECK-NEXT:    muls r0, r1, r01207; CHECK-NEXT:    ssat r0, #16, r0, asr #151208; CHECK-NEXT:    strh r0, [r4], #21209; CHECK-NEXT:    le lr, .LBB7_71210; CHECK-NEXT:  .LBB7_8: @ %for.cond.cleanup1211; CHECK-NEXT:    pop {r4, r5, r6, pc}1212entry:1213  %cmp8 = icmp eq i32 %N, 01214  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader1215 1216for.body.preheader:                               ; preds = %entry1217  %min.iters.check = icmp ult i32 %N, 81218  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph1219 1220for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader1221  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]1222  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]1223  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]1224  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]1225  br label %for.body1226 1227vector.ph:                                        ; preds = %for.body.preheader1228  %n.vec = and i32 %N, -81229  %ind.end = getelementptr i16, ptr %pSrcA, i32 %n.vec1230  %ind.end15 = getelementptr i16, ptr %pSrcB, i32 %n.vec1231  %ind.end17 = getelementptr i16, ptr %pDst, i32 %n.vec1232  br label %vector.body1233 1234vector.body:                                      ; preds = %vector.body, %vector.ph1235  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1236  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index1237  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index1238  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index1239  %wide.load = load <8 x i16>, ptr %next.gep, align 21240  %0 = shufflevector <8 x i16> %wide.load, <8 x i16> %wide.load, <4 x i32> <i32 0, i32 2, i32 4, i32 6>1241  %1 = shufflevector <8 x i16> %wide.load, <8 x i16> %wide.load, <4 x i32> <i32 1, i32 3, i32 5, i32 7>1242  %2 = sext <4 x i16> %0 to <4 x i32>1243  %3 = sext <4 x i16> %1 to <4 x i32>1244  %wide.load20 = load <8 x i16>, ptr %next.gep18, align 21245  %4 = shufflevector <8 x i16> %wide.load20, <8 x i16> %wide.load20, <4 x i32> <i32 0, i32 2, i32 4, i32 6>1246  %5 = shufflevector <8 x i16> %wide.load20, <8 x i16> %wide.load20, <4 x i32> <i32 1, i32 3, i32 5, i32 7>1247  %6 = sext <4 x i16> %4 to <4 x i32>1248  %7 = sext <4 x i16> %5 to <4 x i32>1249  %8 = mul <4 x i32> %6, %21250  %9 = mul <4 x i32> %7, %31251  %10 = ashr <4 x i32> %8, <i32 15, i32 15, i32 15, i32 15>1252  %11 = ashr <4 x i32> %9, <i32 15, i32 15, i32 15, i32 15>1253  %12 = icmp sgt <4 x i32> %10, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1254  %13 = icmp sgt <4 x i32> %11, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1255  %14 = select <4 x i1> %12, <4 x i32> %10, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1256  %15 = select <4 x i1> %13, <4 x i32> %11, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1257  %16 = icmp slt <4 x i32> %14, <i32 32767, i32 32767, i32 32767, i32 32767>1258  %17 = icmp slt <4 x i32> %15, <i32 32767, i32 32767, i32 32767, i32 32767>1259  %18 = select <4 x i1> %16, <4 x i32> %14, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>1260  %19 = select <4 x i1> %17, <4 x i32> %15, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>1261  %20 = shufflevector <4 x i32> %18, <4 x i32> %19, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>1262  %21 = trunc <8 x i32> %20 to <8 x i16>1263  store <8 x i16> %21, ptr %next.gep19, align 21264  %index.next = add i32 %index, 81265  %22 = icmp eq i32 %index.next, %n.vec1266  br i1 %22, label %middle.block, label %vector.body1267 1268middle.block:                                     ; preds = %vector.body1269  %cmp.n = icmp eq i32 %n.vec, %N1270  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader211271 1272for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry1273  ret void1274 1275for.body:                                         ; preds = %for.body, %for.body.preheader211276  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]1277  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]1278  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]1279  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]1280  %incdec.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.011, i32 11281  %23 = load i16, ptr %pSrcA.addr.011, align 21282  %conv = sext i16 %23 to i321283  %incdec.ptr1 = getelementptr inbounds i16, ptr %pSrcB.addr.010, i32 11284  %24 = load i16, ptr %pSrcB.addr.010, align 21285  %conv2 = sext i16 %24 to i321286  %mul = mul nsw i32 %conv2, %conv1287  %shr = ashr i32 %mul, 151288  %25 = icmp sgt i32 %shr, -327681289  %.val.i = select i1 %25, i32 %shr, i32 -327681290  %26 = icmp slt i32 %.val.i, 327671291  %retval.0.i = select i1 %26, i32 %.val.i, i32 327671292  %conv3 = trunc i32 %retval.0.i to i161293  %incdec.ptr4 = getelementptr inbounds i16, ptr %pDst.addr.09, i32 11294  store i16 %conv3, ptr %pDst.addr.09, align 21295  %inc = add nuw i32 %i.012, 11296  %exitcond = icmp eq i32 %inc, %N1297  br i1 %exitcond, label %for.cond.cleanup, label %for.body1298}1299 1300define arm_aapcs_vfpcc void @ssatmul_s4t_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1301; CHECK-LABEL: ssatmul_s4t_q15:1302; CHECK:       @ %bb.0: @ %entry1303; CHECK-NEXT:    .save {r4, lr}1304; CHECK-NEXT:    push {r4, lr}1305; CHECK-NEXT:    cmp r3, #01306; CHECK-NEXT:    it eq1307; CHECK-NEXT:    popeq {r4, pc}1308; CHECK-NEXT:  .LBB8_1: @ %vector.ph1309; CHECK-NEXT:    add.w r12, r3, #31310; CHECK-NEXT:    mov.w lr, #11311; CHECK-NEXT:    bic r12, r12, #31312; CHECK-NEXT:    adr r4, .LCPI8_01313; CHECK-NEXT:    sub.w r12, r12, #41314; CHECK-NEXT:    vldrw.u32 q0, [r4]1315; CHECK-NEXT:    add.w lr, lr, r12, lsr #21316; CHECK-NEXT:    sub.w r12, r3, #11317; CHECK-NEXT:    movs r3, #01318; CHECK-NEXT:    vdup.32 q1, r121319; CHECK-NEXT:  .LBB8_2: @ %vector.body1320; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11321; CHECK-NEXT:    vdup.32 q2, r31322; CHECK-NEXT:    adds r3, #41323; CHECK-NEXT:    vorr q2, q2, q01324; CHECK-NEXT:    vptt.u32 cs, q1, q21325; CHECK-NEXT:    vldrht.s32 q2, [r0], #81326; CHECK-NEXT:    vldrht.s32 q3, [r1], #81327; CHECK-NEXT:    vmul.i32 q2, q3, q21328; CHECK-NEXT:    vqshrnb.s32 q2, q2, #151329; CHECK-NEXT:    vpst1330; CHECK-NEXT:    vstrht.32 q2, [r2], #81331; CHECK-NEXT:    le lr, .LBB8_21332; CHECK-NEXT:  @ %bb.3: @ %for.cond.cleanup1333; CHECK-NEXT:    pop {r4, pc}1334; CHECK-NEXT:    .p2align 41335; CHECK-NEXT:  @ %bb.4:1336; CHECK-NEXT:  .LCPI8_0:1337; CHECK-NEXT:    .long 0 @ 0x01338; CHECK-NEXT:    .long 1 @ 0x11339; CHECK-NEXT:    .long 2 @ 0x21340; CHECK-NEXT:    .long 3 @ 0x31341entry:1342  %cmp8 = icmp eq i32 %N, 01343  br i1 %cmp8, label %for.cond.cleanup, label %vector.ph1344 1345vector.ph:                                        ; preds = %entry1346  %n.rnd.up = add i32 %N, 31347  %n.vec = and i32 %n.rnd.up, -41348  %trip.count.minus.1 = add i32 %N, -11349  %broadcast.splatinsert20 = insertelement <4 x i32> undef, i32 %trip.count.minus.1, i32 01350  %broadcast.splat21 = shufflevector <4 x i32> %broadcast.splatinsert20, <4 x i32> undef, <4 x i32> zeroinitializer1351  br label %vector.body1352 1353vector.body:                                      ; preds = %vector.body, %vector.ph1354  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1355  %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 01356  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer1357  %induction = or <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3>1358  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index1359  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index1360  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index1361  %0 = icmp ule <4 x i32> %induction, %broadcast.splat211362  %wide.masked.load = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %next.gep, i32 2, <4 x i1> %0, <4 x i16> undef)1363  %1 = sext <4 x i16> %wide.masked.load to <4 x i32>1364  %wide.masked.load22 = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %next.gep18, i32 2, <4 x i1> %0, <4 x i16> undef)1365  %2 = sext <4 x i16> %wide.masked.load22 to <4 x i32>1366  %3 = mul nsw <4 x i32> %2, %11367  %4 = ashr <4 x i32> %3, <i32 15, i32 15, i32 15, i32 15>1368  %5 = icmp sgt <4 x i32> %4, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1369  %6 = select <4 x i1> %5, <4 x i32> %4, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1370  %7 = icmp slt <4 x i32> %6, <i32 32767, i32 32767, i32 32767, i32 32767>1371  %8 = select <4 x i1> %7, <4 x i32> %6, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>1372  %9 = trunc <4 x i32> %8 to <4 x i16>1373  call void @llvm.masked.store.v4i16.p0(<4 x i16> %9, ptr %next.gep19, i32 2, <4 x i1> %0)1374  %index.next = add i32 %index, 41375  %10 = icmp eq i32 %index.next, %n.vec1376  br i1 %10, label %for.cond.cleanup, label %vector.body1377 1378for.cond.cleanup:                                 ; preds = %vector.body, %entry1379  ret void1380}1381 1382define arm_aapcs_vfpcc void @ssatmul_8t_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1383; CHECK-LABEL: ssatmul_8t_q15:1384; CHECK:       @ %bb.0: @ %entry1385; CHECK-NEXT:    .save {r4, r5, r7, lr}1386; CHECK-NEXT:    push {r4, r5, r7, lr}1387; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1388; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13, d14, d15}1389; CHECK-NEXT:    .pad #161390; CHECK-NEXT:    sub sp, #161391; CHECK-NEXT:    cmp r3, #01392; CHECK-NEXT:    beq .LBB9_31393; CHECK-NEXT:  @ %bb.1: @ %vector.ph1394; CHECK-NEXT:    adds r4, r3, #71395; CHECK-NEXT:    vmov.i8 q2, #0x01396; CHECK-NEXT:    bic r4, r4, #71397; CHECK-NEXT:    vmov.i8 q3, #0xff1398; CHECK-NEXT:    sub.w r12, r4, #81399; CHECK-NEXT:    movs r4, #11400; CHECK-NEXT:    mov r5, sp1401; CHECK-NEXT:    add.w lr, r4, r12, lsr #31402; CHECK-NEXT:    adr r4, .LCPI9_01403; CHECK-NEXT:    vldrw.u32 q0, [r4]1404; CHECK-NEXT:    adr r4, .LCPI9_11405; CHECK-NEXT:    sub.w r12, r3, #11406; CHECK-NEXT:    vldrw.u32 q4, [r4]1407; CHECK-NEXT:    movs r3, #01408; CHECK-NEXT:    vdup.32 q1, r121409; CHECK-NEXT:  .LBB9_2: @ %vector.body1410; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11411; CHECK-NEXT:    vdup.32 q5, r31412; CHECK-NEXT:    adds r3, #81413; CHECK-NEXT:    vorr q6, q5, q01414; CHECK-NEXT:    vorr q5, q5, q41415; CHECK-NEXT:    vcmp.u32 cs, q1, q61416; CHECK-NEXT:    vpsel q6, q3, q21417; CHECK-NEXT:    vcmp.u32 cs, q1, q51418; CHECK-NEXT:    vpsel q5, q3, q21419; CHECK-NEXT:    vstrh.32 q6, [r5, #8]1420; CHECK-NEXT:    vstrh.32 q5, [r5]1421; CHECK-NEXT:    vldrw.u32 q5, [r5]1422; CHECK-NEXT:    vptt.i16 ne, q5, zr1423; CHECK-NEXT:    vldrht.u16 q5, [r0], #161424; CHECK-NEXT:    vldrht.u16 q6, [r1], #161425; CHECK-NEXT:    vmullt.s16 q7, q6, q51426; CHECK-NEXT:    vmullb.s16 q5, q6, q51427; CHECK-NEXT:    vqshrnb.s32 q5, q5, #151428; CHECK-NEXT:    vqshrnt.s32 q5, q7, #151429; CHECK-NEXT:    vpst1430; CHECK-NEXT:    vstrht.16 q5, [r2], #161431; CHECK-NEXT:    le lr, .LBB9_21432; CHECK-NEXT:  .LBB9_3: @ %for.cond.cleanup1433; CHECK-NEXT:    add sp, #161434; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13, d14, d15}1435; CHECK-NEXT:    pop {r4, r5, r7, pc}1436; CHECK-NEXT:    .p2align 41437; CHECK-NEXT:  @ %bb.4:1438; CHECK-NEXT:  .LCPI9_0:1439; CHECK-NEXT:    .long 4 @ 0x41440; CHECK-NEXT:    .long 5 @ 0x51441; CHECK-NEXT:    .long 6 @ 0x61442; CHECK-NEXT:    .long 7 @ 0x71443; CHECK-NEXT:  .LCPI9_1:1444; CHECK-NEXT:    .long 0 @ 0x01445; CHECK-NEXT:    .long 1 @ 0x11446; CHECK-NEXT:    .long 2 @ 0x21447; CHECK-NEXT:    .long 3 @ 0x31448entry:1449  %cmp8 = icmp eq i32 %N, 01450  br i1 %cmp8, label %for.cond.cleanup, label %vector.ph1451 1452vector.ph:                                        ; preds = %entry1453  %n.rnd.up = add i32 %N, 71454  %n.vec = and i32 %n.rnd.up, -81455  %trip.count.minus.1 = add i32 %N, -11456  %broadcast.splatinsert20 = insertelement <8 x i32> undef, i32 %trip.count.minus.1, i32 01457  %broadcast.splat21 = shufflevector <8 x i32> %broadcast.splatinsert20, <8 x i32> undef, <8 x i32> zeroinitializer1458  br label %vector.body1459 1460vector.body:                                      ; preds = %vector.body, %vector.ph1461  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1462  %broadcast.splatinsert = insertelement <8 x i32> undef, i32 %index, i32 01463  %broadcast.splat = shufflevector <8 x i32> %broadcast.splatinsert, <8 x i32> undef, <8 x i32> zeroinitializer1464  %induction = or <8 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1465  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index1466  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index1467  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index1468  %0 = icmp ule <8 x i32> %induction, %broadcast.splat211469  %wide.masked.load = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep, i32 2, <8 x i1> %0, <8 x i16> undef)1470  %1 = sext <8 x i16> %wide.masked.load to <8 x i32>1471  %wide.masked.load22 = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep18, i32 2, <8 x i1> %0, <8 x i16> undef)1472  %2 = sext <8 x i16> %wide.masked.load22 to <8 x i32>1473  %3 = mul nsw <8 x i32> %2, %11474  %4 = ashr <8 x i32> %3, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>1475  %5 = icmp sgt <8 x i32> %4, <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>1476  %6 = select <8 x i1> %5, <8 x i32> %4, <8 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>1477  %7 = icmp slt <8 x i32> %6, <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>1478  %8 = select <8 x i1> %7, <8 x i32> %6, <8 x i32> <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>1479  %9 = trunc <8 x i32> %8 to <8 x i16>1480  call void @llvm.masked.store.v8i16.p0(<8 x i16> %9, ptr %next.gep19, i32 2, <8 x i1> %0)1481  %index.next = add i32 %index, 81482  %10 = icmp eq i32 %index.next, %n.vec1483  br i1 %10, label %for.cond.cleanup, label %vector.body1484 1485for.cond.cleanup:                                 ; preds = %vector.body, %entry1486  ret void1487}1488 1489define arm_aapcs_vfpcc void @ssatmul_8ti_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1490; CHECK-LABEL: ssatmul_8ti_q15:1491; CHECK:       @ %bb.0: @ %entry1492; CHECK-NEXT:    .save {r4, r5, r7, lr}1493; CHECK-NEXT:    push {r4, r5, r7, lr}1494; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1495; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13, d14, d15}1496; CHECK-NEXT:    .pad #161497; CHECK-NEXT:    sub sp, #161498; CHECK-NEXT:    cmp r3, #01499; CHECK-NEXT:    beq .LBB10_31500; CHECK-NEXT:  @ %bb.1: @ %vector.ph1501; CHECK-NEXT:    adds r4, r3, #71502; CHECK-NEXT:    vmov.i8 q2, #0x01503; CHECK-NEXT:    bic r4, r4, #71504; CHECK-NEXT:    vmov.i8 q3, #0xff1505; CHECK-NEXT:    sub.w r12, r4, #81506; CHECK-NEXT:    movs r4, #11507; CHECK-NEXT:    mov r5, sp1508; CHECK-NEXT:    add.w lr, r4, r12, lsr #31509; CHECK-NEXT:    adr r4, .LCPI10_01510; CHECK-NEXT:    vldrw.u32 q0, [r4]1511; CHECK-NEXT:    adr r4, .LCPI10_11512; CHECK-NEXT:    sub.w r12, r3, #11513; CHECK-NEXT:    vldrw.u32 q4, [r4]1514; CHECK-NEXT:    movs r3, #01515; CHECK-NEXT:    vdup.32 q1, r121516; CHECK-NEXT:  .LBB10_2: @ %vector.body1517; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11518; CHECK-NEXT:    vdup.32 q5, r31519; CHECK-NEXT:    adds r3, #81520; CHECK-NEXT:    vorr q6, q5, q01521; CHECK-NEXT:    vorr q5, q5, q41522; CHECK-NEXT:    vcmp.u32 cs, q1, q61523; CHECK-NEXT:    vpsel q6, q3, q21524; CHECK-NEXT:    vcmp.u32 cs, q1, q51525; CHECK-NEXT:    vpsel q5, q3, q21526; CHECK-NEXT:    vstrh.32 q6, [r5, #8]1527; CHECK-NEXT:    vstrh.32 q5, [r5]1528; CHECK-NEXT:    vldrw.u32 q5, [r5]1529; CHECK-NEXT:    vptt.i16 ne, q5, zr1530; CHECK-NEXT:    vldrht.u16 q5, [r0], #161531; CHECK-NEXT:    vldrht.u16 q6, [r1], #161532; CHECK-NEXT:    vmullt.s16 q7, q6, q51533; CHECK-NEXT:    vmullb.s16 q5, q6, q51534; CHECK-NEXT:    vqshrnb.s32 q5, q5, #151535; CHECK-NEXT:    vqshrnt.s32 q5, q7, #151536; CHECK-NEXT:    vpst1537; CHECK-NEXT:    vstrht.16 q5, [r2], #161538; CHECK-NEXT:    le lr, .LBB10_21539; CHECK-NEXT:  .LBB10_3: @ %for.cond.cleanup1540; CHECK-NEXT:    add sp, #161541; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13, d14, d15}1542; CHECK-NEXT:    pop {r4, r5, r7, pc}1543; CHECK-NEXT:    .p2align 41544; CHECK-NEXT:  @ %bb.4:1545; CHECK-NEXT:  .LCPI10_0:1546; CHECK-NEXT:    .long 4 @ 0x41547; CHECK-NEXT:    .long 5 @ 0x51548; CHECK-NEXT:    .long 6 @ 0x61549; CHECK-NEXT:    .long 7 @ 0x71550; CHECK-NEXT:  .LCPI10_1:1551; CHECK-NEXT:    .long 0 @ 0x01552; CHECK-NEXT:    .long 1 @ 0x11553; CHECK-NEXT:    .long 2 @ 0x21554; CHECK-NEXT:    .long 3 @ 0x31555entry:1556  %cmp8 = icmp eq i32 %N, 01557  br i1 %cmp8, label %for.cond.cleanup, label %vector.ph1558 1559vector.ph:                                        ; preds = %entry1560  %n.rnd.up = add i32 %N, 71561  %n.vec = and i32 %n.rnd.up, -81562  %trip.count.minus.1 = add i32 %N, -11563  %broadcast.splatinsert20 = insertelement <8 x i32> undef, i32 %trip.count.minus.1, i32 01564  %broadcast.splat21 = shufflevector <8 x i32> %broadcast.splatinsert20, <8 x i32> undef, <8 x i32> zeroinitializer1565  br label %vector.body1566 1567vector.body:                                      ; preds = %vector.body, %vector.ph1568  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1569  %broadcast.splatinsert = insertelement <8 x i32> undef, i32 %index, i32 01570  %broadcast.splat = shufflevector <8 x i32> %broadcast.splatinsert, <8 x i32> undef, <8 x i32> zeroinitializer1571  %induction = or <8 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1572  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index1573  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index1574  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index1575  %0 = icmp ule <8 x i32> %induction, %broadcast.splat211576  %wide.masked.load = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep, i32 2, <8 x i1> %0, <8 x i16> undef)1577  %1 = shufflevector <8 x i16> %wide.masked.load, <8 x i16> %wide.masked.load, <4 x i32> <i32 0, i32 2, i32 4, i32 6>1578  %2 = shufflevector <8 x i16> %wide.masked.load, <8 x i16> %wide.masked.load, <4 x i32> <i32 1, i32 3, i32 5, i32 7>1579  %3 = sext <4 x i16> %1 to <4 x i32>1580  %4 = sext <4 x i16> %2 to <4 x i32>1581  %wide.masked.load22 = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep18, i32 2, <8 x i1> %0, <8 x i16> undef)1582  %5 = shufflevector <8 x i16> %wide.masked.load22, <8 x i16> %wide.masked.load22, <4 x i32> <i32 0, i32 2, i32 4, i32 6>1583  %6 = shufflevector <8 x i16> %wide.masked.load22, <8 x i16> %wide.masked.load22, <4 x i32> <i32 1, i32 3, i32 5, i32 7>1584  %7 = sext <4 x i16> %5 to <4 x i32>1585  %8 = sext <4 x i16> %6 to <4 x i32>1586  %9 = mul <4 x i32> %7, %31587  %10 = mul <4 x i32> %8, %41588  %11 = ashr <4 x i32> %9, <i32 15, i32 15, i32 15, i32 15>1589  %12 = ashr <4 x i32> %10, <i32 15, i32 15, i32 15, i32 15>1590  %13 = icmp sgt <4 x i32> %11, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1591  %14 = icmp sgt <4 x i32> %12, <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1592  %15 = select <4 x i1> %13, <4 x i32> %11, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1593  %16 = select <4 x i1> %14, <4 x i32> %12, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>1594  %17 = icmp slt <4 x i32> %15, <i32 32767, i32 32767, i32 32767, i32 32767>1595  %18 = icmp slt <4 x i32> %16, <i32 32767, i32 32767, i32 32767, i32 32767>1596  %19 = select <4 x i1> %17, <4 x i32> %15, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>1597  %20 = select <4 x i1> %18, <4 x i32> %16, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>1598  %21 = shufflevector <4 x i32> %19, <4 x i32> %20, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>1599  %22 = trunc <8 x i32> %21 to <8 x i16>1600  call void @llvm.masked.store.v8i16.p0(<8 x i16> %22, ptr %next.gep19, i32 2, <8 x i1> %0)1601  %index.next = add i32 %index, 81602  %23 = icmp eq i32 %index.next, %n.vec1603  br i1 %23, label %for.cond.cleanup, label %vector.body1604 1605for.cond.cleanup:                                 ; preds = %vector.body, %entry1606  ret void1607}1608 1609define arm_aapcs_vfpcc void @usatmul_4_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1610; CHECK-LABEL: usatmul_4_q15:1611; CHECK:       @ %bb.0: @ %entry1612; CHECK-NEXT:    .save {r4, r5, r6, lr}1613; CHECK-NEXT:    push {r4, r5, r6, lr}1614; CHECK-NEXT:    cmp r3, #01615; CHECK-NEXT:    beq .LBB11_81616; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader1617; CHECK-NEXT:    cmp r3, #31618; CHECK-NEXT:    bhi .LBB11_31619; CHECK-NEXT:  @ %bb.2:1620; CHECK-NEXT:    movs r5, #01621; CHECK-NEXT:    mov r12, r01622; CHECK-NEXT:    mov r6, r11623; CHECK-NEXT:    mov r4, r21624; CHECK-NEXT:    b .LBB11_61625; CHECK-NEXT:  .LBB11_3: @ %vector.ph1626; CHECK-NEXT:    bic r5, r3, #31627; CHECK-NEXT:    movs r4, #11628; CHECK-NEXT:    subs r6, r5, #41629; CHECK-NEXT:    add.w r12, r0, r5, lsl #11630; CHECK-NEXT:    add.w lr, r4, r6, lsr #21631; CHECK-NEXT:    add.w r4, r2, r5, lsl #11632; CHECK-NEXT:    add.w r6, r1, r5, lsl #11633; CHECK-NEXT:  .LBB11_4: @ %vector.body1634; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11635; CHECK-NEXT:    vldrh.u32 q0, [r0], #81636; CHECK-NEXT:    vldrh.u32 q1, [r1], #81637; CHECK-NEXT:    vmul.i32 q0, q1, q01638; CHECK-NEXT:    vqshrnb.u32 q0, q0, #151639; CHECK-NEXT:    vstrh.32 q0, [r2], #81640; CHECK-NEXT:    le lr, .LBB11_41641; CHECK-NEXT:  @ %bb.5: @ %middle.block1642; CHECK-NEXT:    cmp r5, r31643; CHECK-NEXT:    it eq1644; CHECK-NEXT:    popeq {r4, r5, r6, pc}1645; CHECK-NEXT:  .LBB11_6: @ %for.body.preheader211646; CHECK-NEXT:    sub.w lr, r3, r51647; CHECK-NEXT:    movw r0, #655351648; CHECK-NEXT:  .LBB11_7: @ %for.body1649; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11650; CHECK-NEXT:    ldrh r1, [r12], #21651; CHECK-NEXT:    ldrh r2, [r6], #21652; CHECK-NEXT:    muls r1, r2, r11653; CHECK-NEXT:    lsrs r2, r1, #151654; CHECK-NEXT:    cmp r2, r01655; CHECK-NEXT:    movw r2, #655351656; CHECK-NEXT:    it lo1657; CHECK-NEXT:    lsrlo r2, r1, #151658; CHECK-NEXT:    strh r2, [r4], #21659; CHECK-NEXT:    le lr, .LBB11_71660; CHECK-NEXT:  .LBB11_8: @ %for.cond.cleanup1661; CHECK-NEXT:    pop {r4, r5, r6, pc}1662entry:1663  %cmp8 = icmp eq i32 %N, 01664  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader1665 1666for.body.preheader:                               ; preds = %entry1667  %min.iters.check = icmp ult i32 %N, 41668  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph1669 1670for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader1671  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]1672  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]1673  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]1674  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]1675  br label %for.body1676 1677vector.ph:                                        ; preds = %for.body.preheader1678  %n.vec = and i32 %N, -41679  %ind.end = getelementptr i16, ptr %pSrcA, i32 %n.vec1680  %ind.end15 = getelementptr i16, ptr %pSrcB, i32 %n.vec1681  %ind.end17 = getelementptr i16, ptr %pDst, i32 %n.vec1682  br label %vector.body1683 1684vector.body:                                      ; preds = %vector.body, %vector.ph1685  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1686  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index1687  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index1688  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index1689  %wide.load = load <4 x i16>, ptr %next.gep, align 21690  %0 = zext <4 x i16> %wide.load to <4 x i32>1691  %wide.load20 = load <4 x i16>, ptr %next.gep18, align 21692  %1 = zext <4 x i16> %wide.load20 to <4 x i32>1693  %2 = mul nuw <4 x i32> %1, %01694  %3 = lshr <4 x i32> %2, <i32 15, i32 15, i32 15, i32 15>1695  %4 = icmp ult <4 x i32> %3, <i32 65535, i32 65535, i32 65535, i32 65535>1696  %5 = select <4 x i1> %4, <4 x i32> %3, <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>1697  %6 = trunc <4 x i32> %5 to <4 x i16>1698  store <4 x i16> %6, ptr %next.gep19, align 21699  %index.next = add i32 %index, 41700  %7 = icmp eq i32 %index.next, %n.vec1701  br i1 %7, label %middle.block, label %vector.body1702 1703middle.block:                                     ; preds = %vector.body1704  %cmp.n = icmp eq i32 %n.vec, %N1705  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader211706 1707for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry1708  ret void1709 1710for.body:                                         ; preds = %for.body.preheader21, %for.body1711  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]1712  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]1713  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]1714  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]1715  %incdec.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.011, i32 11716  %8 = load i16, ptr %pSrcA.addr.011, align 21717  %conv = zext i16 %8 to i321718  %incdec.ptr1 = getelementptr inbounds i16, ptr %pSrcB.addr.010, i32 11719  %9 = load i16, ptr %pSrcB.addr.010, align 21720  %conv2 = zext i16 %9 to i321721  %mul = mul nuw i32 %conv2, %conv1722  %shr = lshr i32 %mul, 151723  %10 = icmp ult i32 %shr, 655351724  %retval.0.i = select i1 %10, i32 %shr, i32 655351725  %conv3 = trunc i32 %retval.0.i to i161726  %incdec.ptr4 = getelementptr inbounds i16, ptr %pDst.addr.09, i32 11727  store i16 %conv3, ptr %pDst.addr.09, align 21728  %inc = add nuw i32 %i.012, 11729  %exitcond = icmp eq i32 %inc, %N1730  br i1 %exitcond, label %for.cond.cleanup, label %for.body1731}1732 1733define arm_aapcs_vfpcc void @usatmul_8_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1734; CHECK-LABEL: usatmul_8_q15:1735; CHECK:       @ %bb.0: @ %entry1736; CHECK-NEXT:    .save {r4, r5, r6, lr}1737; CHECK-NEXT:    push {r4, r5, r6, lr}1738; CHECK-NEXT:    cmp r3, #01739; CHECK-NEXT:    beq .LBB12_81740; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader1741; CHECK-NEXT:    cmp r3, #71742; CHECK-NEXT:    bhi .LBB12_31743; CHECK-NEXT:  @ %bb.2:1744; CHECK-NEXT:    movs r5, #01745; CHECK-NEXT:    mov r12, r01746; CHECK-NEXT:    mov r6, r11747; CHECK-NEXT:    mov r4, r21748; CHECK-NEXT:    b .LBB12_61749; CHECK-NEXT:  .LBB12_3: @ %vector.ph1750; CHECK-NEXT:    bic r5, r3, #71751; CHECK-NEXT:    movs r4, #11752; CHECK-NEXT:    sub.w r6, r5, #81753; CHECK-NEXT:    add.w r12, r0, r5, lsl #11754; CHECK-NEXT:    add.w lr, r4, r6, lsr #31755; CHECK-NEXT:    add.w r4, r2, r5, lsl #11756; CHECK-NEXT:    add.w r6, r1, r5, lsl #11757; CHECK-NEXT:  .LBB12_4: @ %vector.body1758; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11759; CHECK-NEXT:    vldrh.u16 q0, [r0], #161760; CHECK-NEXT:    vldrh.u16 q1, [r1], #161761; CHECK-NEXT:    vmullt.u16 q2, q1, q01762; CHECK-NEXT:    vmullb.u16 q0, q1, q01763; CHECK-NEXT:    vqshrnb.u32 q0, q0, #151764; CHECK-NEXT:    vqshrnt.u32 q0, q2, #151765; CHECK-NEXT:    vstrb.8 q0, [r2], #161766; CHECK-NEXT:    le lr, .LBB12_41767; CHECK-NEXT:  @ %bb.5: @ %middle.block1768; CHECK-NEXT:    cmp r5, r31769; CHECK-NEXT:    it eq1770; CHECK-NEXT:    popeq {r4, r5, r6, pc}1771; CHECK-NEXT:  .LBB12_6: @ %for.body.preheader211772; CHECK-NEXT:    sub.w lr, r3, r51773; CHECK-NEXT:    movw r0, #655351774; CHECK-NEXT:  .LBB12_7: @ %for.body1775; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11776; CHECK-NEXT:    ldrh r1, [r12], #21777; CHECK-NEXT:    ldrh r2, [r6], #21778; CHECK-NEXT:    muls r1, r2, r11779; CHECK-NEXT:    lsrs r2, r1, #151780; CHECK-NEXT:    cmp r2, r01781; CHECK-NEXT:    movw r2, #655351782; CHECK-NEXT:    it lo1783; CHECK-NEXT:    lsrlo r2, r1, #151784; CHECK-NEXT:    strh r2, [r4], #21785; CHECK-NEXT:    le lr, .LBB12_71786; CHECK-NEXT:  .LBB12_8: @ %for.cond.cleanup1787; CHECK-NEXT:    pop {r4, r5, r6, pc}1788entry:1789  %cmp8 = icmp eq i32 %N, 01790  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader1791 1792for.body.preheader:                               ; preds = %entry1793  %min.iters.check = icmp ult i32 %N, 81794  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph1795 1796for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader1797  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]1798  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]1799  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]1800  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]1801  br label %for.body1802 1803vector.ph:                                        ; preds = %for.body.preheader1804  %n.vec = and i32 %N, -81805  %ind.end = getelementptr i16, ptr %pSrcA, i32 %n.vec1806  %ind.end15 = getelementptr i16, ptr %pSrcB, i32 %n.vec1807  %ind.end17 = getelementptr i16, ptr %pDst, i32 %n.vec1808  br label %vector.body1809 1810vector.body:                                      ; preds = %vector.body, %vector.ph1811  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1812  %next.gep = getelementptr i16, ptr %pSrcA, i32 %index1813  %next.gep18 = getelementptr i16, ptr %pSrcB, i32 %index1814  %next.gep19 = getelementptr i16, ptr %pDst, i32 %index1815  %wide.load = load <8 x i16>, ptr %next.gep, align 21816  %0 = zext <8 x i16> %wide.load to <8 x i32>1817  %wide.load20 = load <8 x i16>, ptr %next.gep18, align 21818  %1 = zext <8 x i16> %wide.load20 to <8 x i32>1819  %2 = mul nuw <8 x i32> %1, %01820  %3 = lshr <8 x i32> %2, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>1821  %4 = icmp ult <8 x i32> %3, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>1822  %5 = select <8 x i1> %4, <8 x i32> %3, <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>1823  %6 = trunc <8 x i32> %5 to <8 x i16>1824  store <8 x i16> %6, ptr %next.gep19, align 21825  %index.next = add i32 %index, 81826  %7 = icmp eq i32 %index.next, %n.vec1827  br i1 %7, label %middle.block, label %vector.body1828 1829middle.block:                                     ; preds = %vector.body1830  %cmp.n = icmp eq i32 %n.vec, %N1831  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader211832 1833for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry1834  ret void1835 1836for.body:                                         ; preds = %for.body.preheader21, %for.body1837  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]1838  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]1839  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]1840  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]1841  %incdec.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.011, i32 11842  %8 = load i16, ptr %pSrcA.addr.011, align 21843  %conv = zext i16 %8 to i321844  %incdec.ptr1 = getelementptr inbounds i16, ptr %pSrcB.addr.010, i32 11845  %9 = load i16, ptr %pSrcB.addr.010, align 21846  %conv2 = zext i16 %9 to i321847  %mul = mul nuw i32 %conv2, %conv1848  %shr = lshr i32 %mul, 151849  %10 = icmp ult i32 %shr, 655351850  %retval.0.i = select i1 %10, i32 %shr, i32 655351851  %conv3 = trunc i32 %retval.0.i to i161852  %incdec.ptr4 = getelementptr inbounds i16, ptr %pDst.addr.09, i32 11853  store i16 %conv3, ptr %pDst.addr.09, align 21854  %inc = add nuw i32 %i.012, 11855  %exitcond = icmp eq i32 %inc, %N1856  br i1 %exitcond, label %for.cond.cleanup, label %for.body1857}1858 1859 1860; i81861 1862define arm_aapcs_vfpcc void @ssatmul_4_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1863; CHECK-LABEL: ssatmul_4_q7:1864; CHECK:       @ %bb.0: @ %entry1865; CHECK-NEXT:    .save {r4, r5, r6, lr}1866; CHECK-NEXT:    push {r4, r5, r6, lr}1867; CHECK-NEXT:    cmp r3, #01868; CHECK-NEXT:    beq .LBB13_81869; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader1870; CHECK-NEXT:    cmp r3, #31871; CHECK-NEXT:    bhi .LBB13_31872; CHECK-NEXT:  @ %bb.2:1873; CHECK-NEXT:    movs r5, #01874; CHECK-NEXT:    mov r12, r01875; CHECK-NEXT:    mov r6, r11876; CHECK-NEXT:    mov r4, r21877; CHECK-NEXT:    b .LBB13_61878; CHECK-NEXT:  .LBB13_3: @ %vector.ph1879; CHECK-NEXT:    bic r5, r3, #31880; CHECK-NEXT:    movs r4, #11881; CHECK-NEXT:    subs r6, r5, #41882; CHECK-NEXT:    add.w r12, r0, r51883; CHECK-NEXT:    vmvn.i32 q0, #0x7f1884; CHECK-NEXT:    vmov.i32 q1, #0x7f1885; CHECK-NEXT:    add.w lr, r4, r6, lsr #21886; CHECK-NEXT:    adds r4, r2, r51887; CHECK-NEXT:    adds r6, r1, r51888; CHECK-NEXT:  .LBB13_4: @ %vector.body1889; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11890; CHECK-NEXT:    vldrb.s32 q2, [r0], #41891; CHECK-NEXT:    vldrb.s32 q3, [r1], #41892; CHECK-NEXT:    vmul.i32 q2, q3, q21893; CHECK-NEXT:    vshr.s32 q2, q2, #71894; CHECK-NEXT:    vmax.s32 q2, q2, q01895; CHECK-NEXT:    vmin.s32 q2, q2, q11896; CHECK-NEXT:    vstrb.32 q2, [r2], #41897; CHECK-NEXT:    le lr, .LBB13_41898; CHECK-NEXT:  @ %bb.5: @ %middle.block1899; CHECK-NEXT:    cmp r5, r31900; CHECK-NEXT:    it eq1901; CHECK-NEXT:    popeq {r4, r5, r6, pc}1902; CHECK-NEXT:  .LBB13_6: @ %for.body.preheader211903; CHECK-NEXT:    sub.w lr, r3, r51904; CHECK-NEXT:  .LBB13_7: @ %for.body1905; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=11906; CHECK-NEXT:    ldrsb r0, [r12], #11907; CHECK-NEXT:    ldrsb r1, [r6], #11908; CHECK-NEXT:    muls r0, r1, r01909; CHECK-NEXT:    ssat r0, #8, r0, asr #71910; CHECK-NEXT:    strb r0, [r4], #11911; CHECK-NEXT:    le lr, .LBB13_71912; CHECK-NEXT:  .LBB13_8: @ %for.cond.cleanup1913; CHECK-NEXT:    pop {r4, r5, r6, pc}1914entry:1915  %cmp8 = icmp eq i32 %N, 01916  br i1 %cmp8, label %for.cond.cleanup, label %for.body.preheader1917 1918for.body.preheader:                               ; preds = %entry1919  %min.iters.check = icmp ult i32 %N, 41920  br i1 %min.iters.check, label %for.body.preheader21, label %vector.ph1921 1922for.body.preheader21:                             ; preds = %middle.block, %for.body.preheader1923  %i.012.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]1924  %pSrcA.addr.011.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]1925  %pSrcB.addr.010.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end15, %middle.block ]1926  %pDst.addr.09.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end17, %middle.block ]1927  br label %for.body1928 1929vector.ph:                                        ; preds = %for.body.preheader1930  %n.vec = and i32 %N, -41931  %ind.end = getelementptr i8, ptr %pSrcA, i32 %n.vec1932  %ind.end15 = getelementptr i8, ptr %pSrcB, i32 %n.vec1933  %ind.end17 = getelementptr i8, ptr %pDst, i32 %n.vec1934  br label %vector.body1935 1936vector.body:                                      ; preds = %vector.body, %vector.ph1937  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]1938  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index1939  %next.gep18 = getelementptr i8, ptr %pSrcB, i32 %index1940  %next.gep19 = getelementptr i8, ptr %pDst, i32 %index1941  %wide.load = load <4 x i8>, ptr %next.gep, align 11942  %0 = sext <4 x i8> %wide.load to <4 x i32>1943  %wide.load20 = load <4 x i8>, ptr %next.gep18, align 11944  %1 = sext <4 x i8> %wide.load20 to <4 x i32>1945  %2 = mul nsw <4 x i32> %1, %01946  %3 = ashr <4 x i32> %2, <i32 7, i32 7, i32 7, i32 7>1947  %4 = icmp sgt <4 x i32> %3, <i32 -128, i32 -128, i32 -128, i32 -128>1948  %5 = select <4 x i1> %4, <4 x i32> %3, <4 x i32> <i32 -128, i32 -128, i32 -128, i32 -128>1949  %6 = icmp slt <4 x i32> %5, <i32 127, i32 127, i32 127, i32 127>1950  %7 = select <4 x i1> %6, <4 x i32> %5, <4 x i32> <i32 127, i32 127, i32 127, i32 127>1951  %8 = trunc <4 x i32> %7 to <4 x i8>1952  store <4 x i8> %8, ptr %next.gep19, align 11953  %index.next = add i32 %index, 41954  %9 = icmp eq i32 %index.next, %n.vec1955  br i1 %9, label %middle.block, label %vector.body1956 1957middle.block:                                     ; preds = %vector.body1958  %cmp.n = icmp eq i32 %n.vec, %N1959  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader211960 1961for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry1962  ret void1963 1964for.body:                                         ; preds = %for.body.preheader21, %for.body1965  %i.012 = phi i32 [ %inc, %for.body ], [ %i.012.ph, %for.body.preheader21 ]1966  %pSrcA.addr.011 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.011.ph, %for.body.preheader21 ]1967  %pSrcB.addr.010 = phi ptr [ %incdec.ptr1, %for.body ], [ %pSrcB.addr.010.ph, %for.body.preheader21 ]1968  %pDst.addr.09 = phi ptr [ %incdec.ptr4, %for.body ], [ %pDst.addr.09.ph, %for.body.preheader21 ]1969  %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.011, i32 11970  %10 = load i8, ptr %pSrcA.addr.011, align 11971  %conv = sext i8 %10 to i321972  %incdec.ptr1 = getelementptr inbounds i8, ptr %pSrcB.addr.010, i32 11973  %11 = load i8, ptr %pSrcB.addr.010, align 11974  %conv2 = sext i8 %11 to i321975  %mul = mul nsw i32 %conv2, %conv1976  %shr = ashr i32 %mul, 71977  %12 = icmp sgt i32 %shr, -1281978  %.val.i = select i1 %12, i32 %shr, i32 -1281979  %13 = icmp slt i32 %.val.i, 1271980  %retval.0.i = select i1 %13, i32 %.val.i, i32 1271981  %conv3 = trunc i32 %retval.0.i to i81982  %incdec.ptr4 = getelementptr inbounds i8, ptr %pDst.addr.09, i32 11983  store i8 %conv3, ptr %pDst.addr.09, align 11984  %inc = add nuw i32 %i.012, 11985  %exitcond = icmp eq i32 %inc, %N1986  br i1 %exitcond, label %for.cond.cleanup, label %for.body1987}1988 1989define arm_aapcs_vfpcc void @ssatmul_8_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {1990; CHECK-LABEL: ssatmul_8_q7:1991; CHECK:       @ %bb.0: @ %entry1992; CHECK-NEXT:    .save {r4, r5, r6, lr}1993; CHECK-NEXT:    push {r4, r5, r6, lr}1994; CHECK-NEXT:    cbz r3, .LBB14_81995; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader1996; CHECK-NEXT:    cmp r3, #71997; CHECK-NEXT:    bhi .LBB14_31998; CHECK-NEXT:  @ %bb.2:1999; CHECK-NEXT:    movs r5, #02000; CHECK-NEXT:    mov r12, r02001; CHECK-NEXT:    mov r6, r12002; CHECK-NEXT:    mov r4, r22003; CHECK-NEXT:    b .LBB14_62004; CHECK-NEXT:  .LBB14_3: @ %vector.ph2005; CHECK-NEXT:    bic r5, r3, #72006; CHECK-NEXT:    movs r4, #12007; CHECK-NEXT:    sub.w r6, r5, #82008; CHECK-NEXT:    add.w r12, r0, r52009; CHECK-NEXT:    add.w lr, r4, r6, lsr #32010; CHECK-NEXT:    adds r4, r2, r52011; CHECK-NEXT:    adds r6, r1, r52012; CHECK-NEXT:  .LBB14_4: @ %vector.body2013; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12014; CHECK-NEXT:    vldrb.s16 q0, [r0], #82015; CHECK-NEXT:    vldrb.s16 q1, [r1], #82016; CHECK-NEXT:    vmul.i16 q0, q1, q02017; CHECK-NEXT:    vqshrnb.s16 q0, q0, #72018; CHECK-NEXT:    vstrb.16 q0, [r2], #82019; CHECK-NEXT:    le lr, .LBB14_42020; CHECK-NEXT:  @ %bb.5: @ %middle.block2021; CHECK-NEXT:    cmp r5, r32022; CHECK-NEXT:    it eq2023; CHECK-NEXT:    popeq {r4, r5, r6, pc}2024; CHECK-NEXT:  .LBB14_6: @ %for.body.preheader232025; CHECK-NEXT:    sub.w lr, r3, r52026; CHECK-NEXT:  .LBB14_7: @ %for.body2027; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12028; CHECK-NEXT:    ldrsb r0, [r12], #12029; CHECK-NEXT:    ldrsb r1, [r6], #12030; CHECK-NEXT:    muls r0, r1, r02031; CHECK-NEXT:    ssat r0, #8, r0, asr #72032; CHECK-NEXT:    strb r0, [r4], #12033; CHECK-NEXT:    le lr, .LBB14_72034; CHECK-NEXT:  .LBB14_8: @ %for.cond.cleanup2035; CHECK-NEXT:    pop {r4, r5, r6, pc}2036entry:2037  %cmp10 = icmp eq i32 %N, 02038  br i1 %cmp10, label %for.cond.cleanup, label %for.body.preheader2039 2040for.body.preheader:                               ; preds = %entry2041  %min.iters.check = icmp ult i32 %N, 82042  br i1 %min.iters.check, label %for.body.preheader23, label %vector.ph2043 2044for.body.preheader23:                             ; preds = %middle.block, %for.body.preheader2045  %i.014.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]2046  %pSrcA.addr.013.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]2047  %pSrcB.addr.012.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end17, %middle.block ]2048  %pDst.addr.011.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end19, %middle.block ]2049  br label %for.body2050 2051vector.ph:                                        ; preds = %for.body.preheader2052  %n.vec = and i32 %N, -82053  %ind.end = getelementptr i8, ptr %pSrcA, i32 %n.vec2054  %ind.end17 = getelementptr i8, ptr %pSrcB, i32 %n.vec2055  %ind.end19 = getelementptr i8, ptr %pDst, i32 %n.vec2056  br label %vector.body2057 2058vector.body:                                      ; preds = %vector.body, %vector.ph2059  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2060  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2061  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2062  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2063  %wide.load = load <8 x i8>, ptr %next.gep, align 12064  %0 = sext <8 x i8> %wide.load to <8 x i16>2065  %wide.load22 = load <8 x i8>, ptr %next.gep20, align 12066  %1 = sext <8 x i8> %wide.load22 to <8 x i16>2067  %2 = mul nsw <8 x i16> %1, %02068  %3 = ashr <8 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2069  %4 = icmp sgt <8 x i16> %3, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2070  %5 = select <8 x i1> %4, <8 x i16> %3, <8 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2071  %6 = icmp slt <8 x i16> %5, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2072  %7 = select <8 x i1> %6, <8 x i16> %5, <8 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2073  %8 = trunc <8 x i16> %7 to <8 x i8>2074  store <8 x i8> %8, ptr %next.gep21, align 12075  %index.next = add i32 %index, 82076  %9 = icmp eq i32 %index.next, %n.vec2077  br i1 %9, label %middle.block, label %vector.body2078 2079middle.block:                                     ; preds = %vector.body2080  %cmp.n = icmp eq i32 %n.vec, %N2081  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader232082 2083for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry2084  ret void2085 2086for.body:                                         ; preds = %for.body.preheader23, %for.body2087  %i.014 = phi i32 [ %inc, %for.body ], [ %i.014.ph, %for.body.preheader23 ]2088  %pSrcA.addr.013 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.013.ph, %for.body.preheader23 ]2089  %pSrcB.addr.012 = phi ptr [ %incdec.ptr2, %for.body ], [ %pSrcB.addr.012.ph, %for.body.preheader23 ]2090  %pDst.addr.011 = phi ptr [ %incdec.ptr6, %for.body ], [ %pDst.addr.011.ph, %for.body.preheader23 ]2091  %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.013, i32 12092  %10 = load i8, ptr %pSrcA.addr.013, align 12093  %conv1 = sext i8 %10 to i162094  %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.012, i32 12095  %11 = load i8, ptr %pSrcB.addr.012, align 12096  %conv3 = sext i8 %11 to i162097  %mul = mul nsw i16 %conv3, %conv12098  %shr = ashr i16 %mul, 72099  %12 = icmp sgt i16 %shr, -1282100  %.val.i = select i1 %12, i16 %shr, i16 -1282101  %13 = icmp slt i16 %.val.i, 1272102  %retval.0.i = select i1 %13, i16 %.val.i, i16 1272103  %conv5 = trunc i16 %retval.0.i to i82104  %incdec.ptr6 = getelementptr inbounds i8, ptr %pDst.addr.011, i32 12105  store i8 %conv5, ptr %pDst.addr.011, align 12106  %inc = add nuw i32 %i.014, 12107  %exitcond = icmp eq i32 %inc, %N2108  br i1 %exitcond, label %for.cond.cleanup, label %for.body2109}2110 2111define arm_aapcs_vfpcc void @ssatmul_16_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {2112; CHECK-LABEL: ssatmul_16_q7:2113; CHECK:       @ %bb.0: @ %entry2114; CHECK-NEXT:    .save {r4, r5, r6, lr}2115; CHECK-NEXT:    push {r4, r5, r6, lr}2116; CHECK-NEXT:    cbz r3, .LBB15_82117; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader2118; CHECK-NEXT:    cmp r3, #152119; CHECK-NEXT:    bhi .LBB15_32120; CHECK-NEXT:  @ %bb.2:2121; CHECK-NEXT:    movs r5, #02122; CHECK-NEXT:    mov r12, r02123; CHECK-NEXT:    mov r6, r12124; CHECK-NEXT:    mov r4, r22125; CHECK-NEXT:    b .LBB15_62126; CHECK-NEXT:  .LBB15_3: @ %vector.ph2127; CHECK-NEXT:    bic r5, r3, #152128; CHECK-NEXT:    movs r4, #12129; CHECK-NEXT:    sub.w r6, r5, #162130; CHECK-NEXT:    add.w r12, r0, r52131; CHECK-NEXT:    add.w lr, r4, r6, lsr #42132; CHECK-NEXT:    adds r4, r2, r52133; CHECK-NEXT:    adds r6, r1, r52134; CHECK-NEXT:  .LBB15_4: @ %vector.body2135; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12136; CHECK-NEXT:    vldrb.u8 q0, [r0], #162137; CHECK-NEXT:    vldrb.u8 q1, [r1], #162138; CHECK-NEXT:    vmullt.s8 q2, q1, q02139; CHECK-NEXT:    vmullb.s8 q0, q1, q02140; CHECK-NEXT:    vqshrnb.s16 q0, q0, #72141; CHECK-NEXT:    vqshrnt.s16 q0, q2, #72142; CHECK-NEXT:    vstrb.8 q0, [r2], #162143; CHECK-NEXT:    le lr, .LBB15_42144; CHECK-NEXT:  @ %bb.5: @ %middle.block2145; CHECK-NEXT:    cmp r5, r32146; CHECK-NEXT:    it eq2147; CHECK-NEXT:    popeq {r4, r5, r6, pc}2148; CHECK-NEXT:  .LBB15_6: @ %for.body.preheader232149; CHECK-NEXT:    sub.w lr, r3, r52150; CHECK-NEXT:  .LBB15_7: @ %for.body2151; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12152; CHECK-NEXT:    ldrsb r0, [r12], #12153; CHECK-NEXT:    ldrsb r1, [r6], #12154; CHECK-NEXT:    muls r0, r1, r02155; CHECK-NEXT:    ssat r0, #8, r0, asr #72156; CHECK-NEXT:    strb r0, [r4], #12157; CHECK-NEXT:    le lr, .LBB15_72158; CHECK-NEXT:  .LBB15_8: @ %for.cond.cleanup2159; CHECK-NEXT:    pop {r4, r5, r6, pc}2160entry:2161  %cmp10 = icmp eq i32 %N, 02162  br i1 %cmp10, label %for.cond.cleanup, label %for.body.preheader2163 2164for.body.preheader:                               ; preds = %entry2165  %min.iters.check = icmp ult i32 %N, 162166  br i1 %min.iters.check, label %for.body.preheader23, label %vector.ph2167 2168for.body.preheader23:                             ; preds = %middle.block, %for.body.preheader2169  %i.014.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]2170  %pSrcA.addr.013.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]2171  %pSrcB.addr.012.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end17, %middle.block ]2172  %pDst.addr.011.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end19, %middle.block ]2173  br label %for.body2174 2175vector.ph:                                        ; preds = %for.body.preheader2176  %n.vec = and i32 %N, -162177  %ind.end = getelementptr i8, ptr %pSrcA, i32 %n.vec2178  %ind.end17 = getelementptr i8, ptr %pSrcB, i32 %n.vec2179  %ind.end19 = getelementptr i8, ptr %pDst, i32 %n.vec2180  br label %vector.body2181 2182vector.body:                                      ; preds = %vector.body, %vector.ph2183  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2184  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2185  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2186  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2187  %wide.load = load <16 x i8>, ptr %next.gep, align 12188  %0 = sext <16 x i8> %wide.load to <16 x i16>2189  %wide.load22 = load <16 x i8>, ptr %next.gep20, align 12190  %1 = sext <16 x i8> %wide.load22 to <16 x i16>2191  %2 = mul nsw <16 x i16> %1, %02192  %3 = ashr <16 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2193  %4 = icmp sgt <16 x i16> %3, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2194  %5 = select <16 x i1> %4, <16 x i16> %3, <16 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2195  %6 = icmp slt <16 x i16> %5, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2196  %7 = select <16 x i1> %6, <16 x i16> %5, <16 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2197  %8 = trunc <16 x i16> %7 to <16 x i8>2198  store <16 x i8> %8, ptr %next.gep21, align 12199  %index.next = add i32 %index, 162200  %9 = icmp eq i32 %index.next, %n.vec2201  br i1 %9, label %middle.block, label %vector.body2202 2203middle.block:                                     ; preds = %vector.body2204  %cmp.n = icmp eq i32 %n.vec, %N2205  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader232206 2207for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry2208  ret void2209 2210for.body:                                         ; preds = %for.body.preheader23, %for.body2211  %i.014 = phi i32 [ %inc, %for.body ], [ %i.014.ph, %for.body.preheader23 ]2212  %pSrcA.addr.013 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.013.ph, %for.body.preheader23 ]2213  %pSrcB.addr.012 = phi ptr [ %incdec.ptr2, %for.body ], [ %pSrcB.addr.012.ph, %for.body.preheader23 ]2214  %pDst.addr.011 = phi ptr [ %incdec.ptr6, %for.body ], [ %pDst.addr.011.ph, %for.body.preheader23 ]2215  %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.013, i32 12216  %10 = load i8, ptr %pSrcA.addr.013, align 12217  %conv1 = sext i8 %10 to i162218  %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.012, i32 12219  %11 = load i8, ptr %pSrcB.addr.012, align 12220  %conv3 = sext i8 %11 to i162221  %mul = mul nsw i16 %conv3, %conv12222  %shr = ashr i16 %mul, 72223  %12 = icmp sgt i16 %shr, -1282224  %.val.i = select i1 %12, i16 %shr, i16 -1282225  %13 = icmp slt i16 %.val.i, 1272226  %retval.0.i = select i1 %13, i16 %.val.i, i16 1272227  %conv5 = trunc i16 %retval.0.i to i82228  %incdec.ptr6 = getelementptr inbounds i8, ptr %pDst.addr.011, i32 12229  store i8 %conv5, ptr %pDst.addr.011, align 12230  %inc = add nuw i32 %i.014, 12231  %exitcond = icmp eq i32 %inc, %N2232  br i1 %exitcond, label %for.cond.cleanup, label %for.body2233}2234 2235define arm_aapcs_vfpcc void @ssatmul_16i_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {2236; CHECK-LABEL: ssatmul_16i_q7:2237; CHECK:       @ %bb.0: @ %entry2238; CHECK-NEXT:    .save {r4, r5, r6, lr}2239; CHECK-NEXT:    push {r4, r5, r6, lr}2240; CHECK-NEXT:    cbz r3, .LBB16_82241; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader2242; CHECK-NEXT:    cmp r3, #152243; CHECK-NEXT:    bhi .LBB16_32244; CHECK-NEXT:  @ %bb.2:2245; CHECK-NEXT:    movs r5, #02246; CHECK-NEXT:    mov r12, r02247; CHECK-NEXT:    mov r6, r12248; CHECK-NEXT:    mov r4, r22249; CHECK-NEXT:    b .LBB16_62250; CHECK-NEXT:  .LBB16_3: @ %vector.ph2251; CHECK-NEXT:    bic r5, r3, #152252; CHECK-NEXT:    movs r4, #12253; CHECK-NEXT:    sub.w r6, r5, #162254; CHECK-NEXT:    add.w r12, r0, r52255; CHECK-NEXT:    add.w lr, r4, r6, lsr #42256; CHECK-NEXT:    adds r4, r2, r52257; CHECK-NEXT:    adds r6, r1, r52258; CHECK-NEXT:  .LBB16_4: @ %vector.body2259; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12260; CHECK-NEXT:    vldrb.u8 q0, [r0], #162261; CHECK-NEXT:    vldrb.u8 q1, [r1], #162262; CHECK-NEXT:    vmullt.s8 q2, q1, q02263; CHECK-NEXT:    vmullb.s8 q0, q1, q02264; CHECK-NEXT:    vqshrnb.s16 q0, q0, #72265; CHECK-NEXT:    vqshrnt.s16 q0, q2, #72266; CHECK-NEXT:    vstrb.8 q0, [r2], #162267; CHECK-NEXT:    le lr, .LBB16_42268; CHECK-NEXT:  @ %bb.5: @ %middle.block2269; CHECK-NEXT:    cmp r5, r32270; CHECK-NEXT:    it eq2271; CHECK-NEXT:    popeq {r4, r5, r6, pc}2272; CHECK-NEXT:  .LBB16_6: @ %for.body.preheader232273; CHECK-NEXT:    sub.w lr, r3, r52274; CHECK-NEXT:  .LBB16_7: @ %for.body2275; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12276; CHECK-NEXT:    ldrsb r0, [r12], #12277; CHECK-NEXT:    ldrsb r1, [r6], #12278; CHECK-NEXT:    muls r0, r1, r02279; CHECK-NEXT:    ssat r0, #8, r0, asr #72280; CHECK-NEXT:    strb r0, [r4], #12281; CHECK-NEXT:    le lr, .LBB16_72282; CHECK-NEXT:  .LBB16_8: @ %for.cond.cleanup2283; CHECK-NEXT:    pop {r4, r5, r6, pc}2284entry:2285  %cmp10 = icmp eq i32 %N, 02286  br i1 %cmp10, label %for.cond.cleanup, label %for.body.preheader2287 2288for.body.preheader:                               ; preds = %entry2289  %min.iters.check = icmp ult i32 %N, 162290  br i1 %min.iters.check, label %for.body.preheader23, label %vector.ph2291 2292for.body.preheader23:                             ; preds = %middle.block, %for.body.preheader2293  %i.014.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]2294  %pSrcA.addr.013.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]2295  %pSrcB.addr.012.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end17, %middle.block ]2296  %pDst.addr.011.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end19, %middle.block ]2297  br label %for.body2298 2299vector.ph:                                        ; preds = %for.body.preheader2300  %n.vec = and i32 %N, -162301  %ind.end = getelementptr i8, ptr %pSrcA, i32 %n.vec2302  %ind.end17 = getelementptr i8, ptr %pSrcB, i32 %n.vec2303  %ind.end19 = getelementptr i8, ptr %pDst, i32 %n.vec2304  br label %vector.body2305 2306vector.body:                                      ; preds = %vector.body, %vector.ph2307  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2308  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2309  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2310  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2311  %wide.load = load <16 x i8>, ptr %next.gep, align 12312  %0 = shufflevector <16 x i8> %wide.load, <16 x i8> %wide.load, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>2313  %1 = shufflevector <16 x i8> %wide.load, <16 x i8> %wide.load, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>2314  %2 = sext <8 x i8> %0 to <8 x i16>2315  %3 = sext <8 x i8> %1 to <8 x i16>2316  %wide.load22 = load <16 x i8>, ptr %next.gep20, align 12317  %4 = shufflevector <16 x i8> %wide.load22, <16 x i8> %wide.load22, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>2318  %5 = shufflevector <16 x i8> %wide.load22, <16 x i8> %wide.load22, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>2319  %6 = sext <8 x i8> %4 to <8 x i16>2320  %7 = sext <8 x i8> %5 to <8 x i16>2321  %8 = mul <8 x i16> %6, %22322  %9 = mul <8 x i16> %7, %32323  %10 = ashr <8 x i16> %8, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2324  %11 = ashr <8 x i16> %9, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2325  %12 = icmp sgt <8 x i16> %10, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2326  %13 = icmp sgt <8 x i16> %11, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2327  %14 = select <8 x i1> %12, <8 x i16> %10, <8 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2328  %15 = select <8 x i1> %13, <8 x i16> %11, <8 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2329  %16 = icmp slt <8 x i16> %14, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2330  %17 = icmp slt <8 x i16> %15, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2331  %18 = select <8 x i1> %16, <8 x i16> %14, <8 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2332  %19 = select <8 x i1> %17, <8 x i16> %15, <8 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2333  %20 = shufflevector <8 x i16> %18, <8 x i16> %19, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>2334  %21 = trunc <16 x i16> %20 to <16 x i8>2335  store <16 x i8> %21, ptr %next.gep21, align 12336  %index.next = add i32 %index, 162337  %22 = icmp eq i32 %index.next, %n.vec2338  br i1 %22, label %middle.block, label %vector.body2339 2340middle.block:                                     ; preds = %vector.body2341  %cmp.n = icmp eq i32 %n.vec, %N2342  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader232343 2344for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry2345  ret void2346 2347for.body:                                         ; preds = %for.body, %for.body.preheader232348  %i.014 = phi i32 [ %inc, %for.body ], [ %i.014.ph, %for.body.preheader23 ]2349  %pSrcA.addr.013 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.013.ph, %for.body.preheader23 ]2350  %pSrcB.addr.012 = phi ptr [ %incdec.ptr2, %for.body ], [ %pSrcB.addr.012.ph, %for.body.preheader23 ]2351  %pDst.addr.011 = phi ptr [ %incdec.ptr6, %for.body ], [ %pDst.addr.011.ph, %for.body.preheader23 ]2352  %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.013, i32 12353  %23 = load i8, ptr %pSrcA.addr.013, align 12354  %conv1 = sext i8 %23 to i162355  %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.012, i32 12356  %24 = load i8, ptr %pSrcB.addr.012, align 12357  %conv3 = sext i8 %24 to i162358  %mul = mul nsw i16 %conv3, %conv12359  %shr = ashr i16 %mul, 72360  %25 = icmp sgt i16 %shr, -1282361  %.val.i = select i1 %25, i16 %shr, i16 -1282362  %26 = icmp slt i16 %.val.i, 1272363  %retval.0.i = select i1 %26, i16 %.val.i, i16 1272364  %conv5 = trunc i16 %retval.0.i to i82365  %incdec.ptr6 = getelementptr inbounds i8, ptr %pDst.addr.011, i32 12366  store i8 %conv5, ptr %pDst.addr.011, align 12367  %inc = add nuw i32 %i.014, 12368  %exitcond = icmp eq i32 %inc, %N2369  br i1 %exitcond, label %for.cond.cleanup, label %for.body2370}2371 2372define arm_aapcs_vfpcc void @ssatmul_8t_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {2373; CHECK-LABEL: ssatmul_8t_q7:2374; CHECK:       @ %bb.0: @ %entry2375; CHECK-NEXT:    .save {r4, r5, r7, lr}2376; CHECK-NEXT:    push {r4, r5, r7, lr}2377; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13}2378; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13}2379; CHECK-NEXT:    .pad #162380; CHECK-NEXT:    sub sp, #162381; CHECK-NEXT:    cmp r3, #02382; CHECK-NEXT:    beq .LBB17_32383; CHECK-NEXT:  @ %bb.1: @ %vector.ph2384; CHECK-NEXT:    adds r4, r3, #72385; CHECK-NEXT:    vmov.i8 q2, #0x02386; CHECK-NEXT:    bic r4, r4, #72387; CHECK-NEXT:    vmov.i8 q3, #0xff2388; CHECK-NEXT:    sub.w r12, r4, #82389; CHECK-NEXT:    movs r4, #12390; CHECK-NEXT:    mov r5, sp2391; CHECK-NEXT:    add.w lr, r4, r12, lsr #32392; CHECK-NEXT:    adr r4, .LCPI17_02393; CHECK-NEXT:    vldrw.u32 q0, [r4]2394; CHECK-NEXT:    adr r4, .LCPI17_12395; CHECK-NEXT:    sub.w r12, r3, #12396; CHECK-NEXT:    vldrw.u32 q4, [r4]2397; CHECK-NEXT:    movs r3, #02398; CHECK-NEXT:    vdup.32 q1, r122399; CHECK-NEXT:  .LBB17_2: @ %vector.body2400; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12401; CHECK-NEXT:    vdup.32 q5, r32402; CHECK-NEXT:    adds r3, #82403; CHECK-NEXT:    vorr q6, q5, q02404; CHECK-NEXT:    vorr q5, q5, q42405; CHECK-NEXT:    vcmp.u32 cs, q1, q62406; CHECK-NEXT:    vpsel q6, q3, q22407; CHECK-NEXT:    vcmp.u32 cs, q1, q52408; CHECK-NEXT:    vpsel q5, q3, q22409; CHECK-NEXT:    vstrh.32 q6, [r5, #8]2410; CHECK-NEXT:    vstrh.32 q5, [r5]2411; CHECK-NEXT:    vldrw.u32 q5, [r5]2412; CHECK-NEXT:    vptt.i16 ne, q5, zr2413; CHECK-NEXT:    vldrbt.s16 q5, [r0], #82414; CHECK-NEXT:    vldrbt.s16 q6, [r1], #82415; CHECK-NEXT:    vmul.i16 q5, q6, q52416; CHECK-NEXT:    vqshrnb.s16 q5, q5, #72417; CHECK-NEXT:    vpst2418; CHECK-NEXT:    vstrbt.16 q5, [r2], #82419; CHECK-NEXT:    le lr, .LBB17_22420; CHECK-NEXT:  .LBB17_3: @ %for.cond.cleanup2421; CHECK-NEXT:    add sp, #162422; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13}2423; CHECK-NEXT:    pop {r4, r5, r7, pc}2424; CHECK-NEXT:    .p2align 42425; CHECK-NEXT:  @ %bb.4:2426; CHECK-NEXT:  .LCPI17_0:2427; CHECK-NEXT:    .long 4 @ 0x42428; CHECK-NEXT:    .long 5 @ 0x52429; CHECK-NEXT:    .long 6 @ 0x62430; CHECK-NEXT:    .long 7 @ 0x72431; CHECK-NEXT:  .LCPI17_1:2432; CHECK-NEXT:    .long 0 @ 0x02433; CHECK-NEXT:    .long 1 @ 0x12434; CHECK-NEXT:    .long 2 @ 0x22435; CHECK-NEXT:    .long 3 @ 0x32436entry:2437  %cmp10 = icmp eq i32 %N, 02438  br i1 %cmp10, label %for.cond.cleanup, label %vector.ph2439 2440vector.ph:                                        ; preds = %entry2441  %n.rnd.up = add i32 %N, 72442  %n.vec = and i32 %n.rnd.up, -82443  %trip.count.minus.1 = add i32 %N, -12444  %broadcast.splatinsert22 = insertelement <8 x i32> undef, i32 %trip.count.minus.1, i32 02445  %broadcast.splat23 = shufflevector <8 x i32> %broadcast.splatinsert22, <8 x i32> undef, <8 x i32> zeroinitializer2446  br label %vector.body2447 2448vector.body:                                      ; preds = %vector.body, %vector.ph2449  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2450  %broadcast.splatinsert = insertelement <8 x i32> undef, i32 %index, i32 02451  %broadcast.splat = shufflevector <8 x i32> %broadcast.splatinsert, <8 x i32> undef, <8 x i32> zeroinitializer2452  %induction = or <8 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>2453  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2454  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2455  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2456  %0 = icmp ule <8 x i32> %induction, %broadcast.splat232457  %wide.masked.load = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %next.gep, i32 1, <8 x i1> %0, <8 x i8> undef)2458  %1 = sext <8 x i8> %wide.masked.load to <8 x i16>2459  %wide.masked.load24 = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %next.gep20, i32 1, <8 x i1> %0, <8 x i8> undef)2460  %2 = sext <8 x i8> %wide.masked.load24 to <8 x i16>2461  %3 = mul nsw <8 x i16> %2, %12462  %4 = ashr <8 x i16> %3, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2463  %5 = icmp sgt <8 x i16> %4, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2464  %6 = select <8 x i1> %5, <8 x i16> %4, <8 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2465  %7 = icmp slt <8 x i16> %6, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2466  %8 = select <8 x i1> %7, <8 x i16> %6, <8 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2467  %9 = trunc <8 x i16> %8 to <8 x i8>2468  call void @llvm.masked.store.v8i8.p0(<8 x i8> %9, ptr %next.gep21, i32 1, <8 x i1> %0)2469  %index.next = add i32 %index, 82470  %10 = icmp eq i32 %index.next, %n.vec2471  br i1 %10, label %for.cond.cleanup, label %vector.body2472 2473for.cond.cleanup:                                 ; preds = %vector.body, %entry2474  ret void2475}2476 2477define arm_aapcs_vfpcc void @ssatmul_16t_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {2478; CHECK-LABEL: ssatmul_16t_q7:2479; CHECK:       @ %bb.0: @ %entry2480; CHECK-NEXT:    .save {r4, r5, r6, lr}2481; CHECK-NEXT:    push {r4, r5, r6, lr}2482; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13, d14, d15}2483; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13, d14, d15}2484; CHECK-NEXT:    .pad #802485; CHECK-NEXT:    sub sp, #802486; CHECK-NEXT:    cmp r3, #02487; CHECK-NEXT:    beq .LBB18_32488; CHECK-NEXT:  @ %bb.1: @ %vector.ph2489; CHECK-NEXT:    add.w r6, r3, #152490; CHECK-NEXT:    movs r5, #12491; CHECK-NEXT:    bic r6, r6, #152492; CHECK-NEXT:    add r4, sp, #482493; CHECK-NEXT:    subs r6, #162494; CHECK-NEXT:    vmov.i8 q2, #0x02495; CHECK-NEXT:    vmov.i8 q3, #0xff2496; CHECK-NEXT:    add.w lr, r5, r6, lsr #42497; CHECK-NEXT:    adr r5, .LCPI18_02498; CHECK-NEXT:    subs r6, r3, #12499; CHECK-NEXT:    vldrw.u32 q0, [r5]2500; CHECK-NEXT:    vdup.32 q1, r62501; CHECK-NEXT:    adr r6, .LCPI18_12502; CHECK-NEXT:    vstrw.32 q0, [sp, #16] @ 16-byte Spill2503; CHECK-NEXT:    vldrw.u32 q0, [r6]2504; CHECK-NEXT:    adr r6, .LCPI18_22505; CHECK-NEXT:    vldrw.u32 q5, [r6]2506; CHECK-NEXT:    adr r6, .LCPI18_32507; CHECK-NEXT:    vldrw.u32 q6, [r6]2508; CHECK-NEXT:    add r5, sp, #322509; CHECK-NEXT:    add r6, sp, #642510; CHECK-NEXT:    movs r3, #02511; CHECK-NEXT:    vstrw.32 q0, [sp] @ 16-byte Spill2512; CHECK-NEXT:  .LBB18_2: @ %vector.body2513; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12514; CHECK-NEXT:    vldrw.u32 q0, [sp, #16] @ 16-byte Reload2515; CHECK-NEXT:    vdup.32 q7, r32516; CHECK-NEXT:    adds r3, #162517; CHECK-NEXT:    vorr q0, q7, q02518; CHECK-NEXT:    vcmp.u32 cs, q1, q02519; CHECK-NEXT:    vpsel q0, q3, q22520; CHECK-NEXT:    vstrh.32 q0, [r4, #8]2521; CHECK-NEXT:    vldrw.u32 q0, [sp] @ 16-byte Reload2522; CHECK-NEXT:    vorr q0, q7, q02523; CHECK-NEXT:    vcmp.u32 cs, q1, q02524; CHECK-NEXT:    vpsel q0, q3, q22525; CHECK-NEXT:    vstrh.32 q0, [r4]2526; CHECK-NEXT:    vorr q0, q7, q52527; CHECK-NEXT:    vcmp.u32 cs, q1, q02528; CHECK-NEXT:    vpsel q0, q3, q22529; CHECK-NEXT:    vstrh.32 q0, [r5, #8]2530; CHECK-NEXT:    vorr q0, q7, q62531; CHECK-NEXT:    vcmp.u32 cs, q1, q02532; CHECK-NEXT:    vpsel q0, q3, q22533; CHECK-NEXT:    vstrh.32 q0, [r5]2534; CHECK-NEXT:    vldrw.u32 q0, [r4]2535; CHECK-NEXT:    vcmp.i16 ne, q0, zr2536; CHECK-NEXT:    vpsel q0, q3, q22537; CHECK-NEXT:    vstrb.16 q0, [r6, #8]2538; CHECK-NEXT:    vldrw.u32 q0, [r5]2539; CHECK-NEXT:    vcmp.i16 ne, q0, zr2540; CHECK-NEXT:    vpsel q0, q3, q22541; CHECK-NEXT:    vstrb.16 q0, [r6]2542; CHECK-NEXT:    vldrw.u32 q0, [r6]2543; CHECK-NEXT:    vptt.i8 ne, q0, zr2544; CHECK-NEXT:    vldrbt.u8 q0, [r0], #162545; CHECK-NEXT:    vldrbt.u8 q7, [r1], #162546; CHECK-NEXT:    vmullt.s8 q4, q7, q02547; CHECK-NEXT:    vmullb.s8 q0, q7, q02548; CHECK-NEXT:    vqshrnb.s16 q0, q0, #72549; CHECK-NEXT:    vqshrnt.s16 q0, q4, #72550; CHECK-NEXT:    vpst2551; CHECK-NEXT:    vstrbt.8 q0, [r2], #162552; CHECK-NEXT:    le lr, .LBB18_22553; CHECK-NEXT:  .LBB18_3: @ %for.cond.cleanup2554; CHECK-NEXT:    add sp, #802555; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13, d14, d15}2556; CHECK-NEXT:    pop {r4, r5, r6, pc}2557; CHECK-NEXT:    .p2align 42558; CHECK-NEXT:  @ %bb.4:2559; CHECK-NEXT:  .LCPI18_0:2560; CHECK-NEXT:    .long 12 @ 0xc2561; CHECK-NEXT:    .long 13 @ 0xd2562; CHECK-NEXT:    .long 14 @ 0xe2563; CHECK-NEXT:    .long 15 @ 0xf2564; CHECK-NEXT:  .LCPI18_1:2565; CHECK-NEXT:    .long 8 @ 0x82566; CHECK-NEXT:    .long 9 @ 0x92567; CHECK-NEXT:    .long 10 @ 0xa2568; CHECK-NEXT:    .long 11 @ 0xb2569; CHECK-NEXT:  .LCPI18_2:2570; CHECK-NEXT:    .long 4 @ 0x42571; CHECK-NEXT:    .long 5 @ 0x52572; CHECK-NEXT:    .long 6 @ 0x62573; CHECK-NEXT:    .long 7 @ 0x72574; CHECK-NEXT:  .LCPI18_3:2575; CHECK-NEXT:    .long 0 @ 0x02576; CHECK-NEXT:    .long 1 @ 0x12577; CHECK-NEXT:    .long 2 @ 0x22578; CHECK-NEXT:    .long 3 @ 0x32579entry:2580  %cmp10 = icmp eq i32 %N, 02581  br i1 %cmp10, label %for.cond.cleanup, label %vector.ph2582 2583vector.ph:                                        ; preds = %entry2584  %n.rnd.up = add i32 %N, 152585  %n.vec = and i32 %n.rnd.up, -162586  %trip.count.minus.1 = add i32 %N, -12587  %broadcast.splatinsert22 = insertelement <16 x i32> undef, i32 %trip.count.minus.1, i32 02588  %broadcast.splat23 = shufflevector <16 x i32> %broadcast.splatinsert22, <16 x i32> undef, <16 x i32> zeroinitializer2589  br label %vector.body2590 2591vector.body:                                      ; preds = %vector.body, %vector.ph2592  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2593  %broadcast.splatinsert = insertelement <16 x i32> undef, i32 %index, i32 02594  %broadcast.splat = shufflevector <16 x i32> %broadcast.splatinsert, <16 x i32> undef, <16 x i32> zeroinitializer2595  %induction = or <16 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>2596  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2597  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2598  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2599  %0 = icmp ule <16 x i32> %induction, %broadcast.splat232600  %wide.masked.load = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %next.gep, i32 1, <16 x i1> %0, <16 x i8> undef)2601  %1 = sext <16 x i8> %wide.masked.load to <16 x i16>2602  %wide.masked.load24 = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %next.gep20, i32 1, <16 x i1> %0, <16 x i8> undef)2603  %2 = sext <16 x i8> %wide.masked.load24 to <16 x i16>2604  %3 = mul nsw <16 x i16> %2, %12605  %4 = ashr <16 x i16> %3, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2606  %5 = icmp sgt <16 x i16> %4, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2607  %6 = select <16 x i1> %5, <16 x i16> %4, <16 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2608  %7 = icmp slt <16 x i16> %6, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2609  %8 = select <16 x i1> %7, <16 x i16> %6, <16 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2610  %9 = trunc <16 x i16> %8 to <16 x i8>2611  call void @llvm.masked.store.v16i8.p0(<16 x i8> %9, ptr %next.gep21, i32 1, <16 x i1> %0)2612  %index.next = add i32 %index, 162613  %10 = icmp eq i32 %index.next, %n.vec2614  br i1 %10, label %for.cond.cleanup, label %vector.body2615 2616for.cond.cleanup:                                 ; preds = %vector.body, %entry2617  ret void2618}2619 2620define arm_aapcs_vfpcc void @ssatmul_16ti_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {2621; CHECK-LABEL: ssatmul_16ti_q7:2622; CHECK:       @ %bb.0: @ %entry2623; CHECK-NEXT:    .save {r4, r5, r6, lr}2624; CHECK-NEXT:    push {r4, r5, r6, lr}2625; CHECK-NEXT:    .vsave {d8, d9, d10, d11, d12, d13, d14, d15}2626; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13, d14, d15}2627; CHECK-NEXT:    .pad #802628; CHECK-NEXT:    sub sp, #802629; CHECK-NEXT:    cmp r3, #02630; CHECK-NEXT:    beq .LBB19_32631; CHECK-NEXT:  @ %bb.1: @ %vector.ph2632; CHECK-NEXT:    add.w r6, r3, #152633; CHECK-NEXT:    movs r5, #12634; CHECK-NEXT:    bic r6, r6, #152635; CHECK-NEXT:    add r4, sp, #482636; CHECK-NEXT:    subs r6, #162637; CHECK-NEXT:    vmov.i8 q2, #0x02638; CHECK-NEXT:    vmov.i8 q3, #0xff2639; CHECK-NEXT:    add.w lr, r5, r6, lsr #42640; CHECK-NEXT:    adr r5, .LCPI19_02641; CHECK-NEXT:    subs r6, r3, #12642; CHECK-NEXT:    vldrw.u32 q0, [r5]2643; CHECK-NEXT:    vdup.32 q1, r62644; CHECK-NEXT:    adr r6, .LCPI19_12645; CHECK-NEXT:    vstrw.32 q0, [sp, #16] @ 16-byte Spill2646; CHECK-NEXT:    vldrw.u32 q0, [r6]2647; CHECK-NEXT:    adr r6, .LCPI19_22648; CHECK-NEXT:    vldrw.u32 q5, [r6]2649; CHECK-NEXT:    adr r6, .LCPI19_32650; CHECK-NEXT:    vldrw.u32 q6, [r6]2651; CHECK-NEXT:    add r5, sp, #322652; CHECK-NEXT:    add r6, sp, #642653; CHECK-NEXT:    movs r3, #02654; CHECK-NEXT:    vstrw.32 q0, [sp] @ 16-byte Spill2655; CHECK-NEXT:  .LBB19_2: @ %vector.body2656; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12657; CHECK-NEXT:    vldrw.u32 q0, [sp, #16] @ 16-byte Reload2658; CHECK-NEXT:    vdup.32 q7, r32659; CHECK-NEXT:    adds r3, #162660; CHECK-NEXT:    vorr q0, q7, q02661; CHECK-NEXT:    vcmp.u32 cs, q1, q02662; CHECK-NEXT:    vpsel q0, q3, q22663; CHECK-NEXT:    vstrh.32 q0, [r4, #8]2664; CHECK-NEXT:    vldrw.u32 q0, [sp] @ 16-byte Reload2665; CHECK-NEXT:    vorr q0, q7, q02666; CHECK-NEXT:    vcmp.u32 cs, q1, q02667; CHECK-NEXT:    vpsel q0, q3, q22668; CHECK-NEXT:    vstrh.32 q0, [r4]2669; CHECK-NEXT:    vorr q0, q7, q52670; CHECK-NEXT:    vcmp.u32 cs, q1, q02671; CHECK-NEXT:    vpsel q0, q3, q22672; CHECK-NEXT:    vstrh.32 q0, [r5, #8]2673; CHECK-NEXT:    vorr q0, q7, q62674; CHECK-NEXT:    vcmp.u32 cs, q1, q02675; CHECK-NEXT:    vpsel q0, q3, q22676; CHECK-NEXT:    vstrh.32 q0, [r5]2677; CHECK-NEXT:    vldrw.u32 q0, [r4]2678; CHECK-NEXT:    vcmp.i16 ne, q0, zr2679; CHECK-NEXT:    vpsel q0, q3, q22680; CHECK-NEXT:    vstrb.16 q0, [r6, #8]2681; CHECK-NEXT:    vldrw.u32 q0, [r5]2682; CHECK-NEXT:    vcmp.i16 ne, q0, zr2683; CHECK-NEXT:    vpsel q0, q3, q22684; CHECK-NEXT:    vstrb.16 q0, [r6]2685; CHECK-NEXT:    vldrw.u32 q0, [r6]2686; CHECK-NEXT:    vptt.i8 ne, q0, zr2687; CHECK-NEXT:    vldrbt.u8 q0, [r0], #162688; CHECK-NEXT:    vldrbt.u8 q7, [r1], #162689; CHECK-NEXT:    vmullt.s8 q4, q7, q02690; CHECK-NEXT:    vmullb.s8 q0, q7, q02691; CHECK-NEXT:    vqshrnb.s16 q0, q0, #72692; CHECK-NEXT:    vqshrnt.s16 q0, q4, #72693; CHECK-NEXT:    vpst2694; CHECK-NEXT:    vstrbt.8 q0, [r2], #162695; CHECK-NEXT:    le lr, .LBB19_22696; CHECK-NEXT:  .LBB19_3: @ %for.cond.cleanup2697; CHECK-NEXT:    add sp, #802698; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13, d14, d15}2699; CHECK-NEXT:    pop {r4, r5, r6, pc}2700; CHECK-NEXT:    .p2align 42701; CHECK-NEXT:  @ %bb.4:2702; CHECK-NEXT:  .LCPI19_0:2703; CHECK-NEXT:    .long 12 @ 0xc2704; CHECK-NEXT:    .long 13 @ 0xd2705; CHECK-NEXT:    .long 14 @ 0xe2706; CHECK-NEXT:    .long 15 @ 0xf2707; CHECK-NEXT:  .LCPI19_1:2708; CHECK-NEXT:    .long 8 @ 0x82709; CHECK-NEXT:    .long 9 @ 0x92710; CHECK-NEXT:    .long 10 @ 0xa2711; CHECK-NEXT:    .long 11 @ 0xb2712; CHECK-NEXT:  .LCPI19_2:2713; CHECK-NEXT:    .long 4 @ 0x42714; CHECK-NEXT:    .long 5 @ 0x52715; CHECK-NEXT:    .long 6 @ 0x62716; CHECK-NEXT:    .long 7 @ 0x72717; CHECK-NEXT:  .LCPI19_3:2718; CHECK-NEXT:    .long 0 @ 0x02719; CHECK-NEXT:    .long 1 @ 0x12720; CHECK-NEXT:    .long 2 @ 0x22721; CHECK-NEXT:    .long 3 @ 0x32722entry:2723  %cmp10 = icmp eq i32 %N, 02724  br i1 %cmp10, label %for.cond.cleanup, label %vector.ph2725 2726vector.ph:                                        ; preds = %entry2727  %n.rnd.up = add i32 %N, 152728  %n.vec = and i32 %n.rnd.up, -162729  %trip.count.minus.1 = add i32 %N, -12730  %broadcast.splatinsert22 = insertelement <16 x i32> undef, i32 %trip.count.minus.1, i32 02731  %broadcast.splat23 = shufflevector <16 x i32> %broadcast.splatinsert22, <16 x i32> undef, <16 x i32> zeroinitializer2732  br label %vector.body2733 2734vector.body:                                      ; preds = %vector.body, %vector.ph2735  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2736  %broadcast.splatinsert = insertelement <16 x i32> undef, i32 %index, i32 02737  %broadcast.splat = shufflevector <16 x i32> %broadcast.splatinsert, <16 x i32> undef, <16 x i32> zeroinitializer2738  %induction = or <16 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>2739  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2740  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2741  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2742  %0 = icmp ule <16 x i32> %induction, %broadcast.splat232743  %wide.masked.load = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %next.gep, i32 1, <16 x i1> %0, <16 x i8> undef)2744  %1 = shufflevector <16 x i8> %wide.masked.load, <16 x i8> %wide.masked.load, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>2745  %2 = shufflevector <16 x i8> %wide.masked.load, <16 x i8> %wide.masked.load, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>2746  %3 = sext <8 x i8> %1 to <8 x i16>2747  %4 = sext <8 x i8> %2 to <8 x i16>2748  %wide.masked.load24 = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %next.gep20, i32 1, <16 x i1> %0, <16 x i8> undef)2749  %5 = shufflevector <16 x i8> %wide.masked.load24, <16 x i8> %wide.masked.load24, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>2750  %6 = shufflevector <16 x i8> %wide.masked.load24, <16 x i8> %wide.masked.load24, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>2751  %7 = sext <8 x i8> %5 to <8 x i16>2752  %8 = sext <8 x i8> %6 to <8 x i16>2753  %9 = mul <8 x i16> %7, %32754  %10 = mul <8 x i16> %8, %42755  %11 = ashr <8 x i16> %9, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2756  %12 = ashr <8 x i16> %10, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2757  %13 = icmp sgt <8 x i16> %11, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2758  %14 = icmp sgt <8 x i16> %12, <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2759  %15 = select <8 x i1> %13, <8 x i16> %11, <8 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2760  %16 = select <8 x i1> %14, <8 x i16> %12, <8 x i16> <i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128, i16 -128>2761  %17 = icmp slt <8 x i16> %15, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2762  %18 = icmp slt <8 x i16> %16, <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2763  %19 = select <8 x i1> %17, <8 x i16> %15, <8 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2764  %20 = select <8 x i1> %18, <8 x i16> %16, <8 x i16> <i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127, i16 127>2765  %21 = shufflevector <8 x i16> %19, <8 x i16> %20, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>2766  %22 = trunc <16 x i16> %21 to <16 x i8>2767  call void @llvm.masked.store.v16i8.p0(<16 x i8> %22, ptr %next.gep21, i32 1, <16 x i1> %0)2768  %index.next = add i32 %index, 162769  %23 = icmp eq i32 %index.next, %n.vec2770  br i1 %23, label %for.cond.cleanup, label %vector.body2771 2772for.cond.cleanup:                                 ; preds = %vector.body, %entry2773  ret void2774}2775 2776define arm_aapcs_vfpcc void @usatmul_8_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {2777; CHECK-LABEL: usatmul_8_q7:2778; CHECK:       @ %bb.0: @ %entry2779; CHECK-NEXT:    .save {r4, r5, r6, lr}2780; CHECK-NEXT:    push {r4, r5, r6, lr}2781; CHECK-NEXT:    cbz r3, .LBB20_82782; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader2783; CHECK-NEXT:    cmp r3, #72784; CHECK-NEXT:    bhi .LBB20_32785; CHECK-NEXT:  @ %bb.2:2786; CHECK-NEXT:    movs r5, #02787; CHECK-NEXT:    mov r12, r02788; CHECK-NEXT:    mov r6, r12789; CHECK-NEXT:    mov r4, r22790; CHECK-NEXT:    b .LBB20_62791; CHECK-NEXT:  .LBB20_3: @ %vector.ph2792; CHECK-NEXT:    bic r5, r3, #72793; CHECK-NEXT:    movs r4, #12794; CHECK-NEXT:    sub.w r6, r5, #82795; CHECK-NEXT:    add.w r12, r0, r52796; CHECK-NEXT:    add.w lr, r4, r6, lsr #32797; CHECK-NEXT:    adds r4, r2, r52798; CHECK-NEXT:    adds r6, r1, r52799; CHECK-NEXT:  .LBB20_4: @ %vector.body2800; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12801; CHECK-NEXT:    vldrb.u16 q0, [r0], #82802; CHECK-NEXT:    vldrb.u16 q1, [r1], #82803; CHECK-NEXT:    vmul.i16 q0, q1, q02804; CHECK-NEXT:    vqshrnb.u16 q0, q0, #72805; CHECK-NEXT:    vstrb.16 q0, [r2], #82806; CHECK-NEXT:    le lr, .LBB20_42807; CHECK-NEXT:  @ %bb.5: @ %middle.block2808; CHECK-NEXT:    cmp r5, r32809; CHECK-NEXT:    it eq2810; CHECK-NEXT:    popeq {r4, r5, r6, pc}2811; CHECK-NEXT:  .LBB20_6: @ %for.body.preheader232812; CHECK-NEXT:    sub.w lr, r3, r52813; CHECK-NEXT:  .LBB20_7: @ %for.body2814; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12815; CHECK-NEXT:    ldrb r0, [r12], #12816; CHECK-NEXT:    ldrb r1, [r6], #12817; CHECK-NEXT:    muls r0, r1, r02818; CHECK-NEXT:    lsrs r1, r0, #72819; CHECK-NEXT:    cmp r1, #2552820; CHECK-NEXT:    mov.w r1, #2552821; CHECK-NEXT:    it lo2822; CHECK-NEXT:    lsrlo r1, r0, #72823; CHECK-NEXT:    strb r1, [r4], #12824; CHECK-NEXT:    le lr, .LBB20_72825; CHECK-NEXT:  .LBB20_8: @ %for.cond.cleanup2826; CHECK-NEXT:    pop {r4, r5, r6, pc}2827entry:2828  %cmp10 = icmp eq i32 %N, 02829  br i1 %cmp10, label %for.cond.cleanup, label %for.body.preheader2830 2831for.body.preheader:                               ; preds = %entry2832  %min.iters.check = icmp ult i32 %N, 82833  br i1 %min.iters.check, label %for.body.preheader23, label %vector.ph2834 2835for.body.preheader23:                             ; preds = %middle.block, %for.body.preheader2836  %i.014.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]2837  %pSrcA.addr.013.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]2838  %pSrcB.addr.012.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end17, %middle.block ]2839  %pDst.addr.011.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end19, %middle.block ]2840  br label %for.body2841 2842vector.ph:                                        ; preds = %for.body.preheader2843  %n.vec = and i32 %N, -82844  %ind.end = getelementptr i8, ptr %pSrcA, i32 %n.vec2845  %ind.end17 = getelementptr i8, ptr %pSrcB, i32 %n.vec2846  %ind.end19 = getelementptr i8, ptr %pDst, i32 %n.vec2847  br label %vector.body2848 2849vector.body:                                      ; preds = %vector.body, %vector.ph2850  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2851  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2852  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2853  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2854  %wide.load = load <8 x i8>, ptr %next.gep, align 12855  %0 = zext <8 x i8> %wide.load to <8 x i16>2856  %wide.load22 = load <8 x i8>, ptr %next.gep20, align 12857  %1 = zext <8 x i8> %wide.load22 to <8 x i16>2858  %2 = mul nuw <8 x i16> %1, %02859  %3 = lshr <8 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2860  %4 = icmp ult <8 x i16> %3, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>2861  %5 = select <8 x i1> %4, <8 x i16> %3, <8 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>2862  %6 = trunc <8 x i16> %5 to <8 x i8>2863  store <8 x i8> %6, ptr %next.gep21, align 12864  %index.next = add i32 %index, 82865  %7 = icmp eq i32 %index.next, %n.vec2866  br i1 %7, label %middle.block, label %vector.body2867 2868middle.block:                                     ; preds = %vector.body2869  %cmp.n = icmp eq i32 %n.vec, %N2870  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader232871 2872for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry2873  ret void2874 2875for.body:                                         ; preds = %for.body.preheader23, %for.body2876  %i.014 = phi i32 [ %inc, %for.body ], [ %i.014.ph, %for.body.preheader23 ]2877  %pSrcA.addr.013 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.013.ph, %for.body.preheader23 ]2878  %pSrcB.addr.012 = phi ptr [ %incdec.ptr2, %for.body ], [ %pSrcB.addr.012.ph, %for.body.preheader23 ]2879  %pDst.addr.011 = phi ptr [ %incdec.ptr6, %for.body ], [ %pDst.addr.011.ph, %for.body.preheader23 ]2880  %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.013, i32 12881  %8 = load i8, ptr %pSrcA.addr.013, align 12882  %conv1 = zext i8 %8 to i162883  %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.012, i32 12884  %9 = load i8, ptr %pSrcB.addr.012, align 12885  %conv3 = zext i8 %9 to i162886  %mul = mul nuw i16 %conv3, %conv12887  %10 = lshr i16 %mul, 72888  %11 = icmp ult i16 %10, 2552889  %retval.0.i = select i1 %11, i16 %10, i16 2552890  %conv5 = trunc i16 %retval.0.i to i82891  %incdec.ptr6 = getelementptr inbounds i8, ptr %pDst.addr.011, i32 12892  store i8 %conv5, ptr %pDst.addr.011, align 12893  %inc = add nuw i32 %i.014, 12894  %exitcond = icmp eq i32 %inc, %N2895  br i1 %exitcond, label %for.cond.cleanup, label %for.body2896}2897 2898define arm_aapcs_vfpcc void @usatmul_16_q7(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %N) {2899; CHECK-LABEL: usatmul_16_q7:2900; CHECK:       @ %bb.0: @ %entry2901; CHECK-NEXT:    .save {r4, r5, r6, lr}2902; CHECK-NEXT:    push {r4, r5, r6, lr}2903; CHECK-NEXT:    cmp r3, #02904; CHECK-NEXT:    beq .LBB21_82905; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader2906; CHECK-NEXT:    cmp r3, #152907; CHECK-NEXT:    bhi .LBB21_32908; CHECK-NEXT:  @ %bb.2:2909; CHECK-NEXT:    movs r5, #02910; CHECK-NEXT:    mov r12, r02911; CHECK-NEXT:    mov r6, r12912; CHECK-NEXT:    mov r4, r22913; CHECK-NEXT:    b .LBB21_62914; CHECK-NEXT:  .LBB21_3: @ %vector.ph2915; CHECK-NEXT:    bic r5, r3, #152916; CHECK-NEXT:    movs r4, #12917; CHECK-NEXT:    sub.w r6, r5, #162918; CHECK-NEXT:    add.w r12, r0, r52919; CHECK-NEXT:    add.w lr, r4, r6, lsr #42920; CHECK-NEXT:    adds r4, r2, r52921; CHECK-NEXT:    adds r6, r1, r52922; CHECK-NEXT:  .LBB21_4: @ %vector.body2923; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12924; CHECK-NEXT:    vldrb.u8 q0, [r0], #162925; CHECK-NEXT:    vldrb.u8 q1, [r1], #162926; CHECK-NEXT:    vmullt.u8 q2, q1, q02927; CHECK-NEXT:    vmullb.u8 q0, q1, q02928; CHECK-NEXT:    vqshrnb.u16 q0, q0, #72929; CHECK-NEXT:    vqshrnt.u16 q0, q2, #72930; CHECK-NEXT:    vstrb.8 q0, [r2], #162931; CHECK-NEXT:    le lr, .LBB21_42932; CHECK-NEXT:  @ %bb.5: @ %middle.block2933; CHECK-NEXT:    cmp r5, r32934; CHECK-NEXT:    it eq2935; CHECK-NEXT:    popeq {r4, r5, r6, pc}2936; CHECK-NEXT:  .LBB21_6: @ %for.body.preheader232937; CHECK-NEXT:    sub.w lr, r3, r52938; CHECK-NEXT:  .LBB21_7: @ %for.body2939; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=12940; CHECK-NEXT:    ldrb r0, [r12], #12941; CHECK-NEXT:    ldrb r1, [r6], #12942; CHECK-NEXT:    muls r0, r1, r02943; CHECK-NEXT:    lsrs r1, r0, #72944; CHECK-NEXT:    cmp r1, #2552945; CHECK-NEXT:    mov.w r1, #2552946; CHECK-NEXT:    it lo2947; CHECK-NEXT:    lsrlo r1, r0, #72948; CHECK-NEXT:    strb r1, [r4], #12949; CHECK-NEXT:    le lr, .LBB21_72950; CHECK-NEXT:  .LBB21_8: @ %for.cond.cleanup2951; CHECK-NEXT:    pop {r4, r5, r6, pc}2952entry:2953  %cmp10 = icmp eq i32 %N, 02954  br i1 %cmp10, label %for.cond.cleanup, label %for.body.preheader2955 2956for.body.preheader:                               ; preds = %entry2957  %min.iters.check = icmp ult i32 %N, 162958  br i1 %min.iters.check, label %for.body.preheader23, label %vector.ph2959 2960for.body.preheader23:                             ; preds = %middle.block, %for.body.preheader2961  %i.014.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]2962  %pSrcA.addr.013.ph = phi ptr [ %pSrcA, %for.body.preheader ], [ %ind.end, %middle.block ]2963  %pSrcB.addr.012.ph = phi ptr [ %pSrcB, %for.body.preheader ], [ %ind.end17, %middle.block ]2964  %pDst.addr.011.ph = phi ptr [ %pDst, %for.body.preheader ], [ %ind.end19, %middle.block ]2965  br label %for.body2966 2967vector.ph:                                        ; preds = %for.body.preheader2968  %n.vec = and i32 %N, -162969  %ind.end = getelementptr i8, ptr %pSrcA, i32 %n.vec2970  %ind.end17 = getelementptr i8, ptr %pSrcB, i32 %n.vec2971  %ind.end19 = getelementptr i8, ptr %pDst, i32 %n.vec2972  br label %vector.body2973 2974vector.body:                                      ; preds = %vector.body, %vector.ph2975  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]2976  %next.gep = getelementptr i8, ptr %pSrcA, i32 %index2977  %next.gep20 = getelementptr i8, ptr %pSrcB, i32 %index2978  %next.gep21 = getelementptr i8, ptr %pDst, i32 %index2979  %wide.load = load <16 x i8>, ptr %next.gep, align 12980  %0 = zext <16 x i8> %wide.load to <16 x i16>2981  %wide.load22 = load <16 x i8>, ptr %next.gep20, align 12982  %1 = zext <16 x i8> %wide.load22 to <16 x i16>2983  %2 = mul nuw <16 x i16> %1, %02984  %3 = lshr <16 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2985  %4 = icmp ult <16 x i16> %3, <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>2986  %5 = select <16 x i1> %4, <16 x i16> %3, <16 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>2987  %6 = trunc <16 x i16> %5 to <16 x i8>2988  store <16 x i8> %6, ptr %next.gep21, align 12989  %index.next = add i32 %index, 162990  %7 = icmp eq i32 %index.next, %n.vec2991  br i1 %7, label %middle.block, label %vector.body2992 2993middle.block:                                     ; preds = %vector.body2994  %cmp.n = icmp eq i32 %n.vec, %N2995  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader232996 2997for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry2998  ret void2999 3000for.body:                                         ; preds = %for.body.preheader23, %for.body3001  %i.014 = phi i32 [ %inc, %for.body ], [ %i.014.ph, %for.body.preheader23 ]3002  %pSrcA.addr.013 = phi ptr [ %incdec.ptr, %for.body ], [ %pSrcA.addr.013.ph, %for.body.preheader23 ]3003  %pSrcB.addr.012 = phi ptr [ %incdec.ptr2, %for.body ], [ %pSrcB.addr.012.ph, %for.body.preheader23 ]3004  %pDst.addr.011 = phi ptr [ %incdec.ptr6, %for.body ], [ %pDst.addr.011.ph, %for.body.preheader23 ]3005  %incdec.ptr = getelementptr inbounds i8, ptr %pSrcA.addr.013, i32 13006  %8 = load i8, ptr %pSrcA.addr.013, align 13007  %conv1 = zext i8 %8 to i163008  %incdec.ptr2 = getelementptr inbounds i8, ptr %pSrcB.addr.012, i32 13009  %9 = load i8, ptr %pSrcB.addr.012, align 13010  %conv3 = zext i8 %9 to i163011  %mul = mul nuw i16 %conv3, %conv13012  %10 = lshr i16 %mul, 73013  %11 = icmp ult i16 %10, 2553014  %retval.0.i = select i1 %11, i16 %10, i16 2553015  %conv5 = trunc i16 %retval.0.i to i83016  %incdec.ptr6 = getelementptr inbounds i8, ptr %pDst.addr.011, i32 13017  store i8 %conv5, ptr %pDst.addr.011, align 13018  %inc = add nuw i32 %i.014, 13019  %exitcond = icmp eq i32 %inc, %N3020  br i1 %exitcond, label %for.cond.cleanup, label %for.body3021}3022 3023declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i32, <4 x i1>, <4 x i32>)3024declare <8 x i16> @llvm.masked.load.v8i16.p0(ptr, i32, <8 x i1>, <8 x i16>)3025declare <4 x i16> @llvm.masked.load.v4i16.p0(ptr, i32, <4 x i1>, <4 x i16>)3026declare <8 x i8> @llvm.masked.load.v8i8.p0(ptr, i32, <8 x i1>, <8 x i8>)3027declare <16 x i8> @llvm.masked.load.v16i8.p0(ptr, i32, <16 x i1>, <16 x i8>)3028declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i32, <4 x i1>)3029declare void @llvm.masked.store.v8i16.p0(<8 x i16>, ptr, i32, <8 x i1>)3030declare void @llvm.masked.store.v4i16.p0(<4 x i16>, ptr, i32, <4 x i1>)3031declare void @llvm.masked.store.v8i8.p0(<8 x i8>, ptr, i32, <8 x i1>)3032declare void @llvm.masked.store.v16i8.p0(<16 x i8>, ptr, i32, <16 x i1>)3033