168 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve %s -o - | FileCheck %s --check-prefix=CHECK-MVE3; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s --check-prefix=CHECK-MVEFP4 5define arm_aapcs_vfpcc void @vabd_v4f32(<4 x float> %x, <4 x float> %y, ptr %z) {6; CHECK-MVE-LABEL: vabd_v4f32:7; CHECK-MVE: @ %bb.0: @ %entry8; CHECK-MVE-NEXT: .save {r4, r5, r6, r7, r8, r9, lr}9; CHECK-MVE-NEXT: push.w {r4, r5, r6, r7, r8, r9, lr}10; CHECK-MVE-NEXT: .pad #411; CHECK-MVE-NEXT: sub sp, #412; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}13; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}14; CHECK-MVE-NEXT: vmov q4, q115; CHECK-MVE-NEXT: vmov q5, q016; CHECK-MVE-NEXT: mov r8, r017; CHECK-MVE-NEXT: vmov r0, r6, d1018; CHECK-MVE-NEXT: vmov r1, r7, d819; CHECK-MVE-NEXT: bl __aeabi_fsub20; CHECK-MVE-NEXT: mov r9, r021; CHECK-MVE-NEXT: mov r0, r622; CHECK-MVE-NEXT: mov r1, r723; CHECK-MVE-NEXT: bl __aeabi_fsub24; CHECK-MVE-NEXT: mov r6, r025; CHECK-MVE-NEXT: vmov r0, r7, d1126; CHECK-MVE-NEXT: vmov r1, r4, d927; CHECK-MVE-NEXT: bl __aeabi_fsub28; CHECK-MVE-NEXT: mov r5, r029; CHECK-MVE-NEXT: mov r0, r730; CHECK-MVE-NEXT: mov r1, r431; CHECK-MVE-NEXT: bl __aeabi_fsub32; CHECK-MVE-NEXT: bic r0, r0, #-214748364833; CHECK-MVE-NEXT: vmov s3, r034; CHECK-MVE-NEXT: bic r0, r5, #-214748364835; CHECK-MVE-NEXT: vmov s2, r036; CHECK-MVE-NEXT: bic r0, r6, #-214748364837; CHECK-MVE-NEXT: vmov s1, r038; CHECK-MVE-NEXT: bic r0, r9, #-214748364839; CHECK-MVE-NEXT: vmov s0, r040; CHECK-MVE-NEXT: vstrw.32 q0, [r8]41; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}42; CHECK-MVE-NEXT: add sp, #443; CHECK-MVE-NEXT: pop.w {r4, r5, r6, r7, r8, r9, pc}44;45; CHECK-MVEFP-LABEL: vabd_v4f32:46; CHECK-MVEFP: @ %bb.0: @ %entry47; CHECK-MVEFP-NEXT: vabd.f32 q0, q0, q148; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]49; CHECK-MVEFP-NEXT: bx lr50 51entry:52 %0 = fsub <4 x float> %x, %y53 %1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %0)54 store <4 x float> %1, ptr %z, align 455 ret void56}57 58define arm_aapcs_vfpcc void @vabd_v8f16(<8 x half> %x, <8 x half> %y, ptr %z) {59; CHECK-MVE-LABEL: vabd_v8f16:60; CHECK-MVE: @ %bb.0: @ %entry61; CHECK-MVE-NEXT: .save {r4, r5, r6, lr}62; CHECK-MVE-NEXT: push {r4, r5, r6, lr}63; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11, d12, d13}64; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11, d12, d13}65; CHECK-MVE-NEXT: mov r4, r066; CHECK-MVE-NEXT: vmov.u16 r0, q1[1]67; CHECK-MVE-NEXT: vmov q5, q168; CHECK-MVE-NEXT: vmov q4, q069; CHECK-MVE-NEXT: bl __aeabi_h2f70; CHECK-MVE-NEXT: mov r5, r071; CHECK-MVE-NEXT: vmov.u16 r0, q4[1]72; CHECK-MVE-NEXT: bl __aeabi_h2f73; CHECK-MVE-NEXT: mov r1, r574; CHECK-MVE-NEXT: bl __aeabi_fsub75; CHECK-MVE-NEXT: bl __aeabi_f2h76; CHECK-MVE-NEXT: mov r5, r077; CHECK-MVE-NEXT: vmov.u16 r0, q5[0]78; CHECK-MVE-NEXT: bl __aeabi_h2f79; CHECK-MVE-NEXT: mov r6, r080; CHECK-MVE-NEXT: vmov.u16 r0, q4[0]81; CHECK-MVE-NEXT: bl __aeabi_h2f82; CHECK-MVE-NEXT: mov r1, r683; CHECK-MVE-NEXT: bl __aeabi_fsub84; CHECK-MVE-NEXT: bl __aeabi_f2h85; CHECK-MVE-NEXT: bfc r0, #15, #1786; CHECK-MVE-NEXT: bfc r5, #15, #1787; CHECK-MVE-NEXT: vmov.16 q6[0], r088; CHECK-MVE-NEXT: vmov.u16 r0, q5[2]89; CHECK-MVE-NEXT: vmov.16 q6[1], r590; CHECK-MVE-NEXT: bl __aeabi_h2f91; CHECK-MVE-NEXT: mov r5, r092; CHECK-MVE-NEXT: vmov.u16 r0, q4[2]93; CHECK-MVE-NEXT: bl __aeabi_h2f94; CHECK-MVE-NEXT: mov r1, r595; CHECK-MVE-NEXT: bl __aeabi_fsub96; CHECK-MVE-NEXT: bl __aeabi_f2h97; CHECK-MVE-NEXT: bfc r0, #15, #1798; CHECK-MVE-NEXT: vmov.16 q6[2], r099; CHECK-MVE-NEXT: vmov.u16 r0, q5[3]100; CHECK-MVE-NEXT: bl __aeabi_h2f101; CHECK-MVE-NEXT: mov r5, r0102; CHECK-MVE-NEXT: vmov.u16 r0, q4[3]103; CHECK-MVE-NEXT: bl __aeabi_h2f104; CHECK-MVE-NEXT: mov r1, r5105; CHECK-MVE-NEXT: bl __aeabi_fsub106; CHECK-MVE-NEXT: bl __aeabi_f2h107; CHECK-MVE-NEXT: bfc r0, #15, #17108; CHECK-MVE-NEXT: vmov.16 q6[3], r0109; CHECK-MVE-NEXT: vmov.u16 r0, q5[4]110; CHECK-MVE-NEXT: bl __aeabi_h2f111; CHECK-MVE-NEXT: mov r5, r0112; CHECK-MVE-NEXT: vmov.u16 r0, q4[4]113; CHECK-MVE-NEXT: bl __aeabi_h2f114; CHECK-MVE-NEXT: mov r1, r5115; CHECK-MVE-NEXT: bl __aeabi_fsub116; CHECK-MVE-NEXT: bl __aeabi_f2h117; CHECK-MVE-NEXT: bfc r0, #15, #17118; CHECK-MVE-NEXT: vmov.16 q6[4], r0119; CHECK-MVE-NEXT: vmov.u16 r0, q5[5]120; CHECK-MVE-NEXT: bl __aeabi_h2f121; CHECK-MVE-NEXT: mov r5, r0122; CHECK-MVE-NEXT: vmov.u16 r0, q4[5]123; CHECK-MVE-NEXT: bl __aeabi_h2f124; CHECK-MVE-NEXT: mov r1, r5125; CHECK-MVE-NEXT: bl __aeabi_fsub126; CHECK-MVE-NEXT: bl __aeabi_f2h127; CHECK-MVE-NEXT: bfc r0, #15, #17128; CHECK-MVE-NEXT: vmov.16 q6[5], r0129; CHECK-MVE-NEXT: vmov.u16 r0, q5[6]130; CHECK-MVE-NEXT: bl __aeabi_h2f131; CHECK-MVE-NEXT: mov r5, r0132; CHECK-MVE-NEXT: vmov.u16 r0, q4[6]133; CHECK-MVE-NEXT: bl __aeabi_h2f134; CHECK-MVE-NEXT: mov r1, r5135; CHECK-MVE-NEXT: bl __aeabi_fsub136; CHECK-MVE-NEXT: bl __aeabi_f2h137; CHECK-MVE-NEXT: bfc r0, #15, #17138; CHECK-MVE-NEXT: vmov.16 q6[6], r0139; CHECK-MVE-NEXT: vmov.u16 r0, q5[7]140; CHECK-MVE-NEXT: bl __aeabi_h2f141; CHECK-MVE-NEXT: mov r5, r0142; CHECK-MVE-NEXT: vmov.u16 r0, q4[7]143; CHECK-MVE-NEXT: bl __aeabi_h2f144; CHECK-MVE-NEXT: mov r1, r5145; CHECK-MVE-NEXT: bl __aeabi_fsub146; CHECK-MVE-NEXT: bl __aeabi_f2h147; CHECK-MVE-NEXT: bfc r0, #15, #17148; CHECK-MVE-NEXT: vmov.16 q6[7], r0149; CHECK-MVE-NEXT: vstrw.32 q6, [r4]150; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11, d12, d13}151; CHECK-MVE-NEXT: pop {r4, r5, r6, pc}152;153; CHECK-MVEFP-LABEL: vabd_v8f16:154; CHECK-MVEFP: @ %bb.0: @ %entry155; CHECK-MVEFP-NEXT: vabd.f16 q0, q0, q1156; CHECK-MVEFP-NEXT: vstrw.32 q0, [r0]157; CHECK-MVEFP-NEXT: bx lr158 159entry:160 %0 = fsub <8 x half> %x, %y161 %1 = call <8 x half> @llvm.fabs.v8f16(<8 x half> %0)162 store <8 x half> %1, ptr %z163 ret void164}165 166declare <4 x float> @llvm.fabs.v4f32(<4 x float>)167declare <8 x half> @llvm.fabs.v8f16(<8 x half>)168