1624 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-MVE3; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-MVEFP4 5define arm_aapcs_vfpcc <4 x float> @vcmp_oeq_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {6; CHECK-MVE-LABEL: vcmp_oeq_v4f32:7; CHECK-MVE: @ %bb.0: @ %entry8; CHECK-MVE-NEXT: vcmp.f32 s0, s49; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr10; CHECK-MVE-NEXT: vcmp.f32 s3, s711; CHECK-MVE-NEXT: cset r0, eq12; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr13; CHECK-MVE-NEXT: vcmp.f32 s1, s514; CHECK-MVE-NEXT: cset r1, eq15; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr16; CHECK-MVE-NEXT: vcmp.f32 s2, s617; CHECK-MVE-NEXT: cset r2, eq18; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr19; CHECK-MVE-NEXT: cset r3, eq20; CHECK-MVE-NEXT: cmp r3, #021; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s1022; CHECK-MVE-NEXT: cmp r2, #023; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s924; CHECK-MVE-NEXT: cmp r1, #025; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s1126; CHECK-MVE-NEXT: cmp r0, #027; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s828; CHECK-MVE-NEXT: bx lr29;30; CHECK-MVEFP-LABEL: vcmp_oeq_v4f32:31; CHECK-MVEFP: @ %bb.0: @ %entry32; CHECK-MVEFP-NEXT: vcmp.f32 eq, q0, q133; CHECK-MVEFP-NEXT: vpsel q0, q2, q334; CHECK-MVEFP-NEXT: bx lr35entry:36 %c = fcmp oeq <4 x float> %src, %src237 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b38 ret <4 x float> %s39}40 41define arm_aapcs_vfpcc <4 x float> @vcmp_one_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {42; CHECK-MVE-LABEL: vcmp_one_v4f32:43; CHECK-MVE: @ %bb.0: @ %entry44; CHECK-MVE-NEXT: vcmp.f32 s0, s445; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr46; CHECK-MVE-NEXT: vcmp.f32 s3, s747; CHECK-MVE-NEXT: cset r0, mi48; CHECK-MVE-NEXT: csinc r0, r0, zr, le49; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr50; CHECK-MVE-NEXT: vcmp.f32 s1, s551; CHECK-MVE-NEXT: cset r1, mi52; CHECK-MVE-NEXT: csinc r1, r1, zr, le53; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr54; CHECK-MVE-NEXT: vcmp.f32 s2, s655; CHECK-MVE-NEXT: cset r2, mi56; CHECK-MVE-NEXT: csinc r2, r2, zr, le57; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr58; CHECK-MVE-NEXT: cset r3, mi59; CHECK-MVE-NEXT: csinc r3, r3, zr, le60; CHECK-MVE-NEXT: cmp r3, #061; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s1062; CHECK-MVE-NEXT: cmp r2, #063; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s964; CHECK-MVE-NEXT: cmp r1, #065; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s1166; CHECK-MVE-NEXT: cmp r0, #067; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s868; CHECK-MVE-NEXT: bx lr69;70; CHECK-MVEFP-LABEL: vcmp_one_v4f32:71; CHECK-MVEFP: @ %bb.0: @ %entry72; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q073; CHECK-MVEFP-NEXT: vcmpt.f32 le, q0, q174; CHECK-MVEFP-NEXT: vpsel q0, q3, q275; CHECK-MVEFP-NEXT: bx lr76entry:77 %c = fcmp one <4 x float> %src, %src278 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b79 ret <4 x float> %s80}81 82define arm_aapcs_vfpcc <4 x float> @vcmp_ogt_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {83; CHECK-MVE-LABEL: vcmp_ogt_v4f32:84; CHECK-MVE: @ %bb.0: @ %entry85; CHECK-MVE-NEXT: vcmp.f32 s0, s486; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr87; CHECK-MVE-NEXT: vcmp.f32 s3, s788; CHECK-MVE-NEXT: cset r0, gt89; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr90; CHECK-MVE-NEXT: vcmp.f32 s1, s591; CHECK-MVE-NEXT: cset r1, gt92; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr93; CHECK-MVE-NEXT: vcmp.f32 s2, s694; CHECK-MVE-NEXT: cset r2, gt95; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr96; CHECK-MVE-NEXT: cset r3, gt97; CHECK-MVE-NEXT: cmp r3, #098; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s1099; CHECK-MVE-NEXT: cmp r2, #0100; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9101; CHECK-MVE-NEXT: cmp r1, #0102; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11103; CHECK-MVE-NEXT: cmp r0, #0104; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8105; CHECK-MVE-NEXT: bx lr106;107; CHECK-MVEFP-LABEL: vcmp_ogt_v4f32:108; CHECK-MVEFP: @ %bb.0: @ %entry109; CHECK-MVEFP-NEXT: vcmp.f32 gt, q0, q1110; CHECK-MVEFP-NEXT: vpsel q0, q2, q3111; CHECK-MVEFP-NEXT: bx lr112entry:113 %c = fcmp ogt <4 x float> %src, %src2114 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b115 ret <4 x float> %s116}117 118define arm_aapcs_vfpcc <4 x float> @vcmp_oge_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {119; CHECK-MVE-LABEL: vcmp_oge_v4f32:120; CHECK-MVE: @ %bb.0: @ %entry121; CHECK-MVE-NEXT: vcmp.f32 s0, s4122; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr123; CHECK-MVE-NEXT: vcmp.f32 s3, s7124; CHECK-MVE-NEXT: cset r0, ge125; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr126; CHECK-MVE-NEXT: vcmp.f32 s1, s5127; CHECK-MVE-NEXT: cset r1, ge128; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr129; CHECK-MVE-NEXT: vcmp.f32 s2, s6130; CHECK-MVE-NEXT: cset r2, ge131; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr132; CHECK-MVE-NEXT: cset r3, ge133; CHECK-MVE-NEXT: cmp r3, #0134; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10135; CHECK-MVE-NEXT: cmp r2, #0136; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9137; CHECK-MVE-NEXT: cmp r1, #0138; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11139; CHECK-MVE-NEXT: cmp r0, #0140; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8141; CHECK-MVE-NEXT: bx lr142;143; CHECK-MVEFP-LABEL: vcmp_oge_v4f32:144; CHECK-MVEFP: @ %bb.0: @ %entry145; CHECK-MVEFP-NEXT: vcmp.f32 ge, q0, q1146; CHECK-MVEFP-NEXT: vpsel q0, q2, q3147; CHECK-MVEFP-NEXT: bx lr148entry:149 %c = fcmp oge <4 x float> %src, %src2150 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b151 ret <4 x float> %s152}153 154define arm_aapcs_vfpcc <4 x float> @vcmp_olt_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {155; CHECK-MVE-LABEL: vcmp_olt_v4f32:156; CHECK-MVE: @ %bb.0: @ %entry157; CHECK-MVE-NEXT: vcmp.f32 s0, s4158; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr159; CHECK-MVE-NEXT: vcmp.f32 s3, s7160; CHECK-MVE-NEXT: cset r0, mi161; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr162; CHECK-MVE-NEXT: vcmp.f32 s1, s5163; CHECK-MVE-NEXT: cset r1, mi164; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr165; CHECK-MVE-NEXT: vcmp.f32 s2, s6166; CHECK-MVE-NEXT: cset r2, mi167; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr168; CHECK-MVE-NEXT: cset r3, mi169; CHECK-MVE-NEXT: cmp r3, #0170; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10171; CHECK-MVE-NEXT: cmp r2, #0172; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9173; CHECK-MVE-NEXT: cmp r1, #0174; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11175; CHECK-MVE-NEXT: cmp r0, #0176; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8177; CHECK-MVE-NEXT: bx lr178;179; CHECK-MVEFP-LABEL: vcmp_olt_v4f32:180; CHECK-MVEFP: @ %bb.0: @ %entry181; CHECK-MVEFP-NEXT: vcmp.f32 gt, q1, q0182; CHECK-MVEFP-NEXT: vpsel q0, q2, q3183; CHECK-MVEFP-NEXT: bx lr184entry:185 %c = fcmp olt <4 x float> %src, %src2186 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b187 ret <4 x float> %s188}189 190define arm_aapcs_vfpcc <4 x float> @vcmp_ole_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {191; CHECK-MVE-LABEL: vcmp_ole_v4f32:192; CHECK-MVE: @ %bb.0: @ %entry193; CHECK-MVE-NEXT: vcmp.f32 s0, s4194; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr195; CHECK-MVE-NEXT: vcmp.f32 s3, s7196; CHECK-MVE-NEXT: cset r0, ls197; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr198; CHECK-MVE-NEXT: vcmp.f32 s1, s5199; CHECK-MVE-NEXT: cset r1, ls200; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr201; CHECK-MVE-NEXT: vcmp.f32 s2, s6202; CHECK-MVE-NEXT: cset r2, ls203; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr204; CHECK-MVE-NEXT: cset r3, ls205; CHECK-MVE-NEXT: cmp r3, #0206; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10207; CHECK-MVE-NEXT: cmp r2, #0208; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9209; CHECK-MVE-NEXT: cmp r1, #0210; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11211; CHECK-MVE-NEXT: cmp r0, #0212; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8213; CHECK-MVE-NEXT: bx lr214;215; CHECK-MVEFP-LABEL: vcmp_ole_v4f32:216; CHECK-MVEFP: @ %bb.0: @ %entry217; CHECK-MVEFP-NEXT: vcmp.f32 ge, q1, q0218; CHECK-MVEFP-NEXT: vpsel q0, q2, q3219; CHECK-MVEFP-NEXT: bx lr220entry:221 %c = fcmp ole <4 x float> %src, %src2222 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b223 ret <4 x float> %s224}225 226define arm_aapcs_vfpcc <4 x float> @vcmp_ueq_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {227; CHECK-MVE-LABEL: vcmp_ueq_v4f32:228; CHECK-MVE: @ %bb.0: @ %entry229; CHECK-MVE-NEXT: vcmp.f32 s0, s4230; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr231; CHECK-MVE-NEXT: vcmp.f32 s3, s7232; CHECK-MVE-NEXT: cset r0, eq233; CHECK-MVE-NEXT: csinc r0, r0, zr, vc234; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr235; CHECK-MVE-NEXT: vcmp.f32 s1, s5236; CHECK-MVE-NEXT: cset r1, eq237; CHECK-MVE-NEXT: csinc r1, r1, zr, vc238; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr239; CHECK-MVE-NEXT: vcmp.f32 s2, s6240; CHECK-MVE-NEXT: cset r2, eq241; CHECK-MVE-NEXT: csinc r2, r2, zr, vc242; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr243; CHECK-MVE-NEXT: cset r3, eq244; CHECK-MVE-NEXT: csinc r3, r3, zr, vc245; CHECK-MVE-NEXT: cmp r3, #0246; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10247; CHECK-MVE-NEXT: cmp r2, #0248; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9249; CHECK-MVE-NEXT: cmp r1, #0250; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11251; CHECK-MVE-NEXT: cmp r0, #0252; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8253; CHECK-MVE-NEXT: bx lr254;255; CHECK-MVEFP-LABEL: vcmp_ueq_v4f32:256; CHECK-MVEFP: @ %bb.0: @ %entry257; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q0258; CHECK-MVEFP-NEXT: vcmpt.f32 le, q0, q1259; CHECK-MVEFP-NEXT: vpsel q0, q2, q3260; CHECK-MVEFP-NEXT: bx lr261entry:262 %c = fcmp ueq <4 x float> %src, %src2263 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b264 ret <4 x float> %s265}266 267define arm_aapcs_vfpcc <4 x float> @vcmp_une_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {268; CHECK-MVE-LABEL: vcmp_une_v4f32:269; CHECK-MVE: @ %bb.0: @ %entry270; CHECK-MVE-NEXT: vcmp.f32 s2, s6271; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr272; CHECK-MVE-NEXT: vcmp.f32 s1, s5273; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10274; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr275; CHECK-MVE-NEXT: vcmp.f32 s3, s7276; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9277; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr278; CHECK-MVE-NEXT: vcmp.f32 s0, s4279; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11280; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr281; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8282; CHECK-MVE-NEXT: bx lr283;284; CHECK-MVEFP-LABEL: vcmp_une_v4f32:285; CHECK-MVEFP: @ %bb.0: @ %entry286; CHECK-MVEFP-NEXT: vcmp.f32 ne, q0, q1287; CHECK-MVEFP-NEXT: vpsel q0, q2, q3288; CHECK-MVEFP-NEXT: bx lr289entry:290 %c = fcmp une <4 x float> %src, %src2291 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b292 ret <4 x float> %s293}294 295define arm_aapcs_vfpcc <4 x float> @vcmp_ugt_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {296; CHECK-MVE-LABEL: vcmp_ugt_v4f32:297; CHECK-MVE: @ %bb.0: @ %entry298; CHECK-MVE-NEXT: vcmp.f32 s0, s4299; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr300; CHECK-MVE-NEXT: vcmp.f32 s3, s7301; CHECK-MVE-NEXT: cset r0, hi302; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr303; CHECK-MVE-NEXT: vcmp.f32 s1, s5304; CHECK-MVE-NEXT: cset r1, hi305; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr306; CHECK-MVE-NEXT: vcmp.f32 s2, s6307; CHECK-MVE-NEXT: cset r2, hi308; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr309; CHECK-MVE-NEXT: cset r3, hi310; CHECK-MVE-NEXT: cmp r3, #0311; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10312; CHECK-MVE-NEXT: cmp r2, #0313; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9314; CHECK-MVE-NEXT: cmp r1, #0315; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11316; CHECK-MVE-NEXT: cmp r0, #0317; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8318; CHECK-MVE-NEXT: bx lr319;320; CHECK-MVEFP-LABEL: vcmp_ugt_v4f32:321; CHECK-MVEFP: @ %bb.0: @ %entry322; CHECK-MVEFP-NEXT: vcmp.f32 lt, q1, q0323; CHECK-MVEFP-NEXT: vpsel q0, q2, q3324; CHECK-MVEFP-NEXT: bx lr325entry:326 %c = fcmp ugt <4 x float> %src, %src2327 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b328 ret <4 x float> %s329}330 331define arm_aapcs_vfpcc <4 x float> @vcmp_uge_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {332; CHECK-MVE-LABEL: vcmp_uge_v4f32:333; CHECK-MVE: @ %bb.0: @ %entry334; CHECK-MVE-NEXT: vcmp.f32 s0, s4335; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr336; CHECK-MVE-NEXT: vcmp.f32 s3, s7337; CHECK-MVE-NEXT: cset r0, pl338; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr339; CHECK-MVE-NEXT: vcmp.f32 s1, s5340; CHECK-MVE-NEXT: cset r1, pl341; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr342; CHECK-MVE-NEXT: vcmp.f32 s2, s6343; CHECK-MVE-NEXT: cset r2, pl344; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr345; CHECK-MVE-NEXT: cset r3, pl346; CHECK-MVE-NEXT: cmp r3, #0347; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10348; CHECK-MVE-NEXT: cmp r2, #0349; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9350; CHECK-MVE-NEXT: cmp r1, #0351; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11352; CHECK-MVE-NEXT: cmp r0, #0353; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8354; CHECK-MVE-NEXT: bx lr355;356; CHECK-MVEFP-LABEL: vcmp_uge_v4f32:357; CHECK-MVEFP: @ %bb.0: @ %entry358; CHECK-MVEFP-NEXT: vcmp.f32 le, q1, q0359; CHECK-MVEFP-NEXT: vpsel q0, q2, q3360; CHECK-MVEFP-NEXT: bx lr361entry:362 %c = fcmp uge <4 x float> %src, %src2363 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b364 ret <4 x float> %s365}366 367define arm_aapcs_vfpcc <4 x float> @vcmp_ult_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {368; CHECK-MVE-LABEL: vcmp_ult_v4f32:369; CHECK-MVE: @ %bb.0: @ %entry370; CHECK-MVE-NEXT: vcmp.f32 s0, s4371; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr372; CHECK-MVE-NEXT: vcmp.f32 s3, s7373; CHECK-MVE-NEXT: cset r0, lt374; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr375; CHECK-MVE-NEXT: vcmp.f32 s1, s5376; CHECK-MVE-NEXT: cset r1, lt377; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr378; CHECK-MVE-NEXT: vcmp.f32 s2, s6379; CHECK-MVE-NEXT: cset r2, lt380; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr381; CHECK-MVE-NEXT: cset r3, lt382; CHECK-MVE-NEXT: cmp r3, #0383; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10384; CHECK-MVE-NEXT: cmp r2, #0385; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9386; CHECK-MVE-NEXT: cmp r1, #0387; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11388; CHECK-MVE-NEXT: cmp r0, #0389; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8390; CHECK-MVE-NEXT: bx lr391;392; CHECK-MVEFP-LABEL: vcmp_ult_v4f32:393; CHECK-MVEFP: @ %bb.0: @ %entry394; CHECK-MVEFP-NEXT: vcmp.f32 lt, q0, q1395; CHECK-MVEFP-NEXT: vpsel q0, q2, q3396; CHECK-MVEFP-NEXT: bx lr397entry:398 %c = fcmp ult <4 x float> %src, %src2399 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b400 ret <4 x float> %s401}402 403define arm_aapcs_vfpcc <4 x float> @vcmp_ule_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {404; CHECK-MVE-LABEL: vcmp_ule_v4f32:405; CHECK-MVE: @ %bb.0: @ %entry406; CHECK-MVE-NEXT: vcmp.f32 s0, s4407; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr408; CHECK-MVE-NEXT: vcmp.f32 s3, s7409; CHECK-MVE-NEXT: cset r0, le410; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr411; CHECK-MVE-NEXT: vcmp.f32 s1, s5412; CHECK-MVE-NEXT: cset r1, le413; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr414; CHECK-MVE-NEXT: vcmp.f32 s2, s6415; CHECK-MVE-NEXT: cset r2, le416; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr417; CHECK-MVE-NEXT: cset r3, le418; CHECK-MVE-NEXT: cmp r3, #0419; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10420; CHECK-MVE-NEXT: cmp r2, #0421; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9422; CHECK-MVE-NEXT: cmp r1, #0423; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11424; CHECK-MVE-NEXT: cmp r0, #0425; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8426; CHECK-MVE-NEXT: bx lr427;428; CHECK-MVEFP-LABEL: vcmp_ule_v4f32:429; CHECK-MVEFP: @ %bb.0: @ %entry430; CHECK-MVEFP-NEXT: vcmp.f32 le, q0, q1431; CHECK-MVEFP-NEXT: vpsel q0, q2, q3432; CHECK-MVEFP-NEXT: bx lr433entry:434 %c = fcmp ule <4 x float> %src, %src2435 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b436 ret <4 x float> %s437}438 439define arm_aapcs_vfpcc <4 x float> @vcmp_ord_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {440; CHECK-MVE-LABEL: vcmp_ord_v4f32:441; CHECK-MVE: @ %bb.0: @ %entry442; CHECK-MVE-NEXT: vcmp.f32 s0, s4443; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr444; CHECK-MVE-NEXT: vcmp.f32 s3, s7445; CHECK-MVE-NEXT: cset r0, vc446; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr447; CHECK-MVE-NEXT: vcmp.f32 s1, s5448; CHECK-MVE-NEXT: cset r1, vc449; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr450; CHECK-MVE-NEXT: vcmp.f32 s2, s6451; CHECK-MVE-NEXT: cset r2, vc452; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr453; CHECK-MVE-NEXT: cset r3, vc454; CHECK-MVE-NEXT: cmp r3, #0455; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10456; CHECK-MVE-NEXT: cmp r2, #0457; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9458; CHECK-MVE-NEXT: cmp r1, #0459; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11460; CHECK-MVE-NEXT: cmp r0, #0461; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8462; CHECK-MVE-NEXT: bx lr463;464; CHECK-MVEFP-LABEL: vcmp_ord_v4f32:465; CHECK-MVEFP: @ %bb.0: @ %entry466; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q0467; CHECK-MVEFP-NEXT: vcmpt.f32 lt, q0, q1468; CHECK-MVEFP-NEXT: vpsel q0, q3, q2469; CHECK-MVEFP-NEXT: bx lr470entry:471 %c = fcmp ord <4 x float> %src, %src2472 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b473 ret <4 x float> %s474}475 476define arm_aapcs_vfpcc <4 x float> @vcmp_uno_v4f32(<4 x float> %src, <4 x float> %src2, <4 x float> %a, <4 x float> %b) {477; CHECK-MVE-LABEL: vcmp_uno_v4f32:478; CHECK-MVE: @ %bb.0: @ %entry479; CHECK-MVE-NEXT: vcmp.f32 s0, s4480; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr481; CHECK-MVE-NEXT: vcmp.f32 s3, s7482; CHECK-MVE-NEXT: cset r0, vs483; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr484; CHECK-MVE-NEXT: vcmp.f32 s1, s5485; CHECK-MVE-NEXT: cset r1, vs486; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr487; CHECK-MVE-NEXT: vcmp.f32 s2, s6488; CHECK-MVE-NEXT: cset r2, vs489; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr490; CHECK-MVE-NEXT: cset r3, vs491; CHECK-MVE-NEXT: cmp r3, #0492; CHECK-MVE-NEXT: vseleq.f32 s2, s14, s10493; CHECK-MVE-NEXT: cmp r2, #0494; CHECK-MVE-NEXT: vseleq.f32 s1, s13, s9495; CHECK-MVE-NEXT: cmp r1, #0496; CHECK-MVE-NEXT: vseleq.f32 s3, s15, s11497; CHECK-MVE-NEXT: cmp r0, #0498; CHECK-MVE-NEXT: vseleq.f32 s0, s12, s8499; CHECK-MVE-NEXT: bx lr500;501; CHECK-MVEFP-LABEL: vcmp_uno_v4f32:502; CHECK-MVEFP: @ %bb.0: @ %entry503; CHECK-MVEFP-NEXT: vpt.f32 le, q1, q0504; CHECK-MVEFP-NEXT: vcmpt.f32 lt, q0, q1505; CHECK-MVEFP-NEXT: vpsel q0, q2, q3506; CHECK-MVEFP-NEXT: bx lr507entry:508 %c = fcmp uno <4 x float> %src, %src2509 %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b510 ret <4 x float> %s511}512 513 514 515define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {516; CHECK-MVE-LABEL: vcmp_oeq_v8f16:517; CHECK-MVE: @ %bb.0: @ %entry518; CHECK-MVE-NEXT: .vsave {d8, d9}519; CHECK-MVE-NEXT: vpush {d8, d9}520; CHECK-MVE-NEXT: vmovx.f16 s16, s4521; CHECK-MVE-NEXT: vmovx.f16 s18, s0522; CHECK-MVE-NEXT: vcmp.f16 s18, s16523; CHECK-MVE-NEXT: vmovx.f16 s16, s8524; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr525; CHECK-MVE-NEXT: vcmp.f16 s0, s4526; CHECK-MVE-NEXT: vmovx.f16 s18, s12527; CHECK-MVE-NEXT: vmovx.f16 s4, s5528; CHECK-MVE-NEXT: cset r0, eq529; CHECK-MVE-NEXT: cmp r0, #0530; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16531; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr532; CHECK-MVE-NEXT: cset r0, eq533; CHECK-MVE-NEXT: cmp r0, #0534; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s8535; CHECK-MVE-NEXT: vmovx.f16 s8, s1536; CHECK-MVE-NEXT: vcmp.f16 s8, s4537; CHECK-MVE-NEXT: vmovx.f16 s4, s9538; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr539; CHECK-MVE-NEXT: vmovx.f16 s8, s13540; CHECK-MVE-NEXT: vcmp.f16 s1, s5541; CHECK-MVE-NEXT: vins.f16 s0, s16542; CHECK-MVE-NEXT: cset r0, eq543; CHECK-MVE-NEXT: cmp r0, #0544; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4545; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr546; CHECK-MVE-NEXT: vmovx.f16 s8, s2547; CHECK-MVE-NEXT: cset r0, eq548; CHECK-MVE-NEXT: cmp r0, #0549; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s9550; CHECK-MVE-NEXT: vins.f16 s1, s4551; CHECK-MVE-NEXT: vmovx.f16 s4, s6552; CHECK-MVE-NEXT: vcmp.f16 s8, s4553; CHECK-MVE-NEXT: vmovx.f16 s4, s10554; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr555; CHECK-MVE-NEXT: vcmp.f16 s2, s6556; CHECK-MVE-NEXT: vmovx.f16 s8, s14557; CHECK-MVE-NEXT: vmovx.f16 s6, s3558; CHECK-MVE-NEXT: cset r0, eq559; CHECK-MVE-NEXT: cmp r0, #0560; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4561; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr562; CHECK-MVE-NEXT: cset r0, eq563; CHECK-MVE-NEXT: cmp r0, #0564; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s10565; CHECK-MVE-NEXT: vins.f16 s2, s4566; CHECK-MVE-NEXT: vmovx.f16 s4, s7567; CHECK-MVE-NEXT: vcmp.f16 s6, s4568; CHECK-MVE-NEXT: vmovx.f16 s4, s11569; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr570; CHECK-MVE-NEXT: vmovx.f16 s6, s15571; CHECK-MVE-NEXT: vcmp.f16 s3, s7572; CHECK-MVE-NEXT: cset r0, eq573; CHECK-MVE-NEXT: cmp r0, #0574; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s4575; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr576; CHECK-MVE-NEXT: cset r0, eq577; CHECK-MVE-NEXT: cmp r0, #0578; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s11579; CHECK-MVE-NEXT: vins.f16 s3, s4580; CHECK-MVE-NEXT: vpop {d8, d9}581; CHECK-MVE-NEXT: bx lr582;583; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16:584; CHECK-MVEFP: @ %bb.0: @ %entry585; CHECK-MVEFP-NEXT: vcmp.f16 eq, q0, q1586; CHECK-MVEFP-NEXT: vpsel q0, q2, q3587; CHECK-MVEFP-NEXT: bx lr588entry:589 %c = fcmp oeq <8 x half> %src, %src2590 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b591 ret <8 x half> %s592}593 594define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {595; CHECK-MVE-LABEL: vcmp_one_v8f16:596; CHECK-MVE: @ %bb.0: @ %entry597; CHECK-MVE-NEXT: .vsave {d8, d9}598; CHECK-MVE-NEXT: vpush {d8, d9}599; CHECK-MVE-NEXT: vmovx.f16 s16, s4600; CHECK-MVE-NEXT: vmovx.f16 s18, s0601; CHECK-MVE-NEXT: vcmp.f16 s18, s16602; CHECK-MVE-NEXT: vmovx.f16 s16, s8603; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr604; CHECK-MVE-NEXT: vcmp.f16 s0, s4605; CHECK-MVE-NEXT: vmovx.f16 s18, s12606; CHECK-MVE-NEXT: vmovx.f16 s4, s5607; CHECK-MVE-NEXT: cset r0, mi608; CHECK-MVE-NEXT: csinc r0, r0, zr, le609; CHECK-MVE-NEXT: cmp r0, #0610; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16611; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr612; CHECK-MVE-NEXT: cset r0, mi613; CHECK-MVE-NEXT: csinc r0, r0, zr, le614; CHECK-MVE-NEXT: cmp r0, #0615; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s8616; CHECK-MVE-NEXT: vmovx.f16 s8, s1617; CHECK-MVE-NEXT: vcmp.f16 s8, s4618; CHECK-MVE-NEXT: vmovx.f16 s4, s9619; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr620; CHECK-MVE-NEXT: vmovx.f16 s8, s13621; CHECK-MVE-NEXT: vcmp.f16 s1, s5622; CHECK-MVE-NEXT: vins.f16 s0, s16623; CHECK-MVE-NEXT: cset r0, mi624; CHECK-MVE-NEXT: csinc r0, r0, zr, le625; CHECK-MVE-NEXT: cmp r0, #0626; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4627; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr628; CHECK-MVE-NEXT: vmovx.f16 s8, s2629; CHECK-MVE-NEXT: cset r0, mi630; CHECK-MVE-NEXT: csinc r0, r0, zr, le631; CHECK-MVE-NEXT: cmp r0, #0632; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s9633; CHECK-MVE-NEXT: vins.f16 s1, s4634; CHECK-MVE-NEXT: vmovx.f16 s4, s6635; CHECK-MVE-NEXT: vcmp.f16 s8, s4636; CHECK-MVE-NEXT: vmovx.f16 s4, s10637; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr638; CHECK-MVE-NEXT: vcmp.f16 s2, s6639; CHECK-MVE-NEXT: vmovx.f16 s8, s14640; CHECK-MVE-NEXT: vmovx.f16 s6, s3641; CHECK-MVE-NEXT: cset r0, mi642; CHECK-MVE-NEXT: csinc r0, r0, zr, le643; CHECK-MVE-NEXT: cmp r0, #0644; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4645; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr646; CHECK-MVE-NEXT: cset r0, mi647; CHECK-MVE-NEXT: csinc r0, r0, zr, le648; CHECK-MVE-NEXT: cmp r0, #0649; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s10650; CHECK-MVE-NEXT: vins.f16 s2, s4651; CHECK-MVE-NEXT: vmovx.f16 s4, s7652; CHECK-MVE-NEXT: vcmp.f16 s6, s4653; CHECK-MVE-NEXT: vmovx.f16 s4, s11654; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr655; CHECK-MVE-NEXT: vmovx.f16 s6, s15656; CHECK-MVE-NEXT: vcmp.f16 s3, s7657; CHECK-MVE-NEXT: cset r0, mi658; CHECK-MVE-NEXT: csinc r0, r0, zr, le659; CHECK-MVE-NEXT: cmp r0, #0660; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s4661; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr662; CHECK-MVE-NEXT: cset r0, mi663; CHECK-MVE-NEXT: csinc r0, r0, zr, le664; CHECK-MVE-NEXT: cmp r0, #0665; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s11666; CHECK-MVE-NEXT: vins.f16 s3, s4667; CHECK-MVE-NEXT: vpop {d8, d9}668; CHECK-MVE-NEXT: bx lr669;670; CHECK-MVEFP-LABEL: vcmp_one_v8f16:671; CHECK-MVEFP: @ %bb.0: @ %entry672; CHECK-MVEFP-NEXT: vpt.f16 le, q1, q0673; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, q1674; CHECK-MVEFP-NEXT: vpsel q0, q3, q2675; CHECK-MVEFP-NEXT: bx lr676entry:677 %c = fcmp one <8 x half> %src, %src2678 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b679 ret <8 x half> %s680}681 682define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {683; CHECK-MVE-LABEL: vcmp_ogt_v8f16:684; CHECK-MVE: @ %bb.0: @ %entry685; CHECK-MVE-NEXT: .vsave {d8, d9}686; CHECK-MVE-NEXT: vpush {d8, d9}687; CHECK-MVE-NEXT: vmovx.f16 s16, s4688; CHECK-MVE-NEXT: vmovx.f16 s18, s0689; CHECK-MVE-NEXT: vcmp.f16 s18, s16690; CHECK-MVE-NEXT: vmovx.f16 s16, s8691; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr692; CHECK-MVE-NEXT: vcmp.f16 s0, s4693; CHECK-MVE-NEXT: vmovx.f16 s18, s12694; CHECK-MVE-NEXT: vmovx.f16 s4, s5695; CHECK-MVE-NEXT: cset r0, gt696; CHECK-MVE-NEXT: cmp r0, #0697; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16698; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr699; CHECK-MVE-NEXT: cset r0, gt700; CHECK-MVE-NEXT: cmp r0, #0701; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s8702; CHECK-MVE-NEXT: vmovx.f16 s8, s1703; CHECK-MVE-NEXT: vcmp.f16 s8, s4704; CHECK-MVE-NEXT: vmovx.f16 s4, s9705; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr706; CHECK-MVE-NEXT: vmovx.f16 s8, s13707; CHECK-MVE-NEXT: vcmp.f16 s1, s5708; CHECK-MVE-NEXT: vins.f16 s0, s16709; CHECK-MVE-NEXT: cset r0, gt710; CHECK-MVE-NEXT: cmp r0, #0711; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4712; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr713; CHECK-MVE-NEXT: vmovx.f16 s8, s2714; CHECK-MVE-NEXT: cset r0, gt715; CHECK-MVE-NEXT: cmp r0, #0716; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s9717; CHECK-MVE-NEXT: vins.f16 s1, s4718; CHECK-MVE-NEXT: vmovx.f16 s4, s6719; CHECK-MVE-NEXT: vcmp.f16 s8, s4720; CHECK-MVE-NEXT: vmovx.f16 s4, s10721; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr722; CHECK-MVE-NEXT: vcmp.f16 s2, s6723; CHECK-MVE-NEXT: vmovx.f16 s8, s14724; CHECK-MVE-NEXT: vmovx.f16 s6, s3725; CHECK-MVE-NEXT: cset r0, gt726; CHECK-MVE-NEXT: cmp r0, #0727; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4728; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr729; CHECK-MVE-NEXT: cset r0, gt730; CHECK-MVE-NEXT: cmp r0, #0731; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s10732; CHECK-MVE-NEXT: vins.f16 s2, s4733; CHECK-MVE-NEXT: vmovx.f16 s4, s7734; CHECK-MVE-NEXT: vcmp.f16 s6, s4735; CHECK-MVE-NEXT: vmovx.f16 s4, s11736; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr737; CHECK-MVE-NEXT: vmovx.f16 s6, s15738; CHECK-MVE-NEXT: vcmp.f16 s3, s7739; CHECK-MVE-NEXT: cset r0, gt740; CHECK-MVE-NEXT: cmp r0, #0741; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s4742; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr743; CHECK-MVE-NEXT: cset r0, gt744; CHECK-MVE-NEXT: cmp r0, #0745; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s11746; CHECK-MVE-NEXT: vins.f16 s3, s4747; CHECK-MVE-NEXT: vpop {d8, d9}748; CHECK-MVE-NEXT: bx lr749;750; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16:751; CHECK-MVEFP: @ %bb.0: @ %entry752; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, q1753; CHECK-MVEFP-NEXT: vpsel q0, q2, q3754; CHECK-MVEFP-NEXT: bx lr755entry:756 %c = fcmp ogt <8 x half> %src, %src2757 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b758 ret <8 x half> %s759}760 761define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {762; CHECK-MVE-LABEL: vcmp_oge_v8f16:763; CHECK-MVE: @ %bb.0: @ %entry764; CHECK-MVE-NEXT: .vsave {d8, d9}765; CHECK-MVE-NEXT: vpush {d8, d9}766; CHECK-MVE-NEXT: vmovx.f16 s16, s4767; CHECK-MVE-NEXT: vmovx.f16 s18, s0768; CHECK-MVE-NEXT: vcmp.f16 s18, s16769; CHECK-MVE-NEXT: vmovx.f16 s16, s8770; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr771; CHECK-MVE-NEXT: vcmp.f16 s0, s4772; CHECK-MVE-NEXT: vmovx.f16 s18, s12773; CHECK-MVE-NEXT: vmovx.f16 s4, s5774; CHECK-MVE-NEXT: cset r0, ge775; CHECK-MVE-NEXT: cmp r0, #0776; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16777; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr778; CHECK-MVE-NEXT: cset r0, ge779; CHECK-MVE-NEXT: cmp r0, #0780; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s8781; CHECK-MVE-NEXT: vmovx.f16 s8, s1782; CHECK-MVE-NEXT: vcmp.f16 s8, s4783; CHECK-MVE-NEXT: vmovx.f16 s4, s9784; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr785; CHECK-MVE-NEXT: vmovx.f16 s8, s13786; CHECK-MVE-NEXT: vcmp.f16 s1, s5787; CHECK-MVE-NEXT: vins.f16 s0, s16788; CHECK-MVE-NEXT: cset r0, ge789; CHECK-MVE-NEXT: cmp r0, #0790; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4791; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr792; CHECK-MVE-NEXT: vmovx.f16 s8, s2793; CHECK-MVE-NEXT: cset r0, ge794; CHECK-MVE-NEXT: cmp r0, #0795; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s9796; CHECK-MVE-NEXT: vins.f16 s1, s4797; CHECK-MVE-NEXT: vmovx.f16 s4, s6798; CHECK-MVE-NEXT: vcmp.f16 s8, s4799; CHECK-MVE-NEXT: vmovx.f16 s4, s10800; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr801; CHECK-MVE-NEXT: vcmp.f16 s2, s6802; CHECK-MVE-NEXT: vmovx.f16 s8, s14803; CHECK-MVE-NEXT: vmovx.f16 s6, s3804; CHECK-MVE-NEXT: cset r0, ge805; CHECK-MVE-NEXT: cmp r0, #0806; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4807; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr808; CHECK-MVE-NEXT: cset r0, ge809; CHECK-MVE-NEXT: cmp r0, #0810; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s10811; CHECK-MVE-NEXT: vins.f16 s2, s4812; CHECK-MVE-NEXT: vmovx.f16 s4, s7813; CHECK-MVE-NEXT: vcmp.f16 s6, s4814; CHECK-MVE-NEXT: vmovx.f16 s4, s11815; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr816; CHECK-MVE-NEXT: vmovx.f16 s6, s15817; CHECK-MVE-NEXT: vcmp.f16 s3, s7818; CHECK-MVE-NEXT: cset r0, ge819; CHECK-MVE-NEXT: cmp r0, #0820; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s4821; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr822; CHECK-MVE-NEXT: cset r0, ge823; CHECK-MVE-NEXT: cmp r0, #0824; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s11825; CHECK-MVE-NEXT: vins.f16 s3, s4826; CHECK-MVE-NEXT: vpop {d8, d9}827; CHECK-MVE-NEXT: bx lr828;829; CHECK-MVEFP-LABEL: vcmp_oge_v8f16:830; CHECK-MVEFP: @ %bb.0: @ %entry831; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, q1832; CHECK-MVEFP-NEXT: vpsel q0, q2, q3833; CHECK-MVEFP-NEXT: bx lr834entry:835 %c = fcmp oge <8 x half> %src, %src2836 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b837 ret <8 x half> %s838}839 840define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {841; CHECK-MVE-LABEL: vcmp_olt_v8f16:842; CHECK-MVE: @ %bb.0: @ %entry843; CHECK-MVE-NEXT: .vsave {d8, d9}844; CHECK-MVE-NEXT: vpush {d8, d9}845; CHECK-MVE-NEXT: vmovx.f16 s16, s4846; CHECK-MVE-NEXT: vmovx.f16 s18, s0847; CHECK-MVE-NEXT: vcmp.f16 s18, s16848; CHECK-MVE-NEXT: vmovx.f16 s16, s8849; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr850; CHECK-MVE-NEXT: vcmp.f16 s0, s4851; CHECK-MVE-NEXT: vmovx.f16 s18, s12852; CHECK-MVE-NEXT: vmovx.f16 s4, s5853; CHECK-MVE-NEXT: cset r0, mi854; CHECK-MVE-NEXT: cmp r0, #0855; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16856; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr857; CHECK-MVE-NEXT: cset r0, mi858; CHECK-MVE-NEXT: cmp r0, #0859; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s8860; CHECK-MVE-NEXT: vmovx.f16 s8, s1861; CHECK-MVE-NEXT: vcmp.f16 s8, s4862; CHECK-MVE-NEXT: vmovx.f16 s4, s9863; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr864; CHECK-MVE-NEXT: vmovx.f16 s8, s13865; CHECK-MVE-NEXT: vcmp.f16 s1, s5866; CHECK-MVE-NEXT: vins.f16 s0, s16867; CHECK-MVE-NEXT: cset r0, mi868; CHECK-MVE-NEXT: cmp r0, #0869; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4870; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr871; CHECK-MVE-NEXT: vmovx.f16 s8, s2872; CHECK-MVE-NEXT: cset r0, mi873; CHECK-MVE-NEXT: cmp r0, #0874; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s9875; CHECK-MVE-NEXT: vins.f16 s1, s4876; CHECK-MVE-NEXT: vmovx.f16 s4, s6877; CHECK-MVE-NEXT: vcmp.f16 s8, s4878; CHECK-MVE-NEXT: vmovx.f16 s4, s10879; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr880; CHECK-MVE-NEXT: vcmp.f16 s2, s6881; CHECK-MVE-NEXT: vmovx.f16 s8, s14882; CHECK-MVE-NEXT: vmovx.f16 s6, s3883; CHECK-MVE-NEXT: cset r0, mi884; CHECK-MVE-NEXT: cmp r0, #0885; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4886; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr887; CHECK-MVE-NEXT: cset r0, mi888; CHECK-MVE-NEXT: cmp r0, #0889; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s10890; CHECK-MVE-NEXT: vins.f16 s2, s4891; CHECK-MVE-NEXT: vmovx.f16 s4, s7892; CHECK-MVE-NEXT: vcmp.f16 s6, s4893; CHECK-MVE-NEXT: vmovx.f16 s4, s11894; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr895; CHECK-MVE-NEXT: vmovx.f16 s6, s15896; CHECK-MVE-NEXT: vcmp.f16 s3, s7897; CHECK-MVE-NEXT: cset r0, mi898; CHECK-MVE-NEXT: cmp r0, #0899; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s4900; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr901; CHECK-MVE-NEXT: cset r0, mi902; CHECK-MVE-NEXT: cmp r0, #0903; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s11904; CHECK-MVE-NEXT: vins.f16 s3, s4905; CHECK-MVE-NEXT: vpop {d8, d9}906; CHECK-MVE-NEXT: bx lr907;908; CHECK-MVEFP-LABEL: vcmp_olt_v8f16:909; CHECK-MVEFP: @ %bb.0: @ %entry910; CHECK-MVEFP-NEXT: vcmp.f16 gt, q1, q0911; CHECK-MVEFP-NEXT: vpsel q0, q2, q3912; CHECK-MVEFP-NEXT: bx lr913entry:914 %c = fcmp olt <8 x half> %src, %src2915 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b916 ret <8 x half> %s917}918 919define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {920; CHECK-MVE-LABEL: vcmp_ole_v8f16:921; CHECK-MVE: @ %bb.0: @ %entry922; CHECK-MVE-NEXT: .vsave {d8, d9}923; CHECK-MVE-NEXT: vpush {d8, d9}924; CHECK-MVE-NEXT: vmovx.f16 s16, s4925; CHECK-MVE-NEXT: vmovx.f16 s18, s0926; CHECK-MVE-NEXT: vcmp.f16 s18, s16927; CHECK-MVE-NEXT: vmovx.f16 s16, s8928; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr929; CHECK-MVE-NEXT: vcmp.f16 s0, s4930; CHECK-MVE-NEXT: vmovx.f16 s18, s12931; CHECK-MVE-NEXT: vmovx.f16 s4, s5932; CHECK-MVE-NEXT: cset r0, ls933; CHECK-MVE-NEXT: cmp r0, #0934; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16935; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr936; CHECK-MVE-NEXT: cset r0, ls937; CHECK-MVE-NEXT: cmp r0, #0938; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s8939; CHECK-MVE-NEXT: vmovx.f16 s8, s1940; CHECK-MVE-NEXT: vcmp.f16 s8, s4941; CHECK-MVE-NEXT: vmovx.f16 s4, s9942; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr943; CHECK-MVE-NEXT: vmovx.f16 s8, s13944; CHECK-MVE-NEXT: vcmp.f16 s1, s5945; CHECK-MVE-NEXT: vins.f16 s0, s16946; CHECK-MVE-NEXT: cset r0, ls947; CHECK-MVE-NEXT: cmp r0, #0948; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4949; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr950; CHECK-MVE-NEXT: vmovx.f16 s8, s2951; CHECK-MVE-NEXT: cset r0, ls952; CHECK-MVE-NEXT: cmp r0, #0953; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s9954; CHECK-MVE-NEXT: vins.f16 s1, s4955; CHECK-MVE-NEXT: vmovx.f16 s4, s6956; CHECK-MVE-NEXT: vcmp.f16 s8, s4957; CHECK-MVE-NEXT: vmovx.f16 s4, s10958; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr959; CHECK-MVE-NEXT: vcmp.f16 s2, s6960; CHECK-MVE-NEXT: vmovx.f16 s8, s14961; CHECK-MVE-NEXT: vmovx.f16 s6, s3962; CHECK-MVE-NEXT: cset r0, ls963; CHECK-MVE-NEXT: cmp r0, #0964; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s4965; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr966; CHECK-MVE-NEXT: cset r0, ls967; CHECK-MVE-NEXT: cmp r0, #0968; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s10969; CHECK-MVE-NEXT: vins.f16 s2, s4970; CHECK-MVE-NEXT: vmovx.f16 s4, s7971; CHECK-MVE-NEXT: vcmp.f16 s6, s4972; CHECK-MVE-NEXT: vmovx.f16 s4, s11973; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr974; CHECK-MVE-NEXT: vmovx.f16 s6, s15975; CHECK-MVE-NEXT: vcmp.f16 s3, s7976; CHECK-MVE-NEXT: cset r0, ls977; CHECK-MVE-NEXT: cmp r0, #0978; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s4979; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr980; CHECK-MVE-NEXT: cset r0, ls981; CHECK-MVE-NEXT: cmp r0, #0982; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s11983; CHECK-MVE-NEXT: vins.f16 s3, s4984; CHECK-MVE-NEXT: vpop {d8, d9}985; CHECK-MVE-NEXT: bx lr986;987; CHECK-MVEFP-LABEL: vcmp_ole_v8f16:988; CHECK-MVEFP: @ %bb.0: @ %entry989; CHECK-MVEFP-NEXT: vcmp.f16 ge, q1, q0990; CHECK-MVEFP-NEXT: vpsel q0, q2, q3991; CHECK-MVEFP-NEXT: bx lr992entry:993 %c = fcmp ole <8 x half> %src, %src2994 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b995 ret <8 x half> %s996}997 998define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {999; CHECK-MVE-LABEL: vcmp_ueq_v8f16:1000; CHECK-MVE: @ %bb.0: @ %entry1001; CHECK-MVE-NEXT: .vsave {d8, d9}1002; CHECK-MVE-NEXT: vpush {d8, d9}1003; CHECK-MVE-NEXT: vmovx.f16 s16, s41004; CHECK-MVE-NEXT: vmovx.f16 s18, s01005; CHECK-MVE-NEXT: vcmp.f16 s18, s161006; CHECK-MVE-NEXT: vmovx.f16 s16, s81007; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1008; CHECK-MVE-NEXT: vcmp.f16 s0, s41009; CHECK-MVE-NEXT: vmovx.f16 s18, s121010; CHECK-MVE-NEXT: vmovx.f16 s4, s51011; CHECK-MVE-NEXT: cset r0, eq1012; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1013; CHECK-MVE-NEXT: cmp r0, #01014; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161015; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1016; CHECK-MVE-NEXT: cset r0, eq1017; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1018; CHECK-MVE-NEXT: cmp r0, #01019; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81020; CHECK-MVE-NEXT: vmovx.f16 s8, s11021; CHECK-MVE-NEXT: vcmp.f16 s8, s41022; CHECK-MVE-NEXT: vmovx.f16 s4, s91023; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1024; CHECK-MVE-NEXT: vmovx.f16 s8, s131025; CHECK-MVE-NEXT: vcmp.f16 s1, s51026; CHECK-MVE-NEXT: vins.f16 s0, s161027; CHECK-MVE-NEXT: cset r0, eq1028; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1029; CHECK-MVE-NEXT: cmp r0, #01030; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41031; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1032; CHECK-MVE-NEXT: vmovx.f16 s8, s21033; CHECK-MVE-NEXT: cset r0, eq1034; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1035; CHECK-MVE-NEXT: cmp r0, #01036; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91037; CHECK-MVE-NEXT: vins.f16 s1, s41038; CHECK-MVE-NEXT: vmovx.f16 s4, s61039; CHECK-MVE-NEXT: vcmp.f16 s8, s41040; CHECK-MVE-NEXT: vmovx.f16 s4, s101041; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1042; CHECK-MVE-NEXT: vcmp.f16 s2, s61043; CHECK-MVE-NEXT: vmovx.f16 s8, s141044; CHECK-MVE-NEXT: vmovx.f16 s6, s31045; CHECK-MVE-NEXT: cset r0, eq1046; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1047; CHECK-MVE-NEXT: cmp r0, #01048; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41049; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1050; CHECK-MVE-NEXT: cset r0, eq1051; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1052; CHECK-MVE-NEXT: cmp r0, #01053; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101054; CHECK-MVE-NEXT: vins.f16 s2, s41055; CHECK-MVE-NEXT: vmovx.f16 s4, s71056; CHECK-MVE-NEXT: vcmp.f16 s6, s41057; CHECK-MVE-NEXT: vmovx.f16 s4, s111058; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1059; CHECK-MVE-NEXT: vmovx.f16 s6, s151060; CHECK-MVE-NEXT: vcmp.f16 s3, s71061; CHECK-MVE-NEXT: cset r0, eq1062; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1063; CHECK-MVE-NEXT: cmp r0, #01064; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41065; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1066; CHECK-MVE-NEXT: cset r0, eq1067; CHECK-MVE-NEXT: csinc r0, r0, zr, vc1068; CHECK-MVE-NEXT: cmp r0, #01069; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111070; CHECK-MVE-NEXT: vins.f16 s3, s41071; CHECK-MVE-NEXT: vpop {d8, d9}1072; CHECK-MVE-NEXT: bx lr1073;1074; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16:1075; CHECK-MVEFP: @ %bb.0: @ %entry1076; CHECK-MVEFP-NEXT: vpt.f16 le, q1, q01077; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, q11078; CHECK-MVEFP-NEXT: vpsel q0, q2, q31079; CHECK-MVEFP-NEXT: bx lr1080entry:1081 %c = fcmp ueq <8 x half> %src, %src21082 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1083 ret <8 x half> %s1084}1085 1086define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {1087; CHECK-MVE-LABEL: vcmp_une_v8f16:1088; CHECK-MVE: @ %bb.0: @ %entry1089; CHECK-MVE-NEXT: .vsave {d8, d9}1090; CHECK-MVE-NEXT: vpush {d8, d9}1091; CHECK-MVE-NEXT: vmovx.f16 s16, s41092; CHECK-MVE-NEXT: vmovx.f16 s18, s01093; CHECK-MVE-NEXT: vcmp.f16 s18, s161094; CHECK-MVE-NEXT: vmovx.f16 s16, s81095; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1096; CHECK-MVE-NEXT: vmovx.f16 s18, s121097; CHECK-MVE-NEXT: vcmp.f16 s0, s41098; CHECK-MVE-NEXT: vmovx.f16 s4, s51099; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161100; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1101; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81102; CHECK-MVE-NEXT: vmovx.f16 s8, s11103; CHECK-MVE-NEXT: vcmp.f16 s8, s41104; CHECK-MVE-NEXT: vmovx.f16 s4, s91105; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1106; CHECK-MVE-NEXT: vmovx.f16 s8, s131107; CHECK-MVE-NEXT: vcmp.f16 s1, s51108; CHECK-MVE-NEXT: vins.f16 s0, s161109; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41110; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1111; CHECK-MVE-NEXT: vmovx.f16 s8, s21112; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91113; CHECK-MVE-NEXT: vins.f16 s1, s41114; CHECK-MVE-NEXT: vmovx.f16 s4, s61115; CHECK-MVE-NEXT: vcmp.f16 s8, s41116; CHECK-MVE-NEXT: vmovx.f16 s4, s101117; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1118; CHECK-MVE-NEXT: vmovx.f16 s8, s141119; CHECK-MVE-NEXT: vcmp.f16 s2, s61120; CHECK-MVE-NEXT: vmovx.f16 s6, s31121; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41122; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1123; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101124; CHECK-MVE-NEXT: vins.f16 s2, s41125; CHECK-MVE-NEXT: vmovx.f16 s4, s71126; CHECK-MVE-NEXT: vcmp.f16 s6, s41127; CHECK-MVE-NEXT: vmovx.f16 s4, s111128; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1129; CHECK-MVE-NEXT: vmovx.f16 s6, s151130; CHECK-MVE-NEXT: vcmp.f16 s3, s71131; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41132; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1133; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111134; CHECK-MVE-NEXT: vins.f16 s3, s41135; CHECK-MVE-NEXT: vpop {d8, d9}1136; CHECK-MVE-NEXT: bx lr1137;1138; CHECK-MVEFP-LABEL: vcmp_une_v8f16:1139; CHECK-MVEFP: @ %bb.0: @ %entry1140; CHECK-MVEFP-NEXT: vcmp.f16 ne, q0, q11141; CHECK-MVEFP-NEXT: vpsel q0, q2, q31142; CHECK-MVEFP-NEXT: bx lr1143entry:1144 %c = fcmp une <8 x half> %src, %src21145 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1146 ret <8 x half> %s1147}1148 1149define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {1150; CHECK-MVE-LABEL: vcmp_ugt_v8f16:1151; CHECK-MVE: @ %bb.0: @ %entry1152; CHECK-MVE-NEXT: .vsave {d8, d9}1153; CHECK-MVE-NEXT: vpush {d8, d9}1154; CHECK-MVE-NEXT: vmovx.f16 s16, s41155; CHECK-MVE-NEXT: vmovx.f16 s18, s01156; CHECK-MVE-NEXT: vcmp.f16 s18, s161157; CHECK-MVE-NEXT: vmovx.f16 s16, s81158; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1159; CHECK-MVE-NEXT: vcmp.f16 s0, s41160; CHECK-MVE-NEXT: vmovx.f16 s18, s121161; CHECK-MVE-NEXT: vmovx.f16 s4, s51162; CHECK-MVE-NEXT: cset r0, hi1163; CHECK-MVE-NEXT: cmp r0, #01164; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161165; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1166; CHECK-MVE-NEXT: cset r0, hi1167; CHECK-MVE-NEXT: cmp r0, #01168; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81169; CHECK-MVE-NEXT: vmovx.f16 s8, s11170; CHECK-MVE-NEXT: vcmp.f16 s8, s41171; CHECK-MVE-NEXT: vmovx.f16 s4, s91172; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1173; CHECK-MVE-NEXT: vmovx.f16 s8, s131174; CHECK-MVE-NEXT: vcmp.f16 s1, s51175; CHECK-MVE-NEXT: vins.f16 s0, s161176; CHECK-MVE-NEXT: cset r0, hi1177; CHECK-MVE-NEXT: cmp r0, #01178; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41179; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1180; CHECK-MVE-NEXT: vmovx.f16 s8, s21181; CHECK-MVE-NEXT: cset r0, hi1182; CHECK-MVE-NEXT: cmp r0, #01183; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91184; CHECK-MVE-NEXT: vins.f16 s1, s41185; CHECK-MVE-NEXT: vmovx.f16 s4, s61186; CHECK-MVE-NEXT: vcmp.f16 s8, s41187; CHECK-MVE-NEXT: vmovx.f16 s4, s101188; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1189; CHECK-MVE-NEXT: vcmp.f16 s2, s61190; CHECK-MVE-NEXT: vmovx.f16 s8, s141191; CHECK-MVE-NEXT: vmovx.f16 s6, s31192; CHECK-MVE-NEXT: cset r0, hi1193; CHECK-MVE-NEXT: cmp r0, #01194; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41195; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1196; CHECK-MVE-NEXT: cset r0, hi1197; CHECK-MVE-NEXT: cmp r0, #01198; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101199; CHECK-MVE-NEXT: vins.f16 s2, s41200; CHECK-MVE-NEXT: vmovx.f16 s4, s71201; CHECK-MVE-NEXT: vcmp.f16 s6, s41202; CHECK-MVE-NEXT: vmovx.f16 s4, s111203; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1204; CHECK-MVE-NEXT: vmovx.f16 s6, s151205; CHECK-MVE-NEXT: vcmp.f16 s3, s71206; CHECK-MVE-NEXT: cset r0, hi1207; CHECK-MVE-NEXT: cmp r0, #01208; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41209; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1210; CHECK-MVE-NEXT: cset r0, hi1211; CHECK-MVE-NEXT: cmp r0, #01212; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111213; CHECK-MVE-NEXT: vins.f16 s3, s41214; CHECK-MVE-NEXT: vpop {d8, d9}1215; CHECK-MVE-NEXT: bx lr1216;1217; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16:1218; CHECK-MVEFP: @ %bb.0: @ %entry1219; CHECK-MVEFP-NEXT: vcmp.f16 lt, q1, q01220; CHECK-MVEFP-NEXT: vpsel q0, q2, q31221; CHECK-MVEFP-NEXT: bx lr1222entry:1223 %c = fcmp ugt <8 x half> %src, %src21224 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1225 ret <8 x half> %s1226}1227 1228define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {1229; CHECK-MVE-LABEL: vcmp_uge_v8f16:1230; CHECK-MVE: @ %bb.0: @ %entry1231; CHECK-MVE-NEXT: .vsave {d8, d9}1232; CHECK-MVE-NEXT: vpush {d8, d9}1233; CHECK-MVE-NEXT: vmovx.f16 s16, s41234; CHECK-MVE-NEXT: vmovx.f16 s18, s01235; CHECK-MVE-NEXT: vcmp.f16 s18, s161236; CHECK-MVE-NEXT: vmovx.f16 s16, s81237; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1238; CHECK-MVE-NEXT: vcmp.f16 s0, s41239; CHECK-MVE-NEXT: vmovx.f16 s18, s121240; CHECK-MVE-NEXT: vmovx.f16 s4, s51241; CHECK-MVE-NEXT: cset r0, pl1242; CHECK-MVE-NEXT: cmp r0, #01243; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161244; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1245; CHECK-MVE-NEXT: cset r0, pl1246; CHECK-MVE-NEXT: cmp r0, #01247; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81248; CHECK-MVE-NEXT: vmovx.f16 s8, s11249; CHECK-MVE-NEXT: vcmp.f16 s8, s41250; CHECK-MVE-NEXT: vmovx.f16 s4, s91251; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1252; CHECK-MVE-NEXT: vmovx.f16 s8, s131253; CHECK-MVE-NEXT: vcmp.f16 s1, s51254; CHECK-MVE-NEXT: vins.f16 s0, s161255; CHECK-MVE-NEXT: cset r0, pl1256; CHECK-MVE-NEXT: cmp r0, #01257; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41258; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1259; CHECK-MVE-NEXT: vmovx.f16 s8, s21260; CHECK-MVE-NEXT: cset r0, pl1261; CHECK-MVE-NEXT: cmp r0, #01262; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91263; CHECK-MVE-NEXT: vins.f16 s1, s41264; CHECK-MVE-NEXT: vmovx.f16 s4, s61265; CHECK-MVE-NEXT: vcmp.f16 s8, s41266; CHECK-MVE-NEXT: vmovx.f16 s4, s101267; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1268; CHECK-MVE-NEXT: vcmp.f16 s2, s61269; CHECK-MVE-NEXT: vmovx.f16 s8, s141270; CHECK-MVE-NEXT: vmovx.f16 s6, s31271; CHECK-MVE-NEXT: cset r0, pl1272; CHECK-MVE-NEXT: cmp r0, #01273; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41274; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1275; CHECK-MVE-NEXT: cset r0, pl1276; CHECK-MVE-NEXT: cmp r0, #01277; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101278; CHECK-MVE-NEXT: vins.f16 s2, s41279; CHECK-MVE-NEXT: vmovx.f16 s4, s71280; CHECK-MVE-NEXT: vcmp.f16 s6, s41281; CHECK-MVE-NEXT: vmovx.f16 s4, s111282; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1283; CHECK-MVE-NEXT: vmovx.f16 s6, s151284; CHECK-MVE-NEXT: vcmp.f16 s3, s71285; CHECK-MVE-NEXT: cset r0, pl1286; CHECK-MVE-NEXT: cmp r0, #01287; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41288; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1289; CHECK-MVE-NEXT: cset r0, pl1290; CHECK-MVE-NEXT: cmp r0, #01291; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111292; CHECK-MVE-NEXT: vins.f16 s3, s41293; CHECK-MVE-NEXT: vpop {d8, d9}1294; CHECK-MVE-NEXT: bx lr1295;1296; CHECK-MVEFP-LABEL: vcmp_uge_v8f16:1297; CHECK-MVEFP: @ %bb.0: @ %entry1298; CHECK-MVEFP-NEXT: vcmp.f16 le, q1, q01299; CHECK-MVEFP-NEXT: vpsel q0, q2, q31300; CHECK-MVEFP-NEXT: bx lr1301entry:1302 %c = fcmp uge <8 x half> %src, %src21303 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1304 ret <8 x half> %s1305}1306 1307define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {1308; CHECK-MVE-LABEL: vcmp_ult_v8f16:1309; CHECK-MVE: @ %bb.0: @ %entry1310; CHECK-MVE-NEXT: .vsave {d8, d9}1311; CHECK-MVE-NEXT: vpush {d8, d9}1312; CHECK-MVE-NEXT: vmovx.f16 s16, s41313; CHECK-MVE-NEXT: vmovx.f16 s18, s01314; CHECK-MVE-NEXT: vcmp.f16 s18, s161315; CHECK-MVE-NEXT: vmovx.f16 s16, s81316; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1317; CHECK-MVE-NEXT: vcmp.f16 s0, s41318; CHECK-MVE-NEXT: vmovx.f16 s18, s121319; CHECK-MVE-NEXT: vmovx.f16 s4, s51320; CHECK-MVE-NEXT: cset r0, lt1321; CHECK-MVE-NEXT: cmp r0, #01322; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161323; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1324; CHECK-MVE-NEXT: cset r0, lt1325; CHECK-MVE-NEXT: cmp r0, #01326; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81327; CHECK-MVE-NEXT: vmovx.f16 s8, s11328; CHECK-MVE-NEXT: vcmp.f16 s8, s41329; CHECK-MVE-NEXT: vmovx.f16 s4, s91330; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1331; CHECK-MVE-NEXT: vmovx.f16 s8, s131332; CHECK-MVE-NEXT: vcmp.f16 s1, s51333; CHECK-MVE-NEXT: vins.f16 s0, s161334; CHECK-MVE-NEXT: cset r0, lt1335; CHECK-MVE-NEXT: cmp r0, #01336; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41337; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1338; CHECK-MVE-NEXT: vmovx.f16 s8, s21339; CHECK-MVE-NEXT: cset r0, lt1340; CHECK-MVE-NEXT: cmp r0, #01341; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91342; CHECK-MVE-NEXT: vins.f16 s1, s41343; CHECK-MVE-NEXT: vmovx.f16 s4, s61344; CHECK-MVE-NEXT: vcmp.f16 s8, s41345; CHECK-MVE-NEXT: vmovx.f16 s4, s101346; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1347; CHECK-MVE-NEXT: vcmp.f16 s2, s61348; CHECK-MVE-NEXT: vmovx.f16 s8, s141349; CHECK-MVE-NEXT: vmovx.f16 s6, s31350; CHECK-MVE-NEXT: cset r0, lt1351; CHECK-MVE-NEXT: cmp r0, #01352; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41353; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1354; CHECK-MVE-NEXT: cset r0, lt1355; CHECK-MVE-NEXT: cmp r0, #01356; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101357; CHECK-MVE-NEXT: vins.f16 s2, s41358; CHECK-MVE-NEXT: vmovx.f16 s4, s71359; CHECK-MVE-NEXT: vcmp.f16 s6, s41360; CHECK-MVE-NEXT: vmovx.f16 s4, s111361; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1362; CHECK-MVE-NEXT: vmovx.f16 s6, s151363; CHECK-MVE-NEXT: vcmp.f16 s3, s71364; CHECK-MVE-NEXT: cset r0, lt1365; CHECK-MVE-NEXT: cmp r0, #01366; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41367; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1368; CHECK-MVE-NEXT: cset r0, lt1369; CHECK-MVE-NEXT: cmp r0, #01370; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111371; CHECK-MVE-NEXT: vins.f16 s3, s41372; CHECK-MVE-NEXT: vpop {d8, d9}1373; CHECK-MVE-NEXT: bx lr1374;1375; CHECK-MVEFP-LABEL: vcmp_ult_v8f16:1376; CHECK-MVEFP: @ %bb.0: @ %entry1377; CHECK-MVEFP-NEXT: vcmp.f16 lt, q0, q11378; CHECK-MVEFP-NEXT: vpsel q0, q2, q31379; CHECK-MVEFP-NEXT: bx lr1380entry:1381 %c = fcmp ult <8 x half> %src, %src21382 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1383 ret <8 x half> %s1384}1385 1386define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {1387; CHECK-MVE-LABEL: vcmp_ule_v8f16:1388; CHECK-MVE: @ %bb.0: @ %entry1389; CHECK-MVE-NEXT: .vsave {d8, d9}1390; CHECK-MVE-NEXT: vpush {d8, d9}1391; CHECK-MVE-NEXT: vmovx.f16 s16, s41392; CHECK-MVE-NEXT: vmovx.f16 s18, s01393; CHECK-MVE-NEXT: vcmp.f16 s18, s161394; CHECK-MVE-NEXT: vmovx.f16 s16, s81395; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1396; CHECK-MVE-NEXT: vcmp.f16 s0, s41397; CHECK-MVE-NEXT: vmovx.f16 s18, s121398; CHECK-MVE-NEXT: vmovx.f16 s4, s51399; CHECK-MVE-NEXT: cset r0, le1400; CHECK-MVE-NEXT: cmp r0, #01401; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161402; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1403; CHECK-MVE-NEXT: cset r0, le1404; CHECK-MVE-NEXT: cmp r0, #01405; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81406; CHECK-MVE-NEXT: vmovx.f16 s8, s11407; CHECK-MVE-NEXT: vcmp.f16 s8, s41408; CHECK-MVE-NEXT: vmovx.f16 s4, s91409; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1410; CHECK-MVE-NEXT: vmovx.f16 s8, s131411; CHECK-MVE-NEXT: vcmp.f16 s1, s51412; CHECK-MVE-NEXT: vins.f16 s0, s161413; CHECK-MVE-NEXT: cset r0, le1414; CHECK-MVE-NEXT: cmp r0, #01415; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41416; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1417; CHECK-MVE-NEXT: vmovx.f16 s8, s21418; CHECK-MVE-NEXT: cset r0, le1419; CHECK-MVE-NEXT: cmp r0, #01420; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91421; CHECK-MVE-NEXT: vins.f16 s1, s41422; CHECK-MVE-NEXT: vmovx.f16 s4, s61423; CHECK-MVE-NEXT: vcmp.f16 s8, s41424; CHECK-MVE-NEXT: vmovx.f16 s4, s101425; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1426; CHECK-MVE-NEXT: vcmp.f16 s2, s61427; CHECK-MVE-NEXT: vmovx.f16 s8, s141428; CHECK-MVE-NEXT: vmovx.f16 s6, s31429; CHECK-MVE-NEXT: cset r0, le1430; CHECK-MVE-NEXT: cmp r0, #01431; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41432; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1433; CHECK-MVE-NEXT: cset r0, le1434; CHECK-MVE-NEXT: cmp r0, #01435; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101436; CHECK-MVE-NEXT: vins.f16 s2, s41437; CHECK-MVE-NEXT: vmovx.f16 s4, s71438; CHECK-MVE-NEXT: vcmp.f16 s6, s41439; CHECK-MVE-NEXT: vmovx.f16 s4, s111440; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1441; CHECK-MVE-NEXT: vmovx.f16 s6, s151442; CHECK-MVE-NEXT: vcmp.f16 s3, s71443; CHECK-MVE-NEXT: cset r0, le1444; CHECK-MVE-NEXT: cmp r0, #01445; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41446; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1447; CHECK-MVE-NEXT: cset r0, le1448; CHECK-MVE-NEXT: cmp r0, #01449; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111450; CHECK-MVE-NEXT: vins.f16 s3, s41451; CHECK-MVE-NEXT: vpop {d8, d9}1452; CHECK-MVE-NEXT: bx lr1453;1454; CHECK-MVEFP-LABEL: vcmp_ule_v8f16:1455; CHECK-MVEFP: @ %bb.0: @ %entry1456; CHECK-MVEFP-NEXT: vcmp.f16 le, q0, q11457; CHECK-MVEFP-NEXT: vpsel q0, q2, q31458; CHECK-MVEFP-NEXT: bx lr1459entry:1460 %c = fcmp ule <8 x half> %src, %src21461 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1462 ret <8 x half> %s1463}1464 1465define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {1466; CHECK-MVE-LABEL: vcmp_ord_v8f16:1467; CHECK-MVE: @ %bb.0: @ %entry1468; CHECK-MVE-NEXT: .vsave {d8, d9}1469; CHECK-MVE-NEXT: vpush {d8, d9}1470; CHECK-MVE-NEXT: vmovx.f16 s16, s41471; CHECK-MVE-NEXT: vmovx.f16 s18, s01472; CHECK-MVE-NEXT: vcmp.f16 s18, s161473; CHECK-MVE-NEXT: vmovx.f16 s16, s81474; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1475; CHECK-MVE-NEXT: vcmp.f16 s0, s41476; CHECK-MVE-NEXT: vmovx.f16 s18, s121477; CHECK-MVE-NEXT: vmovx.f16 s4, s51478; CHECK-MVE-NEXT: cset r0, vc1479; CHECK-MVE-NEXT: cmp r0, #01480; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161481; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1482; CHECK-MVE-NEXT: cset r0, vc1483; CHECK-MVE-NEXT: cmp r0, #01484; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81485; CHECK-MVE-NEXT: vmovx.f16 s8, s11486; CHECK-MVE-NEXT: vcmp.f16 s8, s41487; CHECK-MVE-NEXT: vmovx.f16 s4, s91488; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1489; CHECK-MVE-NEXT: vmovx.f16 s8, s131490; CHECK-MVE-NEXT: vcmp.f16 s1, s51491; CHECK-MVE-NEXT: vins.f16 s0, s161492; CHECK-MVE-NEXT: cset r0, vc1493; CHECK-MVE-NEXT: cmp r0, #01494; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41495; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1496; CHECK-MVE-NEXT: vmovx.f16 s8, s21497; CHECK-MVE-NEXT: cset r0, vc1498; CHECK-MVE-NEXT: cmp r0, #01499; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91500; CHECK-MVE-NEXT: vins.f16 s1, s41501; CHECK-MVE-NEXT: vmovx.f16 s4, s61502; CHECK-MVE-NEXT: vcmp.f16 s8, s41503; CHECK-MVE-NEXT: vmovx.f16 s4, s101504; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1505; CHECK-MVE-NEXT: vcmp.f16 s2, s61506; CHECK-MVE-NEXT: vmovx.f16 s8, s141507; CHECK-MVE-NEXT: vmovx.f16 s6, s31508; CHECK-MVE-NEXT: cset r0, vc1509; CHECK-MVE-NEXT: cmp r0, #01510; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41511; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1512; CHECK-MVE-NEXT: cset r0, vc1513; CHECK-MVE-NEXT: cmp r0, #01514; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101515; CHECK-MVE-NEXT: vins.f16 s2, s41516; CHECK-MVE-NEXT: vmovx.f16 s4, s71517; CHECK-MVE-NEXT: vcmp.f16 s6, s41518; CHECK-MVE-NEXT: vmovx.f16 s4, s111519; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1520; CHECK-MVE-NEXT: vmovx.f16 s6, s151521; CHECK-MVE-NEXT: vcmp.f16 s3, s71522; CHECK-MVE-NEXT: cset r0, vc1523; CHECK-MVE-NEXT: cmp r0, #01524; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41525; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1526; CHECK-MVE-NEXT: cset r0, vc1527; CHECK-MVE-NEXT: cmp r0, #01528; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111529; CHECK-MVE-NEXT: vins.f16 s3, s41530; CHECK-MVE-NEXT: vpop {d8, d9}1531; CHECK-MVE-NEXT: bx lr1532;1533; CHECK-MVEFP-LABEL: vcmp_ord_v8f16:1534; CHECK-MVEFP: @ %bb.0: @ %entry1535; CHECK-MVEFP-NEXT: vpt.f16 le, q1, q01536; CHECK-MVEFP-NEXT: vcmpt.f16 lt, q0, q11537; CHECK-MVEFP-NEXT: vpsel q0, q3, q21538; CHECK-MVEFP-NEXT: bx lr1539entry:1540 %c = fcmp ord <8 x half> %src, %src21541 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1542 ret <8 x half> %s1543}1544 1545define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {1546; CHECK-MVE-LABEL: vcmp_uno_v8f16:1547; CHECK-MVE: @ %bb.0: @ %entry1548; CHECK-MVE-NEXT: .vsave {d8, d9}1549; CHECK-MVE-NEXT: vpush {d8, d9}1550; CHECK-MVE-NEXT: vmovx.f16 s16, s41551; CHECK-MVE-NEXT: vmovx.f16 s18, s01552; CHECK-MVE-NEXT: vcmp.f16 s18, s161553; CHECK-MVE-NEXT: vmovx.f16 s16, s81554; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1555; CHECK-MVE-NEXT: vcmp.f16 s0, s41556; CHECK-MVE-NEXT: vmovx.f16 s18, s121557; CHECK-MVE-NEXT: vmovx.f16 s4, s51558; CHECK-MVE-NEXT: cset r0, vs1559; CHECK-MVE-NEXT: cmp r0, #01560; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s161561; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1562; CHECK-MVE-NEXT: cset r0, vs1563; CHECK-MVE-NEXT: cmp r0, #01564; CHECK-MVE-NEXT: vseleq.f16 s0, s12, s81565; CHECK-MVE-NEXT: vmovx.f16 s8, s11566; CHECK-MVE-NEXT: vcmp.f16 s8, s41567; CHECK-MVE-NEXT: vmovx.f16 s4, s91568; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1569; CHECK-MVE-NEXT: vmovx.f16 s8, s131570; CHECK-MVE-NEXT: vcmp.f16 s1, s51571; CHECK-MVE-NEXT: vins.f16 s0, s161572; CHECK-MVE-NEXT: cset r0, vs1573; CHECK-MVE-NEXT: cmp r0, #01574; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41575; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1576; CHECK-MVE-NEXT: vmovx.f16 s8, s21577; CHECK-MVE-NEXT: cset r0, vs1578; CHECK-MVE-NEXT: cmp r0, #01579; CHECK-MVE-NEXT: vseleq.f16 s1, s13, s91580; CHECK-MVE-NEXT: vins.f16 s1, s41581; CHECK-MVE-NEXT: vmovx.f16 s4, s61582; CHECK-MVE-NEXT: vcmp.f16 s8, s41583; CHECK-MVE-NEXT: vmovx.f16 s4, s101584; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1585; CHECK-MVE-NEXT: vcmp.f16 s2, s61586; CHECK-MVE-NEXT: vmovx.f16 s8, s141587; CHECK-MVE-NEXT: vmovx.f16 s6, s31588; CHECK-MVE-NEXT: cset r0, vs1589; CHECK-MVE-NEXT: cmp r0, #01590; CHECK-MVE-NEXT: vseleq.f16 s4, s8, s41591; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1592; CHECK-MVE-NEXT: cset r0, vs1593; CHECK-MVE-NEXT: cmp r0, #01594; CHECK-MVE-NEXT: vseleq.f16 s2, s14, s101595; CHECK-MVE-NEXT: vins.f16 s2, s41596; CHECK-MVE-NEXT: vmovx.f16 s4, s71597; CHECK-MVE-NEXT: vcmp.f16 s6, s41598; CHECK-MVE-NEXT: vmovx.f16 s4, s111599; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1600; CHECK-MVE-NEXT: vmovx.f16 s6, s151601; CHECK-MVE-NEXT: vcmp.f16 s3, s71602; CHECK-MVE-NEXT: cset r0, vs1603; CHECK-MVE-NEXT: cmp r0, #01604; CHECK-MVE-NEXT: vseleq.f16 s4, s6, s41605; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr1606; CHECK-MVE-NEXT: cset r0, vs1607; CHECK-MVE-NEXT: cmp r0, #01608; CHECK-MVE-NEXT: vseleq.f16 s3, s15, s111609; CHECK-MVE-NEXT: vins.f16 s3, s41610; CHECK-MVE-NEXT: vpop {d8, d9}1611; CHECK-MVE-NEXT: bx lr1612;1613; CHECK-MVEFP-LABEL: vcmp_uno_v8f16:1614; CHECK-MVEFP: @ %bb.0: @ %entry1615; CHECK-MVEFP-NEXT: vpt.f16 le, q1, q01616; CHECK-MVEFP-NEXT: vcmpt.f16 lt, q0, q11617; CHECK-MVEFP-NEXT: vpsel q0, q2, q31618; CHECK-MVEFP-NEXT: bx lr1619entry:1620 %c = fcmp uno <8 x half> %src, %src21621 %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1622 ret <8 x half> %s1623}1624