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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-MVE3; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-MVEFP4 5define arm_aapcs_vfpcc <4 x float> @vcmp_oeq_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {6; CHECK-MVE-LABEL: vcmp_oeq_v4f32:7; CHECK-MVE:       @ %bb.0: @ %entry8; CHECK-MVE-NEXT:    vcmp.f32 s0, #09; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr10; CHECK-MVE-NEXT:    vcmp.f32 s3, #011; CHECK-MVE-NEXT:    cset r0, eq12; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr13; CHECK-MVE-NEXT:    vcmp.f32 s1, #014; CHECK-MVE-NEXT:    cset r1, eq15; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr16; CHECK-MVE-NEXT:    vcmp.f32 s2, #017; CHECK-MVE-NEXT:    cset r2, eq18; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr19; CHECK-MVE-NEXT:    cset r3, eq20; CHECK-MVE-NEXT:    cmp r3, #021; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s622; CHECK-MVE-NEXT:    cmp r2, #023; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s524; CHECK-MVE-NEXT:    cmp r1, #025; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s726; CHECK-MVE-NEXT:    cmp r0, #027; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s428; CHECK-MVE-NEXT:    bx lr29;30; CHECK-MVEFP-LABEL: vcmp_oeq_v4f32:31; CHECK-MVEFP:       @ %bb.0: @ %entry32; CHECK-MVEFP-NEXT:    vcmp.f32 eq, q0, zr33; CHECK-MVEFP-NEXT:    vpsel q0, q1, q234; CHECK-MVEFP-NEXT:    bx lr35entry:36  %c = fcmp oeq <4 x float> %src, zeroinitializer37  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b38  ret <4 x float> %s39}40 41define arm_aapcs_vfpcc <4 x float> @vcmp_one_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {42; CHECK-MVE-LABEL: vcmp_one_v4f32:43; CHECK-MVE:       @ %bb.0: @ %entry44; CHECK-MVE-NEXT:    vcmp.f32 s0, #045; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr46; CHECK-MVE-NEXT:    vcmp.f32 s3, #047; CHECK-MVE-NEXT:    cset r0, mi48; CHECK-MVE-NEXT:    csinc r0, r0, zr, le49; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr50; CHECK-MVE-NEXT:    vcmp.f32 s1, #051; CHECK-MVE-NEXT:    cset r1, mi52; CHECK-MVE-NEXT:    csinc r1, r1, zr, le53; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr54; CHECK-MVE-NEXT:    vcmp.f32 s2, #055; CHECK-MVE-NEXT:    cset r2, mi56; CHECK-MVE-NEXT:    csinc r2, r2, zr, le57; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr58; CHECK-MVE-NEXT:    cset r3, mi59; CHECK-MVE-NEXT:    csinc r3, r3, zr, le60; CHECK-MVE-NEXT:    cmp r3, #061; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s662; CHECK-MVE-NEXT:    cmp r2, #063; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s564; CHECK-MVE-NEXT:    cmp r1, #065; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s766; CHECK-MVE-NEXT:    cmp r0, #067; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s468; CHECK-MVE-NEXT:    bx lr69;70; CHECK-MVEFP-LABEL: vcmp_one_v4f32:71; CHECK-MVEFP:       @ %bb.0: @ %entry72; CHECK-MVEFP-NEXT:    vpt.f32 ge, q0, zr73; CHECK-MVEFP-NEXT:    vcmpt.f32 le, q0, zr74; CHECK-MVEFP-NEXT:    vpsel q0, q2, q175; CHECK-MVEFP-NEXT:    bx lr76entry:77  %c = fcmp one <4 x float> %src, zeroinitializer78  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b79  ret <4 x float> %s80}81 82define arm_aapcs_vfpcc <4 x float> @vcmp_ogt_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {83; CHECK-MVE-LABEL: vcmp_ogt_v4f32:84; CHECK-MVE:       @ %bb.0: @ %entry85; CHECK-MVE-NEXT:    vcmp.f32 s0, #086; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr87; CHECK-MVE-NEXT:    vcmp.f32 s3, #088; CHECK-MVE-NEXT:    cset r0, gt89; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr90; CHECK-MVE-NEXT:    vcmp.f32 s1, #091; CHECK-MVE-NEXT:    cset r1, gt92; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr93; CHECK-MVE-NEXT:    vcmp.f32 s2, #094; CHECK-MVE-NEXT:    cset r2, gt95; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr96; CHECK-MVE-NEXT:    cset r3, gt97; CHECK-MVE-NEXT:    cmp r3, #098; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s699; CHECK-MVE-NEXT:    cmp r2, #0100; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5101; CHECK-MVE-NEXT:    cmp r1, #0102; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7103; CHECK-MVE-NEXT:    cmp r0, #0104; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4105; CHECK-MVE-NEXT:    bx lr106;107; CHECK-MVEFP-LABEL: vcmp_ogt_v4f32:108; CHECK-MVEFP:       @ %bb.0: @ %entry109; CHECK-MVEFP-NEXT:    vcmp.f32 gt, q0, zr110; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2111; CHECK-MVEFP-NEXT:    bx lr112entry:113  %c = fcmp ogt <4 x float> %src, zeroinitializer114  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b115  ret <4 x float> %s116}117 118define arm_aapcs_vfpcc <4 x float> @vcmp_oge_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {119; CHECK-MVE-LABEL: vcmp_oge_v4f32:120; CHECK-MVE:       @ %bb.0: @ %entry121; CHECK-MVE-NEXT:    vcmp.f32 s0, #0122; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr123; CHECK-MVE-NEXT:    vcmp.f32 s3, #0124; CHECK-MVE-NEXT:    cset r0, ge125; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr126; CHECK-MVE-NEXT:    vcmp.f32 s1, #0127; CHECK-MVE-NEXT:    cset r1, ge128; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr129; CHECK-MVE-NEXT:    vcmp.f32 s2, #0130; CHECK-MVE-NEXT:    cset r2, ge131; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr132; CHECK-MVE-NEXT:    cset r3, ge133; CHECK-MVE-NEXT:    cmp r3, #0134; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6135; CHECK-MVE-NEXT:    cmp r2, #0136; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5137; CHECK-MVE-NEXT:    cmp r1, #0138; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7139; CHECK-MVE-NEXT:    cmp r0, #0140; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4141; CHECK-MVE-NEXT:    bx lr142;143; CHECK-MVEFP-LABEL: vcmp_oge_v4f32:144; CHECK-MVEFP:       @ %bb.0: @ %entry145; CHECK-MVEFP-NEXT:    vcmp.f32 ge, q0, zr146; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2147; CHECK-MVEFP-NEXT:    bx lr148entry:149  %c = fcmp oge <4 x float> %src, zeroinitializer150  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b151  ret <4 x float> %s152}153 154define arm_aapcs_vfpcc <4 x float> @vcmp_olt_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {155; CHECK-MVE-LABEL: vcmp_olt_v4f32:156; CHECK-MVE:       @ %bb.0: @ %entry157; CHECK-MVE-NEXT:    vcmp.f32 s0, #0158; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr159; CHECK-MVE-NEXT:    vcmp.f32 s3, #0160; CHECK-MVE-NEXT:    cset r0, mi161; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr162; CHECK-MVE-NEXT:    vcmp.f32 s1, #0163; CHECK-MVE-NEXT:    cset r1, mi164; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr165; CHECK-MVE-NEXT:    vcmp.f32 s2, #0166; CHECK-MVE-NEXT:    cset r2, mi167; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr168; CHECK-MVE-NEXT:    cset r3, mi169; CHECK-MVE-NEXT:    cmp r3, #0170; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6171; CHECK-MVE-NEXT:    cmp r2, #0172; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5173; CHECK-MVE-NEXT:    cmp r1, #0174; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7175; CHECK-MVE-NEXT:    cmp r0, #0176; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4177; CHECK-MVE-NEXT:    bx lr178;179; CHECK-MVEFP-LABEL: vcmp_olt_v4f32:180; CHECK-MVEFP:       @ %bb.0: @ %entry181; CHECK-MVEFP-NEXT:    vcmp.f32 lt, q0, zr182; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2183; CHECK-MVEFP-NEXT:    bx lr184entry:185  %c = fcmp olt <4 x float> %src, zeroinitializer186  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b187  ret <4 x float> %s188}189 190define arm_aapcs_vfpcc <4 x float> @vcmp_ole_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {191; CHECK-MVE-LABEL: vcmp_ole_v4f32:192; CHECK-MVE:       @ %bb.0: @ %entry193; CHECK-MVE-NEXT:    vcmp.f32 s0, #0194; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr195; CHECK-MVE-NEXT:    vcmp.f32 s3, #0196; CHECK-MVE-NEXT:    cset r0, ls197; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr198; CHECK-MVE-NEXT:    vcmp.f32 s1, #0199; CHECK-MVE-NEXT:    cset r1, ls200; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr201; CHECK-MVE-NEXT:    vcmp.f32 s2, #0202; CHECK-MVE-NEXT:    cset r2, ls203; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr204; CHECK-MVE-NEXT:    cset r3, ls205; CHECK-MVE-NEXT:    cmp r3, #0206; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6207; CHECK-MVE-NEXT:    cmp r2, #0208; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5209; CHECK-MVE-NEXT:    cmp r1, #0210; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7211; CHECK-MVE-NEXT:    cmp r0, #0212; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4213; CHECK-MVE-NEXT:    bx lr214;215; CHECK-MVEFP-LABEL: vcmp_ole_v4f32:216; CHECK-MVEFP:       @ %bb.0: @ %entry217; CHECK-MVEFP-NEXT:    vcmp.f32 le, q0, zr218; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2219; CHECK-MVEFP-NEXT:    bx lr220entry:221  %c = fcmp ole <4 x float> %src, zeroinitializer222  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b223  ret <4 x float> %s224}225 226define arm_aapcs_vfpcc <4 x float> @vcmp_ueq_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {227; CHECK-MVE-LABEL: vcmp_ueq_v4f32:228; CHECK-MVE:       @ %bb.0: @ %entry229; CHECK-MVE-NEXT:    vcmp.f32 s0, #0230; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr231; CHECK-MVE-NEXT:    vcmp.f32 s3, #0232; CHECK-MVE-NEXT:    cset r0, eq233; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc234; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr235; CHECK-MVE-NEXT:    vcmp.f32 s1, #0236; CHECK-MVE-NEXT:    cset r1, eq237; CHECK-MVE-NEXT:    csinc r1, r1, zr, vc238; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr239; CHECK-MVE-NEXT:    vcmp.f32 s2, #0240; CHECK-MVE-NEXT:    cset r2, eq241; CHECK-MVE-NEXT:    csinc r2, r2, zr, vc242; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr243; CHECK-MVE-NEXT:    cset r3, eq244; CHECK-MVE-NEXT:    csinc r3, r3, zr, vc245; CHECK-MVE-NEXT:    cmp r3, #0246; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6247; CHECK-MVE-NEXT:    cmp r2, #0248; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5249; CHECK-MVE-NEXT:    cmp r1, #0250; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7251; CHECK-MVE-NEXT:    cmp r0, #0252; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4253; CHECK-MVE-NEXT:    bx lr254;255; CHECK-MVEFP-LABEL: vcmp_ueq_v4f32:256; CHECK-MVEFP:       @ %bb.0: @ %entry257; CHECK-MVEFP-NEXT:    vpt.f32 ge, q0, zr258; CHECK-MVEFP-NEXT:    vcmpt.f32 le, q0, zr259; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2260; CHECK-MVEFP-NEXT:    bx lr261entry:262  %c = fcmp ueq <4 x float> %src, zeroinitializer263  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b264  ret <4 x float> %s265}266 267define arm_aapcs_vfpcc <4 x float> @vcmp_une_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {268; CHECK-MVE-LABEL: vcmp_une_v4f32:269; CHECK-MVE:       @ %bb.0: @ %entry270; CHECK-MVE-NEXT:    vcmp.f32 s2, #0271; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr272; CHECK-MVE-NEXT:    vcmp.f32 s1, #0273; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6274; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr275; CHECK-MVE-NEXT:    vcmp.f32 s3, #0276; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5277; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr278; CHECK-MVE-NEXT:    vcmp.f32 s0, #0279; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7280; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr281; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4282; CHECK-MVE-NEXT:    bx lr283;284; CHECK-MVEFP-LABEL: vcmp_une_v4f32:285; CHECK-MVEFP:       @ %bb.0: @ %entry286; CHECK-MVEFP-NEXT:    vcmp.f32 ne, q0, zr287; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2288; CHECK-MVEFP-NEXT:    bx lr289entry:290  %c = fcmp une <4 x float> %src, zeroinitializer291  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b292  ret <4 x float> %s293}294 295define arm_aapcs_vfpcc <4 x float> @vcmp_ugt_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {296; CHECK-MVE-LABEL: vcmp_ugt_v4f32:297; CHECK-MVE:       @ %bb.0: @ %entry298; CHECK-MVE-NEXT:    vcmp.f32 s0, #0299; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr300; CHECK-MVE-NEXT:    vcmp.f32 s3, #0301; CHECK-MVE-NEXT:    cset r0, hi302; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr303; CHECK-MVE-NEXT:    vcmp.f32 s1, #0304; CHECK-MVE-NEXT:    cset r1, hi305; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr306; CHECK-MVE-NEXT:    vcmp.f32 s2, #0307; CHECK-MVE-NEXT:    cset r2, hi308; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr309; CHECK-MVE-NEXT:    cset r3, hi310; CHECK-MVE-NEXT:    cmp r3, #0311; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6312; CHECK-MVE-NEXT:    cmp r2, #0313; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5314; CHECK-MVE-NEXT:    cmp r1, #0315; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7316; CHECK-MVE-NEXT:    cmp r0, #0317; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4318; CHECK-MVE-NEXT:    bx lr319;320; CHECK-MVEFP-LABEL: vcmp_ugt_v4f32:321; CHECK-MVEFP:       @ %bb.0: @ %entry322; CHECK-MVEFP-NEXT:    vcmp.f32 gt, q0, zr323; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2324; CHECK-MVEFP-NEXT:    bx lr325entry:326  %c = fcmp ugt <4 x float> %src, zeroinitializer327  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b328  ret <4 x float> %s329}330 331define arm_aapcs_vfpcc <4 x float> @vcmp_uge_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {332; CHECK-MVE-LABEL: vcmp_uge_v4f32:333; CHECK-MVE:       @ %bb.0: @ %entry334; CHECK-MVE-NEXT:    vcmp.f32 s0, #0335; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr336; CHECK-MVE-NEXT:    vcmp.f32 s3, #0337; CHECK-MVE-NEXT:    cset r0, pl338; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr339; CHECK-MVE-NEXT:    vcmp.f32 s1, #0340; CHECK-MVE-NEXT:    cset r1, pl341; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr342; CHECK-MVE-NEXT:    vcmp.f32 s2, #0343; CHECK-MVE-NEXT:    cset r2, pl344; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr345; CHECK-MVE-NEXT:    cset r3, pl346; CHECK-MVE-NEXT:    cmp r3, #0347; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6348; CHECK-MVE-NEXT:    cmp r2, #0349; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5350; CHECK-MVE-NEXT:    cmp r1, #0351; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7352; CHECK-MVE-NEXT:    cmp r0, #0353; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4354; CHECK-MVE-NEXT:    bx lr355;356; CHECK-MVEFP-LABEL: vcmp_uge_v4f32:357; CHECK-MVEFP:       @ %bb.0: @ %entry358; CHECK-MVEFP-NEXT:    vcmp.f32 ge, q0, zr359; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2360; CHECK-MVEFP-NEXT:    bx lr361entry:362  %c = fcmp uge <4 x float> %src, zeroinitializer363  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b364  ret <4 x float> %s365}366 367define arm_aapcs_vfpcc <4 x float> @vcmp_ult_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {368; CHECK-MVE-LABEL: vcmp_ult_v4f32:369; CHECK-MVE:       @ %bb.0: @ %entry370; CHECK-MVE-NEXT:    vcmp.f32 s0, #0371; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr372; CHECK-MVE-NEXT:    vcmp.f32 s3, #0373; CHECK-MVE-NEXT:    cset r0, lt374; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr375; CHECK-MVE-NEXT:    vcmp.f32 s1, #0376; CHECK-MVE-NEXT:    cset r1, lt377; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr378; CHECK-MVE-NEXT:    vcmp.f32 s2, #0379; CHECK-MVE-NEXT:    cset r2, lt380; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr381; CHECK-MVE-NEXT:    cset r3, lt382; CHECK-MVE-NEXT:    cmp r3, #0383; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6384; CHECK-MVE-NEXT:    cmp r2, #0385; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5386; CHECK-MVE-NEXT:    cmp r1, #0387; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7388; CHECK-MVE-NEXT:    cmp r0, #0389; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4390; CHECK-MVE-NEXT:    bx lr391;392; CHECK-MVEFP-LABEL: vcmp_ult_v4f32:393; CHECK-MVEFP:       @ %bb.0: @ %entry394; CHECK-MVEFP-NEXT:    vcmp.f32 lt, q0, zr395; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2396; CHECK-MVEFP-NEXT:    bx lr397entry:398  %c = fcmp ult <4 x float> %src, zeroinitializer399  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b400  ret <4 x float> %s401}402 403define arm_aapcs_vfpcc <4 x float> @vcmp_ule_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {404; CHECK-MVE-LABEL: vcmp_ule_v4f32:405; CHECK-MVE:       @ %bb.0: @ %entry406; CHECK-MVE-NEXT:    vcmp.f32 s0, #0407; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr408; CHECK-MVE-NEXT:    vcmp.f32 s3, #0409; CHECK-MVE-NEXT:    cset r0, le410; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr411; CHECK-MVE-NEXT:    vcmp.f32 s1, #0412; CHECK-MVE-NEXT:    cset r1, le413; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr414; CHECK-MVE-NEXT:    vcmp.f32 s2, #0415; CHECK-MVE-NEXT:    cset r2, le416; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr417; CHECK-MVE-NEXT:    cset r3, le418; CHECK-MVE-NEXT:    cmp r3, #0419; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6420; CHECK-MVE-NEXT:    cmp r2, #0421; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5422; CHECK-MVE-NEXT:    cmp r1, #0423; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7424; CHECK-MVE-NEXT:    cmp r0, #0425; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4426; CHECK-MVE-NEXT:    bx lr427;428; CHECK-MVEFP-LABEL: vcmp_ule_v4f32:429; CHECK-MVEFP:       @ %bb.0: @ %entry430; CHECK-MVEFP-NEXT:    vcmp.f32 le, q0, zr431; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2432; CHECK-MVEFP-NEXT:    bx lr433entry:434  %c = fcmp ule <4 x float> %src, zeroinitializer435  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b436  ret <4 x float> %s437}438 439define arm_aapcs_vfpcc <4 x float> @vcmp_ord_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {440; CHECK-MVE-LABEL: vcmp_ord_v4f32:441; CHECK-MVE:       @ %bb.0: @ %entry442; CHECK-MVE-NEXT:    vcmp.f32 s0, s0443; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr444; CHECK-MVE-NEXT:    vcmp.f32 s3, s3445; CHECK-MVE-NEXT:    cset r0, vc446; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr447; CHECK-MVE-NEXT:    vcmp.f32 s1, s1448; CHECK-MVE-NEXT:    cset r1, vc449; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr450; CHECK-MVE-NEXT:    vcmp.f32 s2, s2451; CHECK-MVE-NEXT:    cset r2, vc452; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr453; CHECK-MVE-NEXT:    cset r3, vc454; CHECK-MVE-NEXT:    cmp r3, #0455; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6456; CHECK-MVE-NEXT:    cmp r2, #0457; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5458; CHECK-MVE-NEXT:    cmp r1, #0459; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7460; CHECK-MVE-NEXT:    cmp r0, #0461; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4462; CHECK-MVE-NEXT:    bx lr463;464; CHECK-MVEFP-LABEL: vcmp_ord_v4f32:465; CHECK-MVEFP:       @ %bb.0: @ %entry466; CHECK-MVEFP-NEXT:    vpt.f32 ge, q0, zr467; CHECK-MVEFP-NEXT:    vcmpt.f32 lt, q0, zr468; CHECK-MVEFP-NEXT:    vpsel q0, q2, q1469; CHECK-MVEFP-NEXT:    bx lr470entry:471  %c = fcmp ord <4 x float> %src, zeroinitializer472  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b473  ret <4 x float> %s474}475 476define arm_aapcs_vfpcc <4 x float> @vcmp_uno_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {477; CHECK-MVE-LABEL: vcmp_uno_v4f32:478; CHECK-MVE:       @ %bb.0: @ %entry479; CHECK-MVE-NEXT:    vcmp.f32 s0, s0480; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr481; CHECK-MVE-NEXT:    vcmp.f32 s3, s3482; CHECK-MVE-NEXT:    cset r0, vs483; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr484; CHECK-MVE-NEXT:    vcmp.f32 s1, s1485; CHECK-MVE-NEXT:    cset r1, vs486; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr487; CHECK-MVE-NEXT:    vcmp.f32 s2, s2488; CHECK-MVE-NEXT:    cset r2, vs489; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr490; CHECK-MVE-NEXT:    cset r3, vs491; CHECK-MVE-NEXT:    cmp r3, #0492; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s6493; CHECK-MVE-NEXT:    cmp r2, #0494; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s5495; CHECK-MVE-NEXT:    cmp r1, #0496; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s7497; CHECK-MVE-NEXT:    cmp r0, #0498; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s4499; CHECK-MVE-NEXT:    bx lr500;501; CHECK-MVEFP-LABEL: vcmp_uno_v4f32:502; CHECK-MVEFP:       @ %bb.0: @ %entry503; CHECK-MVEFP-NEXT:    vpt.f32 ge, q0, zr504; CHECK-MVEFP-NEXT:    vcmpt.f32 lt, q0, zr505; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2506; CHECK-MVEFP-NEXT:    bx lr507entry:508  %c = fcmp uno <4 x float> %src, zeroinitializer509  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b510  ret <4 x float> %s511}512 513 514 515define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {516; CHECK-MVE-LABEL: vcmp_oeq_v8f16:517; CHECK-MVE:       @ %bb.0: @ %entry518; CHECK-MVE-NEXT:    vmovx.f16 s12, s0519; CHECK-MVE-NEXT:    vmovx.f16 s14, s8520; CHECK-MVE-NEXT:    vcmp.f16 s12, #0521; CHECK-MVE-NEXT:    vmovx.f16 s12, s4522; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr523; CHECK-MVE-NEXT:    vcmp.f16 s0, #0524; CHECK-MVE-NEXT:    cset r0, eq525; CHECK-MVE-NEXT:    cmp r0, #0526; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s12527; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr528; CHECK-MVE-NEXT:    cset r0, eq529; CHECK-MVE-NEXT:    cmp r0, #0530; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s4531; CHECK-MVE-NEXT:    vmovx.f16 s4, s1532; CHECK-MVE-NEXT:    vcmp.f16 s4, #0533; CHECK-MVE-NEXT:    vmovx.f16 s4, s5534; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr535; CHECK-MVE-NEXT:    vmovx.f16 s8, s9536; CHECK-MVE-NEXT:    vcmp.f16 s1, #0537; CHECK-MVE-NEXT:    vins.f16 s0, s12538; CHECK-MVE-NEXT:    cset r0, eq539; CHECK-MVE-NEXT:    cmp r0, #0540; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4541; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr542; CHECK-MVE-NEXT:    vmovx.f16 s8, s10543; CHECK-MVE-NEXT:    cset r0, eq544; CHECK-MVE-NEXT:    cmp r0, #0545; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s5546; CHECK-MVE-NEXT:    vins.f16 s1, s4547; CHECK-MVE-NEXT:    vmovx.f16 s4, s2548; CHECK-MVE-NEXT:    vcmp.f16 s4, #0549; CHECK-MVE-NEXT:    vmovx.f16 s4, s6550; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr551; CHECK-MVE-NEXT:    vcmp.f16 s2, #0552; CHECK-MVE-NEXT:    cset r0, eq553; CHECK-MVE-NEXT:    cmp r0, #0554; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4555; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr556; CHECK-MVE-NEXT:    cset r0, eq557; CHECK-MVE-NEXT:    cmp r0, #0558; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s6559; CHECK-MVE-NEXT:    vmovx.f16 s6, s11560; CHECK-MVE-NEXT:    vins.f16 s2, s4561; CHECK-MVE-NEXT:    vmovx.f16 s4, s3562; CHECK-MVE-NEXT:    vcmp.f16 s4, #0563; CHECK-MVE-NEXT:    vmovx.f16 s4, s7564; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr565; CHECK-MVE-NEXT:    vcmp.f16 s3, #0566; CHECK-MVE-NEXT:    cset r0, eq567; CHECK-MVE-NEXT:    cmp r0, #0568; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s4569; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr570; CHECK-MVE-NEXT:    cset r0, eq571; CHECK-MVE-NEXT:    cmp r0, #0572; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s7573; CHECK-MVE-NEXT:    vins.f16 s3, s4574; CHECK-MVE-NEXT:    bx lr575;576; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16:577; CHECK-MVEFP:       @ %bb.0: @ %entry578; CHECK-MVEFP-NEXT:    vcmp.f16 eq, q0, zr579; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2580; CHECK-MVEFP-NEXT:    bx lr581entry:582  %c = fcmp oeq <8 x half> %src, zeroinitializer583  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b584  ret <8 x half> %s585}586 587define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {588; CHECK-MVE-LABEL: vcmp_one_v8f16:589; CHECK-MVE:       @ %bb.0: @ %entry590; CHECK-MVE-NEXT:    vmovx.f16 s12, s0591; CHECK-MVE-NEXT:    vmovx.f16 s14, s8592; CHECK-MVE-NEXT:    vcmp.f16 s12, #0593; CHECK-MVE-NEXT:    vmovx.f16 s12, s4594; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr595; CHECK-MVE-NEXT:    vcmp.f16 s0, #0596; CHECK-MVE-NEXT:    cset r0, mi597; CHECK-MVE-NEXT:    csinc r0, r0, zr, le598; CHECK-MVE-NEXT:    cmp r0, #0599; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s12600; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr601; CHECK-MVE-NEXT:    cset r0, mi602; CHECK-MVE-NEXT:    csinc r0, r0, zr, le603; CHECK-MVE-NEXT:    cmp r0, #0604; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s4605; CHECK-MVE-NEXT:    vmovx.f16 s4, s1606; CHECK-MVE-NEXT:    vcmp.f16 s4, #0607; CHECK-MVE-NEXT:    vmovx.f16 s4, s5608; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr609; CHECK-MVE-NEXT:    vmovx.f16 s8, s9610; CHECK-MVE-NEXT:    vcmp.f16 s1, #0611; CHECK-MVE-NEXT:    vins.f16 s0, s12612; CHECK-MVE-NEXT:    cset r0, mi613; CHECK-MVE-NEXT:    csinc r0, r0, zr, le614; CHECK-MVE-NEXT:    cmp r0, #0615; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4616; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr617; CHECK-MVE-NEXT:    vmovx.f16 s8, s10618; CHECK-MVE-NEXT:    cset r0, mi619; CHECK-MVE-NEXT:    csinc r0, r0, zr, le620; CHECK-MVE-NEXT:    cmp r0, #0621; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s5622; CHECK-MVE-NEXT:    vins.f16 s1, s4623; CHECK-MVE-NEXT:    vmovx.f16 s4, s2624; CHECK-MVE-NEXT:    vcmp.f16 s4, #0625; CHECK-MVE-NEXT:    vmovx.f16 s4, s6626; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr627; CHECK-MVE-NEXT:    vcmp.f16 s2, #0628; CHECK-MVE-NEXT:    cset r0, mi629; CHECK-MVE-NEXT:    csinc r0, r0, zr, le630; CHECK-MVE-NEXT:    cmp r0, #0631; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4632; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr633; CHECK-MVE-NEXT:    cset r0, mi634; CHECK-MVE-NEXT:    csinc r0, r0, zr, le635; CHECK-MVE-NEXT:    cmp r0, #0636; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s6637; CHECK-MVE-NEXT:    vmovx.f16 s6, s11638; CHECK-MVE-NEXT:    vins.f16 s2, s4639; CHECK-MVE-NEXT:    vmovx.f16 s4, s3640; CHECK-MVE-NEXT:    vcmp.f16 s4, #0641; CHECK-MVE-NEXT:    vmovx.f16 s4, s7642; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr643; CHECK-MVE-NEXT:    vcmp.f16 s3, #0644; CHECK-MVE-NEXT:    cset r0, mi645; CHECK-MVE-NEXT:    csinc r0, r0, zr, le646; CHECK-MVE-NEXT:    cmp r0, #0647; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s4648; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr649; CHECK-MVE-NEXT:    cset r0, mi650; CHECK-MVE-NEXT:    csinc r0, r0, zr, le651; CHECK-MVE-NEXT:    cmp r0, #0652; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s7653; CHECK-MVE-NEXT:    vins.f16 s3, s4654; CHECK-MVE-NEXT:    bx lr655;656; CHECK-MVEFP-LABEL: vcmp_one_v8f16:657; CHECK-MVEFP:       @ %bb.0: @ %entry658; CHECK-MVEFP-NEXT:    vpt.f16 ge, q0, zr659; CHECK-MVEFP-NEXT:    vcmpt.f16 le, q0, zr660; CHECK-MVEFP-NEXT:    vpsel q0, q2, q1661; CHECK-MVEFP-NEXT:    bx lr662entry:663  %c = fcmp one <8 x half> %src, zeroinitializer664  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b665  ret <8 x half> %s666}667 668define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {669; CHECK-MVE-LABEL: vcmp_ogt_v8f16:670; CHECK-MVE:       @ %bb.0: @ %entry671; CHECK-MVE-NEXT:    vmovx.f16 s12, s0672; CHECK-MVE-NEXT:    vmovx.f16 s14, s8673; CHECK-MVE-NEXT:    vcmp.f16 s12, #0674; CHECK-MVE-NEXT:    vmovx.f16 s12, s4675; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr676; CHECK-MVE-NEXT:    vcmp.f16 s0, #0677; CHECK-MVE-NEXT:    cset r0, gt678; CHECK-MVE-NEXT:    cmp r0, #0679; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s12680; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr681; CHECK-MVE-NEXT:    cset r0, gt682; CHECK-MVE-NEXT:    cmp r0, #0683; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s4684; CHECK-MVE-NEXT:    vmovx.f16 s4, s1685; CHECK-MVE-NEXT:    vcmp.f16 s4, #0686; CHECK-MVE-NEXT:    vmovx.f16 s4, s5687; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr688; CHECK-MVE-NEXT:    vmovx.f16 s8, s9689; CHECK-MVE-NEXT:    vcmp.f16 s1, #0690; CHECK-MVE-NEXT:    vins.f16 s0, s12691; CHECK-MVE-NEXT:    cset r0, gt692; CHECK-MVE-NEXT:    cmp r0, #0693; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4694; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr695; CHECK-MVE-NEXT:    vmovx.f16 s8, s10696; CHECK-MVE-NEXT:    cset r0, gt697; CHECK-MVE-NEXT:    cmp r0, #0698; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s5699; CHECK-MVE-NEXT:    vins.f16 s1, s4700; CHECK-MVE-NEXT:    vmovx.f16 s4, s2701; CHECK-MVE-NEXT:    vcmp.f16 s4, #0702; CHECK-MVE-NEXT:    vmovx.f16 s4, s6703; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr704; CHECK-MVE-NEXT:    vcmp.f16 s2, #0705; CHECK-MVE-NEXT:    cset r0, gt706; CHECK-MVE-NEXT:    cmp r0, #0707; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4708; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr709; CHECK-MVE-NEXT:    cset r0, gt710; CHECK-MVE-NEXT:    cmp r0, #0711; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s6712; CHECK-MVE-NEXT:    vmovx.f16 s6, s11713; CHECK-MVE-NEXT:    vins.f16 s2, s4714; CHECK-MVE-NEXT:    vmovx.f16 s4, s3715; CHECK-MVE-NEXT:    vcmp.f16 s4, #0716; CHECK-MVE-NEXT:    vmovx.f16 s4, s7717; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr718; CHECK-MVE-NEXT:    vcmp.f16 s3, #0719; CHECK-MVE-NEXT:    cset r0, gt720; CHECK-MVE-NEXT:    cmp r0, #0721; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s4722; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr723; CHECK-MVE-NEXT:    cset r0, gt724; CHECK-MVE-NEXT:    cmp r0, #0725; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s7726; CHECK-MVE-NEXT:    vins.f16 s3, s4727; CHECK-MVE-NEXT:    bx lr728;729; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16:730; CHECK-MVEFP:       @ %bb.0: @ %entry731; CHECK-MVEFP-NEXT:    vcmp.f16 gt, q0, zr732; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2733; CHECK-MVEFP-NEXT:    bx lr734entry:735  %c = fcmp ogt <8 x half> %src, zeroinitializer736  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b737  ret <8 x half> %s738}739 740define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {741; CHECK-MVE-LABEL: vcmp_oge_v8f16:742; CHECK-MVE:       @ %bb.0: @ %entry743; CHECK-MVE-NEXT:    vmovx.f16 s12, s0744; CHECK-MVE-NEXT:    vmovx.f16 s14, s8745; CHECK-MVE-NEXT:    vcmp.f16 s12, #0746; CHECK-MVE-NEXT:    vmovx.f16 s12, s4747; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr748; CHECK-MVE-NEXT:    vcmp.f16 s0, #0749; CHECK-MVE-NEXT:    cset r0, ge750; CHECK-MVE-NEXT:    cmp r0, #0751; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s12752; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr753; CHECK-MVE-NEXT:    cset r0, ge754; CHECK-MVE-NEXT:    cmp r0, #0755; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s4756; CHECK-MVE-NEXT:    vmovx.f16 s4, s1757; CHECK-MVE-NEXT:    vcmp.f16 s4, #0758; CHECK-MVE-NEXT:    vmovx.f16 s4, s5759; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr760; CHECK-MVE-NEXT:    vmovx.f16 s8, s9761; CHECK-MVE-NEXT:    vcmp.f16 s1, #0762; CHECK-MVE-NEXT:    vins.f16 s0, s12763; CHECK-MVE-NEXT:    cset r0, ge764; CHECK-MVE-NEXT:    cmp r0, #0765; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4766; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr767; CHECK-MVE-NEXT:    vmovx.f16 s8, s10768; CHECK-MVE-NEXT:    cset r0, ge769; CHECK-MVE-NEXT:    cmp r0, #0770; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s5771; CHECK-MVE-NEXT:    vins.f16 s1, s4772; CHECK-MVE-NEXT:    vmovx.f16 s4, s2773; CHECK-MVE-NEXT:    vcmp.f16 s4, #0774; CHECK-MVE-NEXT:    vmovx.f16 s4, s6775; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr776; CHECK-MVE-NEXT:    vcmp.f16 s2, #0777; CHECK-MVE-NEXT:    cset r0, ge778; CHECK-MVE-NEXT:    cmp r0, #0779; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4780; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr781; CHECK-MVE-NEXT:    cset r0, ge782; CHECK-MVE-NEXT:    cmp r0, #0783; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s6784; CHECK-MVE-NEXT:    vmovx.f16 s6, s11785; CHECK-MVE-NEXT:    vins.f16 s2, s4786; CHECK-MVE-NEXT:    vmovx.f16 s4, s3787; CHECK-MVE-NEXT:    vcmp.f16 s4, #0788; CHECK-MVE-NEXT:    vmovx.f16 s4, s7789; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr790; CHECK-MVE-NEXT:    vcmp.f16 s3, #0791; CHECK-MVE-NEXT:    cset r0, ge792; CHECK-MVE-NEXT:    cmp r0, #0793; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s4794; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr795; CHECK-MVE-NEXT:    cset r0, ge796; CHECK-MVE-NEXT:    cmp r0, #0797; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s7798; CHECK-MVE-NEXT:    vins.f16 s3, s4799; CHECK-MVE-NEXT:    bx lr800;801; CHECK-MVEFP-LABEL: vcmp_oge_v8f16:802; CHECK-MVEFP:       @ %bb.0: @ %entry803; CHECK-MVEFP-NEXT:    vcmp.f16 ge, q0, zr804; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2805; CHECK-MVEFP-NEXT:    bx lr806entry:807  %c = fcmp oge <8 x half> %src, zeroinitializer808  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b809  ret <8 x half> %s810}811 812define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {813; CHECK-MVE-LABEL: vcmp_olt_v8f16:814; CHECK-MVE:       @ %bb.0: @ %entry815; CHECK-MVE-NEXT:    vmovx.f16 s12, s0816; CHECK-MVE-NEXT:    vmovx.f16 s14, s8817; CHECK-MVE-NEXT:    vcmp.f16 s12, #0818; CHECK-MVE-NEXT:    vmovx.f16 s12, s4819; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr820; CHECK-MVE-NEXT:    vcmp.f16 s0, #0821; CHECK-MVE-NEXT:    cset r0, mi822; CHECK-MVE-NEXT:    cmp r0, #0823; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s12824; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr825; CHECK-MVE-NEXT:    cset r0, mi826; CHECK-MVE-NEXT:    cmp r0, #0827; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s4828; CHECK-MVE-NEXT:    vmovx.f16 s4, s1829; CHECK-MVE-NEXT:    vcmp.f16 s4, #0830; CHECK-MVE-NEXT:    vmovx.f16 s4, s5831; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr832; CHECK-MVE-NEXT:    vmovx.f16 s8, s9833; CHECK-MVE-NEXT:    vcmp.f16 s1, #0834; CHECK-MVE-NEXT:    vins.f16 s0, s12835; CHECK-MVE-NEXT:    cset r0, mi836; CHECK-MVE-NEXT:    cmp r0, #0837; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4838; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr839; CHECK-MVE-NEXT:    vmovx.f16 s8, s10840; CHECK-MVE-NEXT:    cset r0, mi841; CHECK-MVE-NEXT:    cmp r0, #0842; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s5843; CHECK-MVE-NEXT:    vins.f16 s1, s4844; CHECK-MVE-NEXT:    vmovx.f16 s4, s2845; CHECK-MVE-NEXT:    vcmp.f16 s4, #0846; CHECK-MVE-NEXT:    vmovx.f16 s4, s6847; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr848; CHECK-MVE-NEXT:    vcmp.f16 s2, #0849; CHECK-MVE-NEXT:    cset r0, mi850; CHECK-MVE-NEXT:    cmp r0, #0851; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4852; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr853; CHECK-MVE-NEXT:    cset r0, mi854; CHECK-MVE-NEXT:    cmp r0, #0855; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s6856; CHECK-MVE-NEXT:    vmovx.f16 s6, s11857; CHECK-MVE-NEXT:    vins.f16 s2, s4858; CHECK-MVE-NEXT:    vmovx.f16 s4, s3859; CHECK-MVE-NEXT:    vcmp.f16 s4, #0860; CHECK-MVE-NEXT:    vmovx.f16 s4, s7861; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr862; CHECK-MVE-NEXT:    vcmp.f16 s3, #0863; CHECK-MVE-NEXT:    cset r0, mi864; CHECK-MVE-NEXT:    cmp r0, #0865; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s4866; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr867; CHECK-MVE-NEXT:    cset r0, mi868; CHECK-MVE-NEXT:    cmp r0, #0869; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s7870; CHECK-MVE-NEXT:    vins.f16 s3, s4871; CHECK-MVE-NEXT:    bx lr872;873; CHECK-MVEFP-LABEL: vcmp_olt_v8f16:874; CHECK-MVEFP:       @ %bb.0: @ %entry875; CHECK-MVEFP-NEXT:    vcmp.f16 lt, q0, zr876; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2877; CHECK-MVEFP-NEXT:    bx lr878entry:879  %c = fcmp olt <8 x half> %src, zeroinitializer880  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b881  ret <8 x half> %s882}883 884define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {885; CHECK-MVE-LABEL: vcmp_ole_v8f16:886; CHECK-MVE:       @ %bb.0: @ %entry887; CHECK-MVE-NEXT:    vmovx.f16 s12, s0888; CHECK-MVE-NEXT:    vmovx.f16 s14, s8889; CHECK-MVE-NEXT:    vcmp.f16 s12, #0890; CHECK-MVE-NEXT:    vmovx.f16 s12, s4891; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr892; CHECK-MVE-NEXT:    vcmp.f16 s0, #0893; CHECK-MVE-NEXT:    cset r0, ls894; CHECK-MVE-NEXT:    cmp r0, #0895; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s12896; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr897; CHECK-MVE-NEXT:    cset r0, ls898; CHECK-MVE-NEXT:    cmp r0, #0899; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s4900; CHECK-MVE-NEXT:    vmovx.f16 s4, s1901; CHECK-MVE-NEXT:    vcmp.f16 s4, #0902; CHECK-MVE-NEXT:    vmovx.f16 s4, s5903; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr904; CHECK-MVE-NEXT:    vmovx.f16 s8, s9905; CHECK-MVE-NEXT:    vcmp.f16 s1, #0906; CHECK-MVE-NEXT:    vins.f16 s0, s12907; CHECK-MVE-NEXT:    cset r0, ls908; CHECK-MVE-NEXT:    cmp r0, #0909; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4910; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr911; CHECK-MVE-NEXT:    vmovx.f16 s8, s10912; CHECK-MVE-NEXT:    cset r0, ls913; CHECK-MVE-NEXT:    cmp r0, #0914; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s5915; CHECK-MVE-NEXT:    vins.f16 s1, s4916; CHECK-MVE-NEXT:    vmovx.f16 s4, s2917; CHECK-MVE-NEXT:    vcmp.f16 s4, #0918; CHECK-MVE-NEXT:    vmovx.f16 s4, s6919; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr920; CHECK-MVE-NEXT:    vcmp.f16 s2, #0921; CHECK-MVE-NEXT:    cset r0, ls922; CHECK-MVE-NEXT:    cmp r0, #0923; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4924; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr925; CHECK-MVE-NEXT:    cset r0, ls926; CHECK-MVE-NEXT:    cmp r0, #0927; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s6928; CHECK-MVE-NEXT:    vmovx.f16 s6, s11929; CHECK-MVE-NEXT:    vins.f16 s2, s4930; CHECK-MVE-NEXT:    vmovx.f16 s4, s3931; CHECK-MVE-NEXT:    vcmp.f16 s4, #0932; CHECK-MVE-NEXT:    vmovx.f16 s4, s7933; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr934; CHECK-MVE-NEXT:    vcmp.f16 s3, #0935; CHECK-MVE-NEXT:    cset r0, ls936; CHECK-MVE-NEXT:    cmp r0, #0937; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s4938; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr939; CHECK-MVE-NEXT:    cset r0, ls940; CHECK-MVE-NEXT:    cmp r0, #0941; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s7942; CHECK-MVE-NEXT:    vins.f16 s3, s4943; CHECK-MVE-NEXT:    bx lr944;945; CHECK-MVEFP-LABEL: vcmp_ole_v8f16:946; CHECK-MVEFP:       @ %bb.0: @ %entry947; CHECK-MVEFP-NEXT:    vcmp.f16 le, q0, zr948; CHECK-MVEFP-NEXT:    vpsel q0, q1, q2949; CHECK-MVEFP-NEXT:    bx lr950entry:951  %c = fcmp ole <8 x half> %src, zeroinitializer952  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b953  ret <8 x half> %s954}955 956define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {957; CHECK-MVE-LABEL: vcmp_ueq_v8f16:958; CHECK-MVE:       @ %bb.0: @ %entry959; CHECK-MVE-NEXT:    vmovx.f16 s12, s0960; CHECK-MVE-NEXT:    vmovx.f16 s14, s8961; CHECK-MVE-NEXT:    vcmp.f16 s12, #0962; CHECK-MVE-NEXT:    vmovx.f16 s12, s4963; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr964; CHECK-MVE-NEXT:    vcmp.f16 s0, #0965; CHECK-MVE-NEXT:    cset r0, eq966; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc967; CHECK-MVE-NEXT:    cmp r0, #0968; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s12969; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr970; CHECK-MVE-NEXT:    cset r0, eq971; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc972; CHECK-MVE-NEXT:    cmp r0, #0973; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s4974; CHECK-MVE-NEXT:    vmovx.f16 s4, s1975; CHECK-MVE-NEXT:    vcmp.f16 s4, #0976; CHECK-MVE-NEXT:    vmovx.f16 s4, s5977; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr978; CHECK-MVE-NEXT:    vmovx.f16 s8, s9979; CHECK-MVE-NEXT:    vcmp.f16 s1, #0980; CHECK-MVE-NEXT:    vins.f16 s0, s12981; CHECK-MVE-NEXT:    cset r0, eq982; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc983; CHECK-MVE-NEXT:    cmp r0, #0984; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s4985; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr986; CHECK-MVE-NEXT:    vmovx.f16 s8, s10987; CHECK-MVE-NEXT:    cset r0, eq988; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc989; CHECK-MVE-NEXT:    cmp r0, #0990; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s5991; CHECK-MVE-NEXT:    vins.f16 s1, s4992; CHECK-MVE-NEXT:    vmovx.f16 s4, s2993; CHECK-MVE-NEXT:    vcmp.f16 s4, #0994; CHECK-MVE-NEXT:    vmovx.f16 s4, s6995; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr996; CHECK-MVE-NEXT:    vcmp.f16 s2, #0997; CHECK-MVE-NEXT:    cset r0, eq998; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc999; CHECK-MVE-NEXT:    cmp r0, #01000; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41001; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1002; CHECK-MVE-NEXT:    cset r0, eq1003; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc1004; CHECK-MVE-NEXT:    cmp r0, #01005; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61006; CHECK-MVE-NEXT:    vmovx.f16 s6, s111007; CHECK-MVE-NEXT:    vins.f16 s2, s41008; CHECK-MVE-NEXT:    vmovx.f16 s4, s31009; CHECK-MVE-NEXT:    vcmp.f16 s4, #01010; CHECK-MVE-NEXT:    vmovx.f16 s4, s71011; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1012; CHECK-MVE-NEXT:    vcmp.f16 s3, #01013; CHECK-MVE-NEXT:    cset r0, eq1014; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc1015; CHECK-MVE-NEXT:    cmp r0, #01016; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41017; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1018; CHECK-MVE-NEXT:    cset r0, eq1019; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc1020; CHECK-MVE-NEXT:    cmp r0, #01021; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71022; CHECK-MVE-NEXT:    vins.f16 s3, s41023; CHECK-MVE-NEXT:    bx lr1024;1025; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16:1026; CHECK-MVEFP:       @ %bb.0: @ %entry1027; CHECK-MVEFP-NEXT:    vpt.f16 ge, q0, zr1028; CHECK-MVEFP-NEXT:    vcmpt.f16 le, q0, zr1029; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21030; CHECK-MVEFP-NEXT:    bx lr1031entry:1032  %c = fcmp ueq <8 x half> %src, zeroinitializer1033  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1034  ret <8 x half> %s1035}1036 1037define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {1038; CHECK-MVE-LABEL: vcmp_une_v8f16:1039; CHECK-MVE:       @ %bb.0: @ %entry1040; CHECK-MVE-NEXT:    vmovx.f16 s12, s01041; CHECK-MVE-NEXT:    vmovx.f16 s14, s81042; CHECK-MVE-NEXT:    vcmp.f16 s12, #01043; CHECK-MVE-NEXT:    vmovx.f16 s12, s41044; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1045; CHECK-MVE-NEXT:    vcmp.f16 s0, #01046; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s121047; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1048; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s41049; CHECK-MVE-NEXT:    vmovx.f16 s4, s11050; CHECK-MVE-NEXT:    vcmp.f16 s4, #01051; CHECK-MVE-NEXT:    vmovx.f16 s4, s51052; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1053; CHECK-MVE-NEXT:    vmovx.f16 s8, s91054; CHECK-MVE-NEXT:    vcmp.f16 s1, #01055; CHECK-MVE-NEXT:    vins.f16 s0, s121056; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41057; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1058; CHECK-MVE-NEXT:    vmovx.f16 s8, s101059; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s51060; CHECK-MVE-NEXT:    vins.f16 s1, s41061; CHECK-MVE-NEXT:    vmovx.f16 s4, s21062; CHECK-MVE-NEXT:    vcmp.f16 s4, #01063; CHECK-MVE-NEXT:    vmovx.f16 s4, s61064; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1065; CHECK-MVE-NEXT:    vcmp.f16 s2, #01066; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41067; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1068; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61069; CHECK-MVE-NEXT:    vmovx.f16 s6, s111070; CHECK-MVE-NEXT:    vins.f16 s2, s41071; CHECK-MVE-NEXT:    vmovx.f16 s4, s31072; CHECK-MVE-NEXT:    vcmp.f16 s4, #01073; CHECK-MVE-NEXT:    vmovx.f16 s4, s71074; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1075; CHECK-MVE-NEXT:    vcmp.f16 s3, #01076; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41077; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1078; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71079; CHECK-MVE-NEXT:    vins.f16 s3, s41080; CHECK-MVE-NEXT:    bx lr1081;1082; CHECK-MVEFP-LABEL: vcmp_une_v8f16:1083; CHECK-MVEFP:       @ %bb.0: @ %entry1084; CHECK-MVEFP-NEXT:    vcmp.f16 ne, q0, zr1085; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21086; CHECK-MVEFP-NEXT:    bx lr1087entry:1088  %c = fcmp une <8 x half> %src, zeroinitializer1089  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1090  ret <8 x half> %s1091}1092 1093define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {1094; CHECK-MVE-LABEL: vcmp_ugt_v8f16:1095; CHECK-MVE:       @ %bb.0: @ %entry1096; CHECK-MVE-NEXT:    vmovx.f16 s12, s01097; CHECK-MVE-NEXT:    vmovx.f16 s14, s81098; CHECK-MVE-NEXT:    vcmp.f16 s12, #01099; CHECK-MVE-NEXT:    vmovx.f16 s12, s41100; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1101; CHECK-MVE-NEXT:    vcmp.f16 s0, #01102; CHECK-MVE-NEXT:    cset r0, hi1103; CHECK-MVE-NEXT:    cmp r0, #01104; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s121105; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1106; CHECK-MVE-NEXT:    cset r0, hi1107; CHECK-MVE-NEXT:    cmp r0, #01108; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s41109; CHECK-MVE-NEXT:    vmovx.f16 s4, s11110; CHECK-MVE-NEXT:    vcmp.f16 s4, #01111; CHECK-MVE-NEXT:    vmovx.f16 s4, s51112; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1113; CHECK-MVE-NEXT:    vmovx.f16 s8, s91114; CHECK-MVE-NEXT:    vcmp.f16 s1, #01115; CHECK-MVE-NEXT:    vins.f16 s0, s121116; CHECK-MVE-NEXT:    cset r0, hi1117; CHECK-MVE-NEXT:    cmp r0, #01118; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41119; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1120; CHECK-MVE-NEXT:    vmovx.f16 s8, s101121; CHECK-MVE-NEXT:    cset r0, hi1122; CHECK-MVE-NEXT:    cmp r0, #01123; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s51124; CHECK-MVE-NEXT:    vins.f16 s1, s41125; CHECK-MVE-NEXT:    vmovx.f16 s4, s21126; CHECK-MVE-NEXT:    vcmp.f16 s4, #01127; CHECK-MVE-NEXT:    vmovx.f16 s4, s61128; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1129; CHECK-MVE-NEXT:    vcmp.f16 s2, #01130; CHECK-MVE-NEXT:    cset r0, hi1131; CHECK-MVE-NEXT:    cmp r0, #01132; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41133; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1134; CHECK-MVE-NEXT:    cset r0, hi1135; CHECK-MVE-NEXT:    cmp r0, #01136; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61137; CHECK-MVE-NEXT:    vmovx.f16 s6, s111138; CHECK-MVE-NEXT:    vins.f16 s2, s41139; CHECK-MVE-NEXT:    vmovx.f16 s4, s31140; CHECK-MVE-NEXT:    vcmp.f16 s4, #01141; CHECK-MVE-NEXT:    vmovx.f16 s4, s71142; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1143; CHECK-MVE-NEXT:    vcmp.f16 s3, #01144; CHECK-MVE-NEXT:    cset r0, hi1145; CHECK-MVE-NEXT:    cmp r0, #01146; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41147; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1148; CHECK-MVE-NEXT:    cset r0, hi1149; CHECK-MVE-NEXT:    cmp r0, #01150; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71151; CHECK-MVE-NEXT:    vins.f16 s3, s41152; CHECK-MVE-NEXT:    bx lr1153;1154; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16:1155; CHECK-MVEFP:       @ %bb.0: @ %entry1156; CHECK-MVEFP-NEXT:    vcmp.f16 gt, q0, zr1157; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21158; CHECK-MVEFP-NEXT:    bx lr1159entry:1160  %c = fcmp ugt <8 x half> %src, zeroinitializer1161  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1162  ret <8 x half> %s1163}1164 1165define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {1166; CHECK-MVE-LABEL: vcmp_uge_v8f16:1167; CHECK-MVE:       @ %bb.0: @ %entry1168; CHECK-MVE-NEXT:    vmovx.f16 s12, s01169; CHECK-MVE-NEXT:    vmovx.f16 s14, s81170; CHECK-MVE-NEXT:    vcmp.f16 s12, #01171; CHECK-MVE-NEXT:    vmovx.f16 s12, s41172; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1173; CHECK-MVE-NEXT:    vcmp.f16 s0, #01174; CHECK-MVE-NEXT:    cset r0, pl1175; CHECK-MVE-NEXT:    cmp r0, #01176; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s121177; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1178; CHECK-MVE-NEXT:    cset r0, pl1179; CHECK-MVE-NEXT:    cmp r0, #01180; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s41181; CHECK-MVE-NEXT:    vmovx.f16 s4, s11182; CHECK-MVE-NEXT:    vcmp.f16 s4, #01183; CHECK-MVE-NEXT:    vmovx.f16 s4, s51184; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1185; CHECK-MVE-NEXT:    vmovx.f16 s8, s91186; CHECK-MVE-NEXT:    vcmp.f16 s1, #01187; CHECK-MVE-NEXT:    vins.f16 s0, s121188; CHECK-MVE-NEXT:    cset r0, pl1189; CHECK-MVE-NEXT:    cmp r0, #01190; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41191; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1192; CHECK-MVE-NEXT:    vmovx.f16 s8, s101193; CHECK-MVE-NEXT:    cset r0, pl1194; CHECK-MVE-NEXT:    cmp r0, #01195; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s51196; CHECK-MVE-NEXT:    vins.f16 s1, s41197; CHECK-MVE-NEXT:    vmovx.f16 s4, s21198; CHECK-MVE-NEXT:    vcmp.f16 s4, #01199; CHECK-MVE-NEXT:    vmovx.f16 s4, s61200; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1201; CHECK-MVE-NEXT:    vcmp.f16 s2, #01202; CHECK-MVE-NEXT:    cset r0, pl1203; CHECK-MVE-NEXT:    cmp r0, #01204; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41205; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1206; CHECK-MVE-NEXT:    cset r0, pl1207; CHECK-MVE-NEXT:    cmp r0, #01208; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61209; CHECK-MVE-NEXT:    vmovx.f16 s6, s111210; CHECK-MVE-NEXT:    vins.f16 s2, s41211; CHECK-MVE-NEXT:    vmovx.f16 s4, s31212; CHECK-MVE-NEXT:    vcmp.f16 s4, #01213; CHECK-MVE-NEXT:    vmovx.f16 s4, s71214; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1215; CHECK-MVE-NEXT:    vcmp.f16 s3, #01216; CHECK-MVE-NEXT:    cset r0, pl1217; CHECK-MVE-NEXT:    cmp r0, #01218; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41219; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1220; CHECK-MVE-NEXT:    cset r0, pl1221; CHECK-MVE-NEXT:    cmp r0, #01222; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71223; CHECK-MVE-NEXT:    vins.f16 s3, s41224; CHECK-MVE-NEXT:    bx lr1225;1226; CHECK-MVEFP-LABEL: vcmp_uge_v8f16:1227; CHECK-MVEFP:       @ %bb.0: @ %entry1228; CHECK-MVEFP-NEXT:    vcmp.f16 ge, q0, zr1229; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21230; CHECK-MVEFP-NEXT:    bx lr1231entry:1232  %c = fcmp uge <8 x half> %src, zeroinitializer1233  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1234  ret <8 x half> %s1235}1236 1237define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {1238; CHECK-MVE-LABEL: vcmp_ult_v8f16:1239; CHECK-MVE:       @ %bb.0: @ %entry1240; CHECK-MVE-NEXT:    vmovx.f16 s12, s01241; CHECK-MVE-NEXT:    vmovx.f16 s14, s81242; CHECK-MVE-NEXT:    vcmp.f16 s12, #01243; CHECK-MVE-NEXT:    vmovx.f16 s12, s41244; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1245; CHECK-MVE-NEXT:    vcmp.f16 s0, #01246; CHECK-MVE-NEXT:    cset r0, lt1247; CHECK-MVE-NEXT:    cmp r0, #01248; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s121249; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1250; CHECK-MVE-NEXT:    cset r0, lt1251; CHECK-MVE-NEXT:    cmp r0, #01252; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s41253; CHECK-MVE-NEXT:    vmovx.f16 s4, s11254; CHECK-MVE-NEXT:    vcmp.f16 s4, #01255; CHECK-MVE-NEXT:    vmovx.f16 s4, s51256; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1257; CHECK-MVE-NEXT:    vmovx.f16 s8, s91258; CHECK-MVE-NEXT:    vcmp.f16 s1, #01259; CHECK-MVE-NEXT:    vins.f16 s0, s121260; CHECK-MVE-NEXT:    cset r0, lt1261; CHECK-MVE-NEXT:    cmp r0, #01262; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41263; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1264; CHECK-MVE-NEXT:    vmovx.f16 s8, s101265; CHECK-MVE-NEXT:    cset r0, lt1266; CHECK-MVE-NEXT:    cmp r0, #01267; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s51268; CHECK-MVE-NEXT:    vins.f16 s1, s41269; CHECK-MVE-NEXT:    vmovx.f16 s4, s21270; CHECK-MVE-NEXT:    vcmp.f16 s4, #01271; CHECK-MVE-NEXT:    vmovx.f16 s4, s61272; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1273; CHECK-MVE-NEXT:    vcmp.f16 s2, #01274; CHECK-MVE-NEXT:    cset r0, lt1275; CHECK-MVE-NEXT:    cmp r0, #01276; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41277; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1278; CHECK-MVE-NEXT:    cset r0, lt1279; CHECK-MVE-NEXT:    cmp r0, #01280; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61281; CHECK-MVE-NEXT:    vmovx.f16 s6, s111282; CHECK-MVE-NEXT:    vins.f16 s2, s41283; CHECK-MVE-NEXT:    vmovx.f16 s4, s31284; CHECK-MVE-NEXT:    vcmp.f16 s4, #01285; CHECK-MVE-NEXT:    vmovx.f16 s4, s71286; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1287; CHECK-MVE-NEXT:    vcmp.f16 s3, #01288; CHECK-MVE-NEXT:    cset r0, lt1289; CHECK-MVE-NEXT:    cmp r0, #01290; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41291; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1292; CHECK-MVE-NEXT:    cset r0, lt1293; CHECK-MVE-NEXT:    cmp r0, #01294; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71295; CHECK-MVE-NEXT:    vins.f16 s3, s41296; CHECK-MVE-NEXT:    bx lr1297;1298; CHECK-MVEFP-LABEL: vcmp_ult_v8f16:1299; CHECK-MVEFP:       @ %bb.0: @ %entry1300; CHECK-MVEFP-NEXT:    vcmp.f16 lt, q0, zr1301; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21302; CHECK-MVEFP-NEXT:    bx lr1303entry:1304  %c = fcmp ult <8 x half> %src, zeroinitializer1305  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1306  ret <8 x half> %s1307}1308 1309define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {1310; CHECK-MVE-LABEL: vcmp_ule_v8f16:1311; CHECK-MVE:       @ %bb.0: @ %entry1312; CHECK-MVE-NEXT:    vmovx.f16 s12, s01313; CHECK-MVE-NEXT:    vmovx.f16 s14, s81314; CHECK-MVE-NEXT:    vcmp.f16 s12, #01315; CHECK-MVE-NEXT:    vmovx.f16 s12, s41316; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1317; CHECK-MVE-NEXT:    vcmp.f16 s0, #01318; CHECK-MVE-NEXT:    cset r0, le1319; CHECK-MVE-NEXT:    cmp r0, #01320; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s121321; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1322; CHECK-MVE-NEXT:    cset r0, le1323; CHECK-MVE-NEXT:    cmp r0, #01324; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s41325; CHECK-MVE-NEXT:    vmovx.f16 s4, s11326; CHECK-MVE-NEXT:    vcmp.f16 s4, #01327; CHECK-MVE-NEXT:    vmovx.f16 s4, s51328; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1329; CHECK-MVE-NEXT:    vmovx.f16 s8, s91330; CHECK-MVE-NEXT:    vcmp.f16 s1, #01331; CHECK-MVE-NEXT:    vins.f16 s0, s121332; CHECK-MVE-NEXT:    cset r0, le1333; CHECK-MVE-NEXT:    cmp r0, #01334; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41335; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1336; CHECK-MVE-NEXT:    vmovx.f16 s8, s101337; CHECK-MVE-NEXT:    cset r0, le1338; CHECK-MVE-NEXT:    cmp r0, #01339; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s51340; CHECK-MVE-NEXT:    vins.f16 s1, s41341; CHECK-MVE-NEXT:    vmovx.f16 s4, s21342; CHECK-MVE-NEXT:    vcmp.f16 s4, #01343; CHECK-MVE-NEXT:    vmovx.f16 s4, s61344; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1345; CHECK-MVE-NEXT:    vcmp.f16 s2, #01346; CHECK-MVE-NEXT:    cset r0, le1347; CHECK-MVE-NEXT:    cmp r0, #01348; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41349; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1350; CHECK-MVE-NEXT:    cset r0, le1351; CHECK-MVE-NEXT:    cmp r0, #01352; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61353; CHECK-MVE-NEXT:    vmovx.f16 s6, s111354; CHECK-MVE-NEXT:    vins.f16 s2, s41355; CHECK-MVE-NEXT:    vmovx.f16 s4, s31356; CHECK-MVE-NEXT:    vcmp.f16 s4, #01357; CHECK-MVE-NEXT:    vmovx.f16 s4, s71358; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1359; CHECK-MVE-NEXT:    vcmp.f16 s3, #01360; CHECK-MVE-NEXT:    cset r0, le1361; CHECK-MVE-NEXT:    cmp r0, #01362; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41363; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1364; CHECK-MVE-NEXT:    cset r0, le1365; CHECK-MVE-NEXT:    cmp r0, #01366; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71367; CHECK-MVE-NEXT:    vins.f16 s3, s41368; CHECK-MVE-NEXT:    bx lr1369;1370; CHECK-MVEFP-LABEL: vcmp_ule_v8f16:1371; CHECK-MVEFP:       @ %bb.0: @ %entry1372; CHECK-MVEFP-NEXT:    vcmp.f16 le, q0, zr1373; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21374; CHECK-MVEFP-NEXT:    bx lr1375entry:1376  %c = fcmp ule <8 x half> %src, zeroinitializer1377  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1378  ret <8 x half> %s1379}1380 1381define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {1382; CHECK-MVE-LABEL: vcmp_ord_v8f16:1383; CHECK-MVE:       @ %bb.0: @ %entry1384; CHECK-MVE-NEXT:    vmovx.f16 s12, s01385; CHECK-MVE-NEXT:    vmovx.f16 s14, s81386; CHECK-MVE-NEXT:    vcmp.f16 s12, s121387; CHECK-MVE-NEXT:    vmovx.f16 s12, s41388; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1389; CHECK-MVE-NEXT:    vcmp.f16 s0, s01390; CHECK-MVE-NEXT:    cset r0, vc1391; CHECK-MVE-NEXT:    cmp r0, #01392; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s121393; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1394; CHECK-MVE-NEXT:    cset r0, vc1395; CHECK-MVE-NEXT:    cmp r0, #01396; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s41397; CHECK-MVE-NEXT:    vmovx.f16 s4, s11398; CHECK-MVE-NEXT:    vcmp.f16 s4, s41399; CHECK-MVE-NEXT:    vmovx.f16 s4, s51400; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1401; CHECK-MVE-NEXT:    vmovx.f16 s8, s91402; CHECK-MVE-NEXT:    vcmp.f16 s1, s11403; CHECK-MVE-NEXT:    vins.f16 s0, s121404; CHECK-MVE-NEXT:    cset r0, vc1405; CHECK-MVE-NEXT:    cmp r0, #01406; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41407; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1408; CHECK-MVE-NEXT:    vmovx.f16 s8, s101409; CHECK-MVE-NEXT:    cset r0, vc1410; CHECK-MVE-NEXT:    cmp r0, #01411; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s51412; CHECK-MVE-NEXT:    vins.f16 s1, s41413; CHECK-MVE-NEXT:    vmovx.f16 s4, s21414; CHECK-MVE-NEXT:    vcmp.f16 s4, s41415; CHECK-MVE-NEXT:    vmovx.f16 s4, s61416; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1417; CHECK-MVE-NEXT:    vcmp.f16 s2, s21418; CHECK-MVE-NEXT:    cset r0, vc1419; CHECK-MVE-NEXT:    cmp r0, #01420; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41421; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1422; CHECK-MVE-NEXT:    cset r0, vc1423; CHECK-MVE-NEXT:    cmp r0, #01424; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61425; CHECK-MVE-NEXT:    vmovx.f16 s6, s111426; CHECK-MVE-NEXT:    vins.f16 s2, s41427; CHECK-MVE-NEXT:    vmovx.f16 s4, s31428; CHECK-MVE-NEXT:    vcmp.f16 s4, s41429; CHECK-MVE-NEXT:    vmovx.f16 s4, s71430; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1431; CHECK-MVE-NEXT:    vcmp.f16 s3, s31432; CHECK-MVE-NEXT:    cset r0, vc1433; CHECK-MVE-NEXT:    cmp r0, #01434; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41435; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1436; CHECK-MVE-NEXT:    cset r0, vc1437; CHECK-MVE-NEXT:    cmp r0, #01438; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71439; CHECK-MVE-NEXT:    vins.f16 s3, s41440; CHECK-MVE-NEXT:    bx lr1441;1442; CHECK-MVEFP-LABEL: vcmp_ord_v8f16:1443; CHECK-MVEFP:       @ %bb.0: @ %entry1444; CHECK-MVEFP-NEXT:    vpt.f16 ge, q0, zr1445; CHECK-MVEFP-NEXT:    vcmpt.f16 lt, q0, zr1446; CHECK-MVEFP-NEXT:    vpsel q0, q2, q11447; CHECK-MVEFP-NEXT:    bx lr1448entry:1449  %c = fcmp ord <8 x half> %src, zeroinitializer1450  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1451  ret <8 x half> %s1452}1453 1454define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {1455; CHECK-MVE-LABEL: vcmp_uno_v8f16:1456; CHECK-MVE:       @ %bb.0: @ %entry1457; CHECK-MVE-NEXT:    vmovx.f16 s12, s01458; CHECK-MVE-NEXT:    vmovx.f16 s14, s81459; CHECK-MVE-NEXT:    vcmp.f16 s12, s121460; CHECK-MVE-NEXT:    vmovx.f16 s12, s41461; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1462; CHECK-MVE-NEXT:    vcmp.f16 s0, s01463; CHECK-MVE-NEXT:    cset r0, vs1464; CHECK-MVE-NEXT:    cmp r0, #01465; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s121466; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1467; CHECK-MVE-NEXT:    cset r0, vs1468; CHECK-MVE-NEXT:    cmp r0, #01469; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s41470; CHECK-MVE-NEXT:    vmovx.f16 s4, s11471; CHECK-MVE-NEXT:    vcmp.f16 s4, s41472; CHECK-MVE-NEXT:    vmovx.f16 s4, s51473; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1474; CHECK-MVE-NEXT:    vmovx.f16 s8, s91475; CHECK-MVE-NEXT:    vcmp.f16 s1, s11476; CHECK-MVE-NEXT:    vins.f16 s0, s121477; CHECK-MVE-NEXT:    cset r0, vs1478; CHECK-MVE-NEXT:    cmp r0, #01479; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41480; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1481; CHECK-MVE-NEXT:    vmovx.f16 s8, s101482; CHECK-MVE-NEXT:    cset r0, vs1483; CHECK-MVE-NEXT:    cmp r0, #01484; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s51485; CHECK-MVE-NEXT:    vins.f16 s1, s41486; CHECK-MVE-NEXT:    vmovx.f16 s4, s21487; CHECK-MVE-NEXT:    vcmp.f16 s4, s41488; CHECK-MVE-NEXT:    vmovx.f16 s4, s61489; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1490; CHECK-MVE-NEXT:    vcmp.f16 s2, s21491; CHECK-MVE-NEXT:    cset r0, vs1492; CHECK-MVE-NEXT:    cmp r0, #01493; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s41494; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1495; CHECK-MVE-NEXT:    cset r0, vs1496; CHECK-MVE-NEXT:    cmp r0, #01497; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s61498; CHECK-MVE-NEXT:    vmovx.f16 s6, s111499; CHECK-MVE-NEXT:    vins.f16 s2, s41500; CHECK-MVE-NEXT:    vmovx.f16 s4, s31501; CHECK-MVE-NEXT:    vcmp.f16 s4, s41502; CHECK-MVE-NEXT:    vmovx.f16 s4, s71503; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1504; CHECK-MVE-NEXT:    vcmp.f16 s3, s31505; CHECK-MVE-NEXT:    cset r0, vs1506; CHECK-MVE-NEXT:    cmp r0, #01507; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s41508; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1509; CHECK-MVE-NEXT:    cset r0, vs1510; CHECK-MVE-NEXT:    cmp r0, #01511; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s71512; CHECK-MVE-NEXT:    vins.f16 s3, s41513; CHECK-MVE-NEXT:    bx lr1514;1515; CHECK-MVEFP-LABEL: vcmp_uno_v8f16:1516; CHECK-MVEFP:       @ %bb.0: @ %entry1517; CHECK-MVEFP-NEXT:    vpt.f16 ge, q0, zr1518; CHECK-MVEFP-NEXT:    vcmpt.f16 lt, q0, zr1519; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21520; CHECK-MVEFP-NEXT:    bx lr1521entry:1522  %c = fcmp uno <8 x half> %src, zeroinitializer1523  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b1524  ret <8 x half> %s1525}1526 1527 1528; Reversed1529 1530define arm_aapcs_vfpcc <4 x float> @vcmp_r_oeq_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1531; CHECK-MVE-LABEL: vcmp_r_oeq_v4f32:1532; CHECK-MVE:       @ %bb.0: @ %entry1533; CHECK-MVE-NEXT:    vcmp.f32 s0, #01534; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1535; CHECK-MVE-NEXT:    vcmp.f32 s3, #01536; CHECK-MVE-NEXT:    cset r0, eq1537; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1538; CHECK-MVE-NEXT:    vcmp.f32 s1, #01539; CHECK-MVE-NEXT:    cset r1, eq1540; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1541; CHECK-MVE-NEXT:    vcmp.f32 s2, #01542; CHECK-MVE-NEXT:    cset r2, eq1543; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1544; CHECK-MVE-NEXT:    cset r3, eq1545; CHECK-MVE-NEXT:    cmp r3, #01546; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61547; CHECK-MVE-NEXT:    cmp r2, #01548; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51549; CHECK-MVE-NEXT:    cmp r1, #01550; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71551; CHECK-MVE-NEXT:    cmp r0, #01552; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41553; CHECK-MVE-NEXT:    bx lr1554;1555; CHECK-MVEFP-LABEL: vcmp_r_oeq_v4f32:1556; CHECK-MVEFP:       @ %bb.0: @ %entry1557; CHECK-MVEFP-NEXT:    vcmp.f32 eq, q0, zr1558; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21559; CHECK-MVEFP-NEXT:    bx lr1560entry:1561  %c = fcmp oeq <4 x float> zeroinitializer, %src1562  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1563  ret <4 x float> %s1564}1565 1566define arm_aapcs_vfpcc <4 x float> @vcmp_r_one_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1567; CHECK-MVE-LABEL: vcmp_r_one_v4f32:1568; CHECK-MVE:       @ %bb.0: @ %entry1569; CHECK-MVE-NEXT:    vcmp.f32 s0, #01570; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1571; CHECK-MVE-NEXT:    vcmp.f32 s3, #01572; CHECK-MVE-NEXT:    cset r0, mi1573; CHECK-MVE-NEXT:    csinc r0, r0, zr, le1574; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1575; CHECK-MVE-NEXT:    vcmp.f32 s1, #01576; CHECK-MVE-NEXT:    cset r1, mi1577; CHECK-MVE-NEXT:    csinc r1, r1, zr, le1578; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1579; CHECK-MVE-NEXT:    vcmp.f32 s2, #01580; CHECK-MVE-NEXT:    cset r2, mi1581; CHECK-MVE-NEXT:    csinc r2, r2, zr, le1582; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1583; CHECK-MVE-NEXT:    cset r3, mi1584; CHECK-MVE-NEXT:    csinc r3, r3, zr, le1585; CHECK-MVE-NEXT:    cmp r3, #01586; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61587; CHECK-MVE-NEXT:    cmp r2, #01588; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51589; CHECK-MVE-NEXT:    cmp r1, #01590; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71591; CHECK-MVE-NEXT:    cmp r0, #01592; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41593; CHECK-MVE-NEXT:    bx lr1594;1595; CHECK-MVEFP-LABEL: vcmp_r_one_v4f32:1596; CHECK-MVEFP:       @ %bb.0: @ %entry1597; CHECK-MVEFP-NEXT:    vpt.f32 le, q0, zr1598; CHECK-MVEFP-NEXT:    vcmpt.f32 ge, q0, zr1599; CHECK-MVEFP-NEXT:    vpsel q0, q2, q11600; CHECK-MVEFP-NEXT:    bx lr1601entry:1602  %c = fcmp one <4 x float> zeroinitializer, %src1603  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1604  ret <4 x float> %s1605}1606 1607define arm_aapcs_vfpcc <4 x float> @vcmp_r_ogt_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1608; CHECK-MVE-LABEL: vcmp_r_ogt_v4f32:1609; CHECK-MVE:       @ %bb.0: @ %entry1610; CHECK-MVE-NEXT:    vcmp.f32 s0, #01611; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1612; CHECK-MVE-NEXT:    vcmp.f32 s3, #01613; CHECK-MVE-NEXT:    cset r0, mi1614; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1615; CHECK-MVE-NEXT:    vcmp.f32 s1, #01616; CHECK-MVE-NEXT:    cset r1, mi1617; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1618; CHECK-MVE-NEXT:    vcmp.f32 s2, #01619; CHECK-MVE-NEXT:    cset r2, mi1620; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1621; CHECK-MVE-NEXT:    cset r3, mi1622; CHECK-MVE-NEXT:    cmp r3, #01623; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61624; CHECK-MVE-NEXT:    cmp r2, #01625; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51626; CHECK-MVE-NEXT:    cmp r1, #01627; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71628; CHECK-MVE-NEXT:    cmp r0, #01629; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41630; CHECK-MVE-NEXT:    bx lr1631;1632; CHECK-MVEFP-LABEL: vcmp_r_ogt_v4f32:1633; CHECK-MVEFP:       @ %bb.0: @ %entry1634; CHECK-MVEFP-NEXT:    vcmp.f32 lt, q0, zr1635; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21636; CHECK-MVEFP-NEXT:    bx lr1637entry:1638  %c = fcmp ogt <4 x float> zeroinitializer, %src1639  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1640  ret <4 x float> %s1641}1642 1643define arm_aapcs_vfpcc <4 x float> @vcmp_r_oge_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1644; CHECK-MVE-LABEL: vcmp_r_oge_v4f32:1645; CHECK-MVE:       @ %bb.0: @ %entry1646; CHECK-MVE-NEXT:    vcmp.f32 s0, #01647; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1648; CHECK-MVE-NEXT:    vcmp.f32 s3, #01649; CHECK-MVE-NEXT:    cset r0, ls1650; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1651; CHECK-MVE-NEXT:    vcmp.f32 s1, #01652; CHECK-MVE-NEXT:    cset r1, ls1653; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1654; CHECK-MVE-NEXT:    vcmp.f32 s2, #01655; CHECK-MVE-NEXT:    cset r2, ls1656; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1657; CHECK-MVE-NEXT:    cset r3, ls1658; CHECK-MVE-NEXT:    cmp r3, #01659; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61660; CHECK-MVE-NEXT:    cmp r2, #01661; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51662; CHECK-MVE-NEXT:    cmp r1, #01663; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71664; CHECK-MVE-NEXT:    cmp r0, #01665; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41666; CHECK-MVE-NEXT:    bx lr1667;1668; CHECK-MVEFP-LABEL: vcmp_r_oge_v4f32:1669; CHECK-MVEFP:       @ %bb.0: @ %entry1670; CHECK-MVEFP-NEXT:    vcmp.f32 le, q0, zr1671; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21672; CHECK-MVEFP-NEXT:    bx lr1673entry:1674  %c = fcmp oge <4 x float> zeroinitializer, %src1675  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1676  ret <4 x float> %s1677}1678 1679define arm_aapcs_vfpcc <4 x float> @vcmp_r_olt_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1680; CHECK-MVE-LABEL: vcmp_r_olt_v4f32:1681; CHECK-MVE:       @ %bb.0: @ %entry1682; CHECK-MVE-NEXT:    vcmp.f32 s0, #01683; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1684; CHECK-MVE-NEXT:    vcmp.f32 s3, #01685; CHECK-MVE-NEXT:    cset r0, gt1686; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1687; CHECK-MVE-NEXT:    vcmp.f32 s1, #01688; CHECK-MVE-NEXT:    cset r1, gt1689; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1690; CHECK-MVE-NEXT:    vcmp.f32 s2, #01691; CHECK-MVE-NEXT:    cset r2, gt1692; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1693; CHECK-MVE-NEXT:    cset r3, gt1694; CHECK-MVE-NEXT:    cmp r3, #01695; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61696; CHECK-MVE-NEXT:    cmp r2, #01697; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51698; CHECK-MVE-NEXT:    cmp r1, #01699; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71700; CHECK-MVE-NEXT:    cmp r0, #01701; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41702; CHECK-MVE-NEXT:    bx lr1703;1704; CHECK-MVEFP-LABEL: vcmp_r_olt_v4f32:1705; CHECK-MVEFP:       @ %bb.0: @ %entry1706; CHECK-MVEFP-NEXT:    vcmp.f32 gt, q0, zr1707; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21708; CHECK-MVEFP-NEXT:    bx lr1709entry:1710  %c = fcmp olt <4 x float> zeroinitializer, %src1711  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1712  ret <4 x float> %s1713}1714 1715define arm_aapcs_vfpcc <4 x float> @vcmp_r_ole_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1716; CHECK-MVE-LABEL: vcmp_r_ole_v4f32:1717; CHECK-MVE:       @ %bb.0: @ %entry1718; CHECK-MVE-NEXT:    vcmp.f32 s0, #01719; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1720; CHECK-MVE-NEXT:    vcmp.f32 s3, #01721; CHECK-MVE-NEXT:    cset r0, ge1722; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1723; CHECK-MVE-NEXT:    vcmp.f32 s1, #01724; CHECK-MVE-NEXT:    cset r1, ge1725; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1726; CHECK-MVE-NEXT:    vcmp.f32 s2, #01727; CHECK-MVE-NEXT:    cset r2, ge1728; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1729; CHECK-MVE-NEXT:    cset r3, ge1730; CHECK-MVE-NEXT:    cmp r3, #01731; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61732; CHECK-MVE-NEXT:    cmp r2, #01733; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51734; CHECK-MVE-NEXT:    cmp r1, #01735; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71736; CHECK-MVE-NEXT:    cmp r0, #01737; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41738; CHECK-MVE-NEXT:    bx lr1739;1740; CHECK-MVEFP-LABEL: vcmp_r_ole_v4f32:1741; CHECK-MVEFP:       @ %bb.0: @ %entry1742; CHECK-MVEFP-NEXT:    vcmp.f32 ge, q0, zr1743; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21744; CHECK-MVEFP-NEXT:    bx lr1745entry:1746  %c = fcmp ole <4 x float> zeroinitializer, %src1747  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1748  ret <4 x float> %s1749}1750 1751define arm_aapcs_vfpcc <4 x float> @vcmp_r_ueq_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1752; CHECK-MVE-LABEL: vcmp_r_ueq_v4f32:1753; CHECK-MVE:       @ %bb.0: @ %entry1754; CHECK-MVE-NEXT:    vcmp.f32 s0, #01755; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1756; CHECK-MVE-NEXT:    vcmp.f32 s3, #01757; CHECK-MVE-NEXT:    cset r0, eq1758; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc1759; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1760; CHECK-MVE-NEXT:    vcmp.f32 s1, #01761; CHECK-MVE-NEXT:    cset r1, eq1762; CHECK-MVE-NEXT:    csinc r1, r1, zr, vc1763; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1764; CHECK-MVE-NEXT:    vcmp.f32 s2, #01765; CHECK-MVE-NEXT:    cset r2, eq1766; CHECK-MVE-NEXT:    csinc r2, r2, zr, vc1767; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1768; CHECK-MVE-NEXT:    cset r3, eq1769; CHECK-MVE-NEXT:    csinc r3, r3, zr, vc1770; CHECK-MVE-NEXT:    cmp r3, #01771; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61772; CHECK-MVE-NEXT:    cmp r2, #01773; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51774; CHECK-MVE-NEXT:    cmp r1, #01775; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71776; CHECK-MVE-NEXT:    cmp r0, #01777; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41778; CHECK-MVE-NEXT:    bx lr1779;1780; CHECK-MVEFP-LABEL: vcmp_r_ueq_v4f32:1781; CHECK-MVEFP:       @ %bb.0: @ %entry1782; CHECK-MVEFP-NEXT:    vpt.f32 le, q0, zr1783; CHECK-MVEFP-NEXT:    vcmpt.f32 ge, q0, zr1784; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21785; CHECK-MVEFP-NEXT:    bx lr1786entry:1787  %c = fcmp ueq <4 x float> zeroinitializer, %src1788  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1789  ret <4 x float> %s1790}1791 1792define arm_aapcs_vfpcc <4 x float> @vcmp_r_une_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1793; CHECK-MVE-LABEL: vcmp_r_une_v4f32:1794; CHECK-MVE:       @ %bb.0: @ %entry1795; CHECK-MVE-NEXT:    vcmp.f32 s2, #01796; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1797; CHECK-MVE-NEXT:    vcmp.f32 s1, #01798; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61799; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1800; CHECK-MVE-NEXT:    vcmp.f32 s3, #01801; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51802; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1803; CHECK-MVE-NEXT:    vcmp.f32 s0, #01804; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71805; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1806; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41807; CHECK-MVE-NEXT:    bx lr1808;1809; CHECK-MVEFP-LABEL: vcmp_r_une_v4f32:1810; CHECK-MVEFP:       @ %bb.0: @ %entry1811; CHECK-MVEFP-NEXT:    vcmp.f32 ne, q0, zr1812; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21813; CHECK-MVEFP-NEXT:    bx lr1814entry:1815  %c = fcmp une <4 x float> zeroinitializer, %src1816  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1817  ret <4 x float> %s1818}1819 1820define arm_aapcs_vfpcc <4 x float> @vcmp_r_ugt_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1821; CHECK-MVE-LABEL: vcmp_r_ugt_v4f32:1822; CHECK-MVE:       @ %bb.0: @ %entry1823; CHECK-MVE-NEXT:    vcmp.f32 s0, #01824; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1825; CHECK-MVE-NEXT:    vcmp.f32 s3, #01826; CHECK-MVE-NEXT:    cset r0, lt1827; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1828; CHECK-MVE-NEXT:    vcmp.f32 s1, #01829; CHECK-MVE-NEXT:    cset r1, lt1830; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1831; CHECK-MVE-NEXT:    vcmp.f32 s2, #01832; CHECK-MVE-NEXT:    cset r2, lt1833; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1834; CHECK-MVE-NEXT:    cset r3, lt1835; CHECK-MVE-NEXT:    cmp r3, #01836; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61837; CHECK-MVE-NEXT:    cmp r2, #01838; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51839; CHECK-MVE-NEXT:    cmp r1, #01840; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71841; CHECK-MVE-NEXT:    cmp r0, #01842; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41843; CHECK-MVE-NEXT:    bx lr1844;1845; CHECK-MVEFP-LABEL: vcmp_r_ugt_v4f32:1846; CHECK-MVEFP:       @ %bb.0: @ %entry1847; CHECK-MVEFP-NEXT:    vcmp.f32 lt, q0, zr1848; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21849; CHECK-MVEFP-NEXT:    bx lr1850entry:1851  %c = fcmp ugt <4 x float> zeroinitializer, %src1852  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1853  ret <4 x float> %s1854}1855 1856define arm_aapcs_vfpcc <4 x float> @vcmp_r_uge_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1857; CHECK-MVE-LABEL: vcmp_r_uge_v4f32:1858; CHECK-MVE:       @ %bb.0: @ %entry1859; CHECK-MVE-NEXT:    vcmp.f32 s0, #01860; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1861; CHECK-MVE-NEXT:    vcmp.f32 s3, #01862; CHECK-MVE-NEXT:    cset r0, le1863; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1864; CHECK-MVE-NEXT:    vcmp.f32 s1, #01865; CHECK-MVE-NEXT:    cset r1, le1866; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1867; CHECK-MVE-NEXT:    vcmp.f32 s2, #01868; CHECK-MVE-NEXT:    cset r2, le1869; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1870; CHECK-MVE-NEXT:    cset r3, le1871; CHECK-MVE-NEXT:    cmp r3, #01872; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61873; CHECK-MVE-NEXT:    cmp r2, #01874; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51875; CHECK-MVE-NEXT:    cmp r1, #01876; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71877; CHECK-MVE-NEXT:    cmp r0, #01878; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41879; CHECK-MVE-NEXT:    bx lr1880;1881; CHECK-MVEFP-LABEL: vcmp_r_uge_v4f32:1882; CHECK-MVEFP:       @ %bb.0: @ %entry1883; CHECK-MVEFP-NEXT:    vcmp.f32 le, q0, zr1884; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21885; CHECK-MVEFP-NEXT:    bx lr1886entry:1887  %c = fcmp uge <4 x float> zeroinitializer, %src1888  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1889  ret <4 x float> %s1890}1891 1892define arm_aapcs_vfpcc <4 x float> @vcmp_r_ult_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1893; CHECK-MVE-LABEL: vcmp_r_ult_v4f32:1894; CHECK-MVE:       @ %bb.0: @ %entry1895; CHECK-MVE-NEXT:    vcmp.f32 s0, #01896; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1897; CHECK-MVE-NEXT:    vcmp.f32 s3, #01898; CHECK-MVE-NEXT:    cset r0, hi1899; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1900; CHECK-MVE-NEXT:    vcmp.f32 s1, #01901; CHECK-MVE-NEXT:    cset r1, hi1902; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1903; CHECK-MVE-NEXT:    vcmp.f32 s2, #01904; CHECK-MVE-NEXT:    cset r2, hi1905; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1906; CHECK-MVE-NEXT:    cset r3, hi1907; CHECK-MVE-NEXT:    cmp r3, #01908; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61909; CHECK-MVE-NEXT:    cmp r2, #01910; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51911; CHECK-MVE-NEXT:    cmp r1, #01912; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71913; CHECK-MVE-NEXT:    cmp r0, #01914; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41915; CHECK-MVE-NEXT:    bx lr1916;1917; CHECK-MVEFP-LABEL: vcmp_r_ult_v4f32:1918; CHECK-MVEFP:       @ %bb.0: @ %entry1919; CHECK-MVEFP-NEXT:    vcmp.f32 gt, q0, zr1920; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21921; CHECK-MVEFP-NEXT:    bx lr1922entry:1923  %c = fcmp ult <4 x float> zeroinitializer, %src1924  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1925  ret <4 x float> %s1926}1927 1928define arm_aapcs_vfpcc <4 x float> @vcmp_r_ule_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1929; CHECK-MVE-LABEL: vcmp_r_ule_v4f32:1930; CHECK-MVE:       @ %bb.0: @ %entry1931; CHECK-MVE-NEXT:    vcmp.f32 s0, #01932; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1933; CHECK-MVE-NEXT:    vcmp.f32 s3, #01934; CHECK-MVE-NEXT:    cset r0, pl1935; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1936; CHECK-MVE-NEXT:    vcmp.f32 s1, #01937; CHECK-MVE-NEXT:    cset r1, pl1938; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1939; CHECK-MVE-NEXT:    vcmp.f32 s2, #01940; CHECK-MVE-NEXT:    cset r2, pl1941; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1942; CHECK-MVE-NEXT:    cset r3, pl1943; CHECK-MVE-NEXT:    cmp r3, #01944; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61945; CHECK-MVE-NEXT:    cmp r2, #01946; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51947; CHECK-MVE-NEXT:    cmp r1, #01948; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71949; CHECK-MVE-NEXT:    cmp r0, #01950; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41951; CHECK-MVE-NEXT:    bx lr1952;1953; CHECK-MVEFP-LABEL: vcmp_r_ule_v4f32:1954; CHECK-MVEFP:       @ %bb.0: @ %entry1955; CHECK-MVEFP-NEXT:    vcmp.f32 ge, q0, zr1956; CHECK-MVEFP-NEXT:    vpsel q0, q1, q21957; CHECK-MVEFP-NEXT:    bx lr1958entry:1959  %c = fcmp ule <4 x float> zeroinitializer, %src1960  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1961  ret <4 x float> %s1962}1963 1964define arm_aapcs_vfpcc <4 x float> @vcmp_r_ord_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {1965; CHECK-MVE-LABEL: vcmp_r_ord_v4f32:1966; CHECK-MVE:       @ %bb.0: @ %entry1967; CHECK-MVE-NEXT:    vcmp.f32 s0, s01968; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1969; CHECK-MVE-NEXT:    vcmp.f32 s3, s31970; CHECK-MVE-NEXT:    cset r0, vc1971; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1972; CHECK-MVE-NEXT:    vcmp.f32 s1, s11973; CHECK-MVE-NEXT:    cset r1, vc1974; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1975; CHECK-MVE-NEXT:    vcmp.f32 s2, s21976; CHECK-MVE-NEXT:    cset r2, vc1977; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr1978; CHECK-MVE-NEXT:    cset r3, vc1979; CHECK-MVE-NEXT:    cmp r3, #01980; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s61981; CHECK-MVE-NEXT:    cmp r2, #01982; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s51983; CHECK-MVE-NEXT:    cmp r1, #01984; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s71985; CHECK-MVE-NEXT:    cmp r0, #01986; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s41987; CHECK-MVE-NEXT:    bx lr1988;1989; CHECK-MVEFP-LABEL: vcmp_r_ord_v4f32:1990; CHECK-MVEFP:       @ %bb.0: @ %entry1991; CHECK-MVEFP-NEXT:    vpt.f32 le, q0, zr1992; CHECK-MVEFP-NEXT:    vcmpt.f32 gt, q0, zr1993; CHECK-MVEFP-NEXT:    vpsel q0, q2, q11994; CHECK-MVEFP-NEXT:    bx lr1995entry:1996  %c = fcmp ord <4 x float> zeroinitializer, %src1997  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b1998  ret <4 x float> %s1999}2000 2001define arm_aapcs_vfpcc <4 x float> @vcmp_r_uno_v4f32(<4 x float> %src, <4 x float> %a, <4 x float> %b) {2002; CHECK-MVE-LABEL: vcmp_r_uno_v4f32:2003; CHECK-MVE:       @ %bb.0: @ %entry2004; CHECK-MVE-NEXT:    vcmp.f32 s0, s02005; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2006; CHECK-MVE-NEXT:    vcmp.f32 s3, s32007; CHECK-MVE-NEXT:    cset r0, vs2008; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2009; CHECK-MVE-NEXT:    vcmp.f32 s1, s12010; CHECK-MVE-NEXT:    cset r1, vs2011; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2012; CHECK-MVE-NEXT:    vcmp.f32 s2, s22013; CHECK-MVE-NEXT:    cset r2, vs2014; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2015; CHECK-MVE-NEXT:    cset r3, vs2016; CHECK-MVE-NEXT:    cmp r3, #02017; CHECK-MVE-NEXT:    vseleq.f32 s2, s10, s62018; CHECK-MVE-NEXT:    cmp r2, #02019; CHECK-MVE-NEXT:    vseleq.f32 s1, s9, s52020; CHECK-MVE-NEXT:    cmp r1, #02021; CHECK-MVE-NEXT:    vseleq.f32 s3, s11, s72022; CHECK-MVE-NEXT:    cmp r0, #02023; CHECK-MVE-NEXT:    vseleq.f32 s0, s8, s42024; CHECK-MVE-NEXT:    bx lr2025;2026; CHECK-MVEFP-LABEL: vcmp_r_uno_v4f32:2027; CHECK-MVEFP:       @ %bb.0: @ %entry2028; CHECK-MVEFP-NEXT:    vpt.f32 le, q0, zr2029; CHECK-MVEFP-NEXT:    vcmpt.f32 gt, q0, zr2030; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22031; CHECK-MVEFP-NEXT:    bx lr2032entry:2033  %c = fcmp uno <4 x float> zeroinitializer, %src2034  %s = select <4 x i1> %c, <4 x float> %a, <4 x float> %b2035  ret <4 x float> %s2036}2037 2038 2039 2040define arm_aapcs_vfpcc <8 x half> @vcmp_r_oeq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2041; CHECK-MVE-LABEL: vcmp_r_oeq_v8f16:2042; CHECK-MVE:       @ %bb.0: @ %entry2043; CHECK-MVE-NEXT:    vmovx.f16 s12, s02044; CHECK-MVE-NEXT:    vmovx.f16 s14, s82045; CHECK-MVE-NEXT:    vcmp.f16 s12, #02046; CHECK-MVE-NEXT:    vmovx.f16 s12, s42047; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2048; CHECK-MVE-NEXT:    vcmp.f16 s0, #02049; CHECK-MVE-NEXT:    cset r0, eq2050; CHECK-MVE-NEXT:    cmp r0, #02051; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122052; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2053; CHECK-MVE-NEXT:    cset r0, eq2054; CHECK-MVE-NEXT:    cmp r0, #02055; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42056; CHECK-MVE-NEXT:    vmovx.f16 s4, s12057; CHECK-MVE-NEXT:    vcmp.f16 s4, #02058; CHECK-MVE-NEXT:    vmovx.f16 s4, s52059; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2060; CHECK-MVE-NEXT:    vmovx.f16 s8, s92061; CHECK-MVE-NEXT:    vcmp.f16 s1, #02062; CHECK-MVE-NEXT:    vins.f16 s0, s122063; CHECK-MVE-NEXT:    cset r0, eq2064; CHECK-MVE-NEXT:    cmp r0, #02065; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42066; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2067; CHECK-MVE-NEXT:    vmovx.f16 s8, s102068; CHECK-MVE-NEXT:    cset r0, eq2069; CHECK-MVE-NEXT:    cmp r0, #02070; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52071; CHECK-MVE-NEXT:    vins.f16 s1, s42072; CHECK-MVE-NEXT:    vmovx.f16 s4, s22073; CHECK-MVE-NEXT:    vcmp.f16 s4, #02074; CHECK-MVE-NEXT:    vmovx.f16 s4, s62075; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2076; CHECK-MVE-NEXT:    vcmp.f16 s2, #02077; CHECK-MVE-NEXT:    cset r0, eq2078; CHECK-MVE-NEXT:    cmp r0, #02079; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42080; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2081; CHECK-MVE-NEXT:    cset r0, eq2082; CHECK-MVE-NEXT:    cmp r0, #02083; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62084; CHECK-MVE-NEXT:    vmovx.f16 s6, s112085; CHECK-MVE-NEXT:    vins.f16 s2, s42086; CHECK-MVE-NEXT:    vmovx.f16 s4, s32087; CHECK-MVE-NEXT:    vcmp.f16 s4, #02088; CHECK-MVE-NEXT:    vmovx.f16 s4, s72089; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2090; CHECK-MVE-NEXT:    vcmp.f16 s3, #02091; CHECK-MVE-NEXT:    cset r0, eq2092; CHECK-MVE-NEXT:    cmp r0, #02093; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42094; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2095; CHECK-MVE-NEXT:    cset r0, eq2096; CHECK-MVE-NEXT:    cmp r0, #02097; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72098; CHECK-MVE-NEXT:    vins.f16 s3, s42099; CHECK-MVE-NEXT:    bx lr2100;2101; CHECK-MVEFP-LABEL: vcmp_r_oeq_v8f16:2102; CHECK-MVEFP:       @ %bb.0: @ %entry2103; CHECK-MVEFP-NEXT:    vcmp.f16 eq, q0, zr2104; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22105; CHECK-MVEFP-NEXT:    bx lr2106entry:2107  %c = fcmp oeq <8 x half> zeroinitializer, %src2108  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2109  ret <8 x half> %s2110}2111 2112define arm_aapcs_vfpcc <8 x half> @vcmp_r_one_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2113; CHECK-MVE-LABEL: vcmp_r_one_v8f16:2114; CHECK-MVE:       @ %bb.0: @ %entry2115; CHECK-MVE-NEXT:    vmovx.f16 s12, s02116; CHECK-MVE-NEXT:    vmovx.f16 s14, s82117; CHECK-MVE-NEXT:    vcmp.f16 s12, #02118; CHECK-MVE-NEXT:    vmovx.f16 s12, s42119; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2120; CHECK-MVE-NEXT:    vcmp.f16 s0, #02121; CHECK-MVE-NEXT:    cset r0, mi2122; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2123; CHECK-MVE-NEXT:    cmp r0, #02124; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122125; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2126; CHECK-MVE-NEXT:    cset r0, mi2127; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2128; CHECK-MVE-NEXT:    cmp r0, #02129; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42130; CHECK-MVE-NEXT:    vmovx.f16 s4, s12131; CHECK-MVE-NEXT:    vcmp.f16 s4, #02132; CHECK-MVE-NEXT:    vmovx.f16 s4, s52133; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2134; CHECK-MVE-NEXT:    vmovx.f16 s8, s92135; CHECK-MVE-NEXT:    vcmp.f16 s1, #02136; CHECK-MVE-NEXT:    vins.f16 s0, s122137; CHECK-MVE-NEXT:    cset r0, mi2138; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2139; CHECK-MVE-NEXT:    cmp r0, #02140; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42141; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2142; CHECK-MVE-NEXT:    vmovx.f16 s8, s102143; CHECK-MVE-NEXT:    cset r0, mi2144; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2145; CHECK-MVE-NEXT:    cmp r0, #02146; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52147; CHECK-MVE-NEXT:    vins.f16 s1, s42148; CHECK-MVE-NEXT:    vmovx.f16 s4, s22149; CHECK-MVE-NEXT:    vcmp.f16 s4, #02150; CHECK-MVE-NEXT:    vmovx.f16 s4, s62151; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2152; CHECK-MVE-NEXT:    vcmp.f16 s2, #02153; CHECK-MVE-NEXT:    cset r0, mi2154; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2155; CHECK-MVE-NEXT:    cmp r0, #02156; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42157; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2158; CHECK-MVE-NEXT:    cset r0, mi2159; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2160; CHECK-MVE-NEXT:    cmp r0, #02161; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62162; CHECK-MVE-NEXT:    vmovx.f16 s6, s112163; CHECK-MVE-NEXT:    vins.f16 s2, s42164; CHECK-MVE-NEXT:    vmovx.f16 s4, s32165; CHECK-MVE-NEXT:    vcmp.f16 s4, #02166; CHECK-MVE-NEXT:    vmovx.f16 s4, s72167; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2168; CHECK-MVE-NEXT:    vcmp.f16 s3, #02169; CHECK-MVE-NEXT:    cset r0, mi2170; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2171; CHECK-MVE-NEXT:    cmp r0, #02172; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42173; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2174; CHECK-MVE-NEXT:    cset r0, mi2175; CHECK-MVE-NEXT:    csinc r0, r0, zr, le2176; CHECK-MVE-NEXT:    cmp r0, #02177; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72178; CHECK-MVE-NEXT:    vins.f16 s3, s42179; CHECK-MVE-NEXT:    bx lr2180;2181; CHECK-MVEFP-LABEL: vcmp_r_one_v8f16:2182; CHECK-MVEFP:       @ %bb.0: @ %entry2183; CHECK-MVEFP-NEXT:    vpt.f16 le, q0, zr2184; CHECK-MVEFP-NEXT:    vcmpt.f16 ge, q0, zr2185; CHECK-MVEFP-NEXT:    vpsel q0, q2, q12186; CHECK-MVEFP-NEXT:    bx lr2187entry:2188  %c = fcmp one <8 x half> zeroinitializer, %src2189  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2190  ret <8 x half> %s2191}2192 2193define arm_aapcs_vfpcc <8 x half> @vcmp_r_ogt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2194; CHECK-MVE-LABEL: vcmp_r_ogt_v8f16:2195; CHECK-MVE:       @ %bb.0: @ %entry2196; CHECK-MVE-NEXT:    vmovx.f16 s12, s02197; CHECK-MVE-NEXT:    vmovx.f16 s14, s82198; CHECK-MVE-NEXT:    vcmp.f16 s12, #02199; CHECK-MVE-NEXT:    vmovx.f16 s12, s42200; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2201; CHECK-MVE-NEXT:    vcmp.f16 s0, #02202; CHECK-MVE-NEXT:    cset r0, mi2203; CHECK-MVE-NEXT:    cmp r0, #02204; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122205; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2206; CHECK-MVE-NEXT:    cset r0, mi2207; CHECK-MVE-NEXT:    cmp r0, #02208; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42209; CHECK-MVE-NEXT:    vmovx.f16 s4, s12210; CHECK-MVE-NEXT:    vcmp.f16 s4, #02211; CHECK-MVE-NEXT:    vmovx.f16 s4, s52212; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2213; CHECK-MVE-NEXT:    vmovx.f16 s8, s92214; CHECK-MVE-NEXT:    vcmp.f16 s1, #02215; CHECK-MVE-NEXT:    vins.f16 s0, s122216; CHECK-MVE-NEXT:    cset r0, mi2217; CHECK-MVE-NEXT:    cmp r0, #02218; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42219; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2220; CHECK-MVE-NEXT:    vmovx.f16 s8, s102221; CHECK-MVE-NEXT:    cset r0, mi2222; CHECK-MVE-NEXT:    cmp r0, #02223; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52224; CHECK-MVE-NEXT:    vins.f16 s1, s42225; CHECK-MVE-NEXT:    vmovx.f16 s4, s22226; CHECK-MVE-NEXT:    vcmp.f16 s4, #02227; CHECK-MVE-NEXT:    vmovx.f16 s4, s62228; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2229; CHECK-MVE-NEXT:    vcmp.f16 s2, #02230; CHECK-MVE-NEXT:    cset r0, mi2231; CHECK-MVE-NEXT:    cmp r0, #02232; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42233; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2234; CHECK-MVE-NEXT:    cset r0, mi2235; CHECK-MVE-NEXT:    cmp r0, #02236; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62237; CHECK-MVE-NEXT:    vmovx.f16 s6, s112238; CHECK-MVE-NEXT:    vins.f16 s2, s42239; CHECK-MVE-NEXT:    vmovx.f16 s4, s32240; CHECK-MVE-NEXT:    vcmp.f16 s4, #02241; CHECK-MVE-NEXT:    vmovx.f16 s4, s72242; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2243; CHECK-MVE-NEXT:    vcmp.f16 s3, #02244; CHECK-MVE-NEXT:    cset r0, mi2245; CHECK-MVE-NEXT:    cmp r0, #02246; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42247; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2248; CHECK-MVE-NEXT:    cset r0, mi2249; CHECK-MVE-NEXT:    cmp r0, #02250; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72251; CHECK-MVE-NEXT:    vins.f16 s3, s42252; CHECK-MVE-NEXT:    bx lr2253;2254; CHECK-MVEFP-LABEL: vcmp_r_ogt_v8f16:2255; CHECK-MVEFP:       @ %bb.0: @ %entry2256; CHECK-MVEFP-NEXT:    vcmp.f16 lt, q0, zr2257; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22258; CHECK-MVEFP-NEXT:    bx lr2259entry:2260  %c = fcmp ogt <8 x half> zeroinitializer, %src2261  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2262  ret <8 x half> %s2263}2264 2265define arm_aapcs_vfpcc <8 x half> @vcmp_r_oge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2266; CHECK-MVE-LABEL: vcmp_r_oge_v8f16:2267; CHECK-MVE:       @ %bb.0: @ %entry2268; CHECK-MVE-NEXT:    vmovx.f16 s12, s02269; CHECK-MVE-NEXT:    vmovx.f16 s14, s82270; CHECK-MVE-NEXT:    vcmp.f16 s12, #02271; CHECK-MVE-NEXT:    vmovx.f16 s12, s42272; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2273; CHECK-MVE-NEXT:    vcmp.f16 s0, #02274; CHECK-MVE-NEXT:    cset r0, ls2275; CHECK-MVE-NEXT:    cmp r0, #02276; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122277; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2278; CHECK-MVE-NEXT:    cset r0, ls2279; CHECK-MVE-NEXT:    cmp r0, #02280; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42281; CHECK-MVE-NEXT:    vmovx.f16 s4, s12282; CHECK-MVE-NEXT:    vcmp.f16 s4, #02283; CHECK-MVE-NEXT:    vmovx.f16 s4, s52284; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2285; CHECK-MVE-NEXT:    vmovx.f16 s8, s92286; CHECK-MVE-NEXT:    vcmp.f16 s1, #02287; CHECK-MVE-NEXT:    vins.f16 s0, s122288; CHECK-MVE-NEXT:    cset r0, ls2289; CHECK-MVE-NEXT:    cmp r0, #02290; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42291; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2292; CHECK-MVE-NEXT:    vmovx.f16 s8, s102293; CHECK-MVE-NEXT:    cset r0, ls2294; CHECK-MVE-NEXT:    cmp r0, #02295; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52296; CHECK-MVE-NEXT:    vins.f16 s1, s42297; CHECK-MVE-NEXT:    vmovx.f16 s4, s22298; CHECK-MVE-NEXT:    vcmp.f16 s4, #02299; CHECK-MVE-NEXT:    vmovx.f16 s4, s62300; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2301; CHECK-MVE-NEXT:    vcmp.f16 s2, #02302; CHECK-MVE-NEXT:    cset r0, ls2303; CHECK-MVE-NEXT:    cmp r0, #02304; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42305; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2306; CHECK-MVE-NEXT:    cset r0, ls2307; CHECK-MVE-NEXT:    cmp r0, #02308; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62309; CHECK-MVE-NEXT:    vmovx.f16 s6, s112310; CHECK-MVE-NEXT:    vins.f16 s2, s42311; CHECK-MVE-NEXT:    vmovx.f16 s4, s32312; CHECK-MVE-NEXT:    vcmp.f16 s4, #02313; CHECK-MVE-NEXT:    vmovx.f16 s4, s72314; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2315; CHECK-MVE-NEXT:    vcmp.f16 s3, #02316; CHECK-MVE-NEXT:    cset r0, ls2317; CHECK-MVE-NEXT:    cmp r0, #02318; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42319; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2320; CHECK-MVE-NEXT:    cset r0, ls2321; CHECK-MVE-NEXT:    cmp r0, #02322; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72323; CHECK-MVE-NEXT:    vins.f16 s3, s42324; CHECK-MVE-NEXT:    bx lr2325;2326; CHECK-MVEFP-LABEL: vcmp_r_oge_v8f16:2327; CHECK-MVEFP:       @ %bb.0: @ %entry2328; CHECK-MVEFP-NEXT:    vcmp.f16 le, q0, zr2329; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22330; CHECK-MVEFP-NEXT:    bx lr2331entry:2332  %c = fcmp oge <8 x half> zeroinitializer, %src2333  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2334  ret <8 x half> %s2335}2336 2337define arm_aapcs_vfpcc <8 x half> @vcmp_r_olt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2338; CHECK-MVE-LABEL: vcmp_r_olt_v8f16:2339; CHECK-MVE:       @ %bb.0: @ %entry2340; CHECK-MVE-NEXT:    vmovx.f16 s12, s02341; CHECK-MVE-NEXT:    vmovx.f16 s14, s82342; CHECK-MVE-NEXT:    vcmp.f16 s12, #02343; CHECK-MVE-NEXT:    vmovx.f16 s12, s42344; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2345; CHECK-MVE-NEXT:    vcmp.f16 s0, #02346; CHECK-MVE-NEXT:    cset r0, gt2347; CHECK-MVE-NEXT:    cmp r0, #02348; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122349; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2350; CHECK-MVE-NEXT:    cset r0, gt2351; CHECK-MVE-NEXT:    cmp r0, #02352; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42353; CHECK-MVE-NEXT:    vmovx.f16 s4, s12354; CHECK-MVE-NEXT:    vcmp.f16 s4, #02355; CHECK-MVE-NEXT:    vmovx.f16 s4, s52356; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2357; CHECK-MVE-NEXT:    vmovx.f16 s8, s92358; CHECK-MVE-NEXT:    vcmp.f16 s1, #02359; CHECK-MVE-NEXT:    vins.f16 s0, s122360; CHECK-MVE-NEXT:    cset r0, gt2361; CHECK-MVE-NEXT:    cmp r0, #02362; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42363; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2364; CHECK-MVE-NEXT:    vmovx.f16 s8, s102365; CHECK-MVE-NEXT:    cset r0, gt2366; CHECK-MVE-NEXT:    cmp r0, #02367; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52368; CHECK-MVE-NEXT:    vins.f16 s1, s42369; CHECK-MVE-NEXT:    vmovx.f16 s4, s22370; CHECK-MVE-NEXT:    vcmp.f16 s4, #02371; CHECK-MVE-NEXT:    vmovx.f16 s4, s62372; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2373; CHECK-MVE-NEXT:    vcmp.f16 s2, #02374; CHECK-MVE-NEXT:    cset r0, gt2375; CHECK-MVE-NEXT:    cmp r0, #02376; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42377; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2378; CHECK-MVE-NEXT:    cset r0, gt2379; CHECK-MVE-NEXT:    cmp r0, #02380; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62381; CHECK-MVE-NEXT:    vmovx.f16 s6, s112382; CHECK-MVE-NEXT:    vins.f16 s2, s42383; CHECK-MVE-NEXT:    vmovx.f16 s4, s32384; CHECK-MVE-NEXT:    vcmp.f16 s4, #02385; CHECK-MVE-NEXT:    vmovx.f16 s4, s72386; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2387; CHECK-MVE-NEXT:    vcmp.f16 s3, #02388; CHECK-MVE-NEXT:    cset r0, gt2389; CHECK-MVE-NEXT:    cmp r0, #02390; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42391; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2392; CHECK-MVE-NEXT:    cset r0, gt2393; CHECK-MVE-NEXT:    cmp r0, #02394; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72395; CHECK-MVE-NEXT:    vins.f16 s3, s42396; CHECK-MVE-NEXT:    bx lr2397;2398; CHECK-MVEFP-LABEL: vcmp_r_olt_v8f16:2399; CHECK-MVEFP:       @ %bb.0: @ %entry2400; CHECK-MVEFP-NEXT:    vcmp.f16 gt, q0, zr2401; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22402; CHECK-MVEFP-NEXT:    bx lr2403entry:2404  %c = fcmp olt <8 x half> zeroinitializer, %src2405  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2406  ret <8 x half> %s2407}2408 2409define arm_aapcs_vfpcc <8 x half> @vcmp_r_ole_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2410; CHECK-MVE-LABEL: vcmp_r_ole_v8f16:2411; CHECK-MVE:       @ %bb.0: @ %entry2412; CHECK-MVE-NEXT:    vmovx.f16 s12, s02413; CHECK-MVE-NEXT:    vmovx.f16 s14, s82414; CHECK-MVE-NEXT:    vcmp.f16 s12, #02415; CHECK-MVE-NEXT:    vmovx.f16 s12, s42416; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2417; CHECK-MVE-NEXT:    vcmp.f16 s0, #02418; CHECK-MVE-NEXT:    cset r0, ge2419; CHECK-MVE-NEXT:    cmp r0, #02420; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122421; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2422; CHECK-MVE-NEXT:    cset r0, ge2423; CHECK-MVE-NEXT:    cmp r0, #02424; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42425; CHECK-MVE-NEXT:    vmovx.f16 s4, s12426; CHECK-MVE-NEXT:    vcmp.f16 s4, #02427; CHECK-MVE-NEXT:    vmovx.f16 s4, s52428; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2429; CHECK-MVE-NEXT:    vmovx.f16 s8, s92430; CHECK-MVE-NEXT:    vcmp.f16 s1, #02431; CHECK-MVE-NEXT:    vins.f16 s0, s122432; CHECK-MVE-NEXT:    cset r0, ge2433; CHECK-MVE-NEXT:    cmp r0, #02434; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42435; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2436; CHECK-MVE-NEXT:    vmovx.f16 s8, s102437; CHECK-MVE-NEXT:    cset r0, ge2438; CHECK-MVE-NEXT:    cmp r0, #02439; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52440; CHECK-MVE-NEXT:    vins.f16 s1, s42441; CHECK-MVE-NEXT:    vmovx.f16 s4, s22442; CHECK-MVE-NEXT:    vcmp.f16 s4, #02443; CHECK-MVE-NEXT:    vmovx.f16 s4, s62444; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2445; CHECK-MVE-NEXT:    vcmp.f16 s2, #02446; CHECK-MVE-NEXT:    cset r0, ge2447; CHECK-MVE-NEXT:    cmp r0, #02448; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42449; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2450; CHECK-MVE-NEXT:    cset r0, ge2451; CHECK-MVE-NEXT:    cmp r0, #02452; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62453; CHECK-MVE-NEXT:    vmovx.f16 s6, s112454; CHECK-MVE-NEXT:    vins.f16 s2, s42455; CHECK-MVE-NEXT:    vmovx.f16 s4, s32456; CHECK-MVE-NEXT:    vcmp.f16 s4, #02457; CHECK-MVE-NEXT:    vmovx.f16 s4, s72458; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2459; CHECK-MVE-NEXT:    vcmp.f16 s3, #02460; CHECK-MVE-NEXT:    cset r0, ge2461; CHECK-MVE-NEXT:    cmp r0, #02462; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42463; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2464; CHECK-MVE-NEXT:    cset r0, ge2465; CHECK-MVE-NEXT:    cmp r0, #02466; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72467; CHECK-MVE-NEXT:    vins.f16 s3, s42468; CHECK-MVE-NEXT:    bx lr2469;2470; CHECK-MVEFP-LABEL: vcmp_r_ole_v8f16:2471; CHECK-MVEFP:       @ %bb.0: @ %entry2472; CHECK-MVEFP-NEXT:    vcmp.f16 ge, q0, zr2473; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22474; CHECK-MVEFP-NEXT:    bx lr2475entry:2476  %c = fcmp ole <8 x half> zeroinitializer, %src2477  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2478  ret <8 x half> %s2479}2480 2481define arm_aapcs_vfpcc <8 x half> @vcmp_r_ueq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2482; CHECK-MVE-LABEL: vcmp_r_ueq_v8f16:2483; CHECK-MVE:       @ %bb.0: @ %entry2484; CHECK-MVE-NEXT:    vmovx.f16 s12, s02485; CHECK-MVE-NEXT:    vmovx.f16 s14, s82486; CHECK-MVE-NEXT:    vcmp.f16 s12, #02487; CHECK-MVE-NEXT:    vmovx.f16 s12, s42488; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2489; CHECK-MVE-NEXT:    vcmp.f16 s0, #02490; CHECK-MVE-NEXT:    cset r0, eq2491; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2492; CHECK-MVE-NEXT:    cmp r0, #02493; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122494; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2495; CHECK-MVE-NEXT:    cset r0, eq2496; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2497; CHECK-MVE-NEXT:    cmp r0, #02498; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42499; CHECK-MVE-NEXT:    vmovx.f16 s4, s12500; CHECK-MVE-NEXT:    vcmp.f16 s4, #02501; CHECK-MVE-NEXT:    vmovx.f16 s4, s52502; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2503; CHECK-MVE-NEXT:    vmovx.f16 s8, s92504; CHECK-MVE-NEXT:    vcmp.f16 s1, #02505; CHECK-MVE-NEXT:    vins.f16 s0, s122506; CHECK-MVE-NEXT:    cset r0, eq2507; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2508; CHECK-MVE-NEXT:    cmp r0, #02509; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42510; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2511; CHECK-MVE-NEXT:    vmovx.f16 s8, s102512; CHECK-MVE-NEXT:    cset r0, eq2513; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2514; CHECK-MVE-NEXT:    cmp r0, #02515; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52516; CHECK-MVE-NEXT:    vins.f16 s1, s42517; CHECK-MVE-NEXT:    vmovx.f16 s4, s22518; CHECK-MVE-NEXT:    vcmp.f16 s4, #02519; CHECK-MVE-NEXT:    vmovx.f16 s4, s62520; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2521; CHECK-MVE-NEXT:    vcmp.f16 s2, #02522; CHECK-MVE-NEXT:    cset r0, eq2523; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2524; CHECK-MVE-NEXT:    cmp r0, #02525; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42526; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2527; CHECK-MVE-NEXT:    cset r0, eq2528; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2529; CHECK-MVE-NEXT:    cmp r0, #02530; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62531; CHECK-MVE-NEXT:    vmovx.f16 s6, s112532; CHECK-MVE-NEXT:    vins.f16 s2, s42533; CHECK-MVE-NEXT:    vmovx.f16 s4, s32534; CHECK-MVE-NEXT:    vcmp.f16 s4, #02535; CHECK-MVE-NEXT:    vmovx.f16 s4, s72536; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2537; CHECK-MVE-NEXT:    vcmp.f16 s3, #02538; CHECK-MVE-NEXT:    cset r0, eq2539; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2540; CHECK-MVE-NEXT:    cmp r0, #02541; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42542; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2543; CHECK-MVE-NEXT:    cset r0, eq2544; CHECK-MVE-NEXT:    csinc r0, r0, zr, vc2545; CHECK-MVE-NEXT:    cmp r0, #02546; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72547; CHECK-MVE-NEXT:    vins.f16 s3, s42548; CHECK-MVE-NEXT:    bx lr2549;2550; CHECK-MVEFP-LABEL: vcmp_r_ueq_v8f16:2551; CHECK-MVEFP:       @ %bb.0: @ %entry2552; CHECK-MVEFP-NEXT:    vpt.f16 le, q0, zr2553; CHECK-MVEFP-NEXT:    vcmpt.f16 ge, q0, zr2554; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22555; CHECK-MVEFP-NEXT:    bx lr2556entry:2557  %c = fcmp ueq <8 x half> zeroinitializer, %src2558  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2559  ret <8 x half> %s2560}2561 2562define arm_aapcs_vfpcc <8 x half> @vcmp_r_une_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2563; CHECK-MVE-LABEL: vcmp_r_une_v8f16:2564; CHECK-MVE:       @ %bb.0: @ %entry2565; CHECK-MVE-NEXT:    vmovx.f16 s12, s02566; CHECK-MVE-NEXT:    vmovx.f16 s14, s82567; CHECK-MVE-NEXT:    vcmp.f16 s12, #02568; CHECK-MVE-NEXT:    vmovx.f16 s12, s42569; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2570; CHECK-MVE-NEXT:    vcmp.f16 s0, #02571; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122572; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2573; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42574; CHECK-MVE-NEXT:    vmovx.f16 s4, s12575; CHECK-MVE-NEXT:    vcmp.f16 s4, #02576; CHECK-MVE-NEXT:    vmovx.f16 s4, s52577; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2578; CHECK-MVE-NEXT:    vmovx.f16 s8, s92579; CHECK-MVE-NEXT:    vcmp.f16 s1, #02580; CHECK-MVE-NEXT:    vins.f16 s0, s122581; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42582; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2583; CHECK-MVE-NEXT:    vmovx.f16 s8, s102584; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52585; CHECK-MVE-NEXT:    vins.f16 s1, s42586; CHECK-MVE-NEXT:    vmovx.f16 s4, s22587; CHECK-MVE-NEXT:    vcmp.f16 s4, #02588; CHECK-MVE-NEXT:    vmovx.f16 s4, s62589; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2590; CHECK-MVE-NEXT:    vcmp.f16 s2, #02591; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42592; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2593; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62594; CHECK-MVE-NEXT:    vmovx.f16 s6, s112595; CHECK-MVE-NEXT:    vins.f16 s2, s42596; CHECK-MVE-NEXT:    vmovx.f16 s4, s32597; CHECK-MVE-NEXT:    vcmp.f16 s4, #02598; CHECK-MVE-NEXT:    vmovx.f16 s4, s72599; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2600; CHECK-MVE-NEXT:    vcmp.f16 s3, #02601; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42602; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2603; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72604; CHECK-MVE-NEXT:    vins.f16 s3, s42605; CHECK-MVE-NEXT:    bx lr2606;2607; CHECK-MVEFP-LABEL: vcmp_r_une_v8f16:2608; CHECK-MVEFP:       @ %bb.0: @ %entry2609; CHECK-MVEFP-NEXT:    vcmp.f16 ne, q0, zr2610; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22611; CHECK-MVEFP-NEXT:    bx lr2612entry:2613  %c = fcmp une <8 x half> zeroinitializer, %src2614  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2615  ret <8 x half> %s2616}2617 2618define arm_aapcs_vfpcc <8 x half> @vcmp_r_ugt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2619; CHECK-MVE-LABEL: vcmp_r_ugt_v8f16:2620; CHECK-MVE:       @ %bb.0: @ %entry2621; CHECK-MVE-NEXT:    vmovx.f16 s12, s02622; CHECK-MVE-NEXT:    vmovx.f16 s14, s82623; CHECK-MVE-NEXT:    vcmp.f16 s12, #02624; CHECK-MVE-NEXT:    vmovx.f16 s12, s42625; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2626; CHECK-MVE-NEXT:    vcmp.f16 s0, #02627; CHECK-MVE-NEXT:    cset r0, lt2628; CHECK-MVE-NEXT:    cmp r0, #02629; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122630; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2631; CHECK-MVE-NEXT:    cset r0, lt2632; CHECK-MVE-NEXT:    cmp r0, #02633; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42634; CHECK-MVE-NEXT:    vmovx.f16 s4, s12635; CHECK-MVE-NEXT:    vcmp.f16 s4, #02636; CHECK-MVE-NEXT:    vmovx.f16 s4, s52637; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2638; CHECK-MVE-NEXT:    vmovx.f16 s8, s92639; CHECK-MVE-NEXT:    vcmp.f16 s1, #02640; CHECK-MVE-NEXT:    vins.f16 s0, s122641; CHECK-MVE-NEXT:    cset r0, lt2642; CHECK-MVE-NEXT:    cmp r0, #02643; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42644; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2645; CHECK-MVE-NEXT:    vmovx.f16 s8, s102646; CHECK-MVE-NEXT:    cset r0, lt2647; CHECK-MVE-NEXT:    cmp r0, #02648; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52649; CHECK-MVE-NEXT:    vins.f16 s1, s42650; CHECK-MVE-NEXT:    vmovx.f16 s4, s22651; CHECK-MVE-NEXT:    vcmp.f16 s4, #02652; CHECK-MVE-NEXT:    vmovx.f16 s4, s62653; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2654; CHECK-MVE-NEXT:    vcmp.f16 s2, #02655; CHECK-MVE-NEXT:    cset r0, lt2656; CHECK-MVE-NEXT:    cmp r0, #02657; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42658; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2659; CHECK-MVE-NEXT:    cset r0, lt2660; CHECK-MVE-NEXT:    cmp r0, #02661; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62662; CHECK-MVE-NEXT:    vmovx.f16 s6, s112663; CHECK-MVE-NEXT:    vins.f16 s2, s42664; CHECK-MVE-NEXT:    vmovx.f16 s4, s32665; CHECK-MVE-NEXT:    vcmp.f16 s4, #02666; CHECK-MVE-NEXT:    vmovx.f16 s4, s72667; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2668; CHECK-MVE-NEXT:    vcmp.f16 s3, #02669; CHECK-MVE-NEXT:    cset r0, lt2670; CHECK-MVE-NEXT:    cmp r0, #02671; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42672; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2673; CHECK-MVE-NEXT:    cset r0, lt2674; CHECK-MVE-NEXT:    cmp r0, #02675; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72676; CHECK-MVE-NEXT:    vins.f16 s3, s42677; CHECK-MVE-NEXT:    bx lr2678;2679; CHECK-MVEFP-LABEL: vcmp_r_ugt_v8f16:2680; CHECK-MVEFP:       @ %bb.0: @ %entry2681; CHECK-MVEFP-NEXT:    vcmp.f16 lt, q0, zr2682; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22683; CHECK-MVEFP-NEXT:    bx lr2684entry:2685  %c = fcmp ugt <8 x half> zeroinitializer, %src2686  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2687  ret <8 x half> %s2688}2689 2690define arm_aapcs_vfpcc <8 x half> @vcmp_r_uge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2691; CHECK-MVE-LABEL: vcmp_r_uge_v8f16:2692; CHECK-MVE:       @ %bb.0: @ %entry2693; CHECK-MVE-NEXT:    vmovx.f16 s12, s02694; CHECK-MVE-NEXT:    vmovx.f16 s14, s82695; CHECK-MVE-NEXT:    vcmp.f16 s12, #02696; CHECK-MVE-NEXT:    vmovx.f16 s12, s42697; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2698; CHECK-MVE-NEXT:    vcmp.f16 s0, #02699; CHECK-MVE-NEXT:    cset r0, le2700; CHECK-MVE-NEXT:    cmp r0, #02701; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122702; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2703; CHECK-MVE-NEXT:    cset r0, le2704; CHECK-MVE-NEXT:    cmp r0, #02705; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42706; CHECK-MVE-NEXT:    vmovx.f16 s4, s12707; CHECK-MVE-NEXT:    vcmp.f16 s4, #02708; CHECK-MVE-NEXT:    vmovx.f16 s4, s52709; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2710; CHECK-MVE-NEXT:    vmovx.f16 s8, s92711; CHECK-MVE-NEXT:    vcmp.f16 s1, #02712; CHECK-MVE-NEXT:    vins.f16 s0, s122713; CHECK-MVE-NEXT:    cset r0, le2714; CHECK-MVE-NEXT:    cmp r0, #02715; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42716; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2717; CHECK-MVE-NEXT:    vmovx.f16 s8, s102718; CHECK-MVE-NEXT:    cset r0, le2719; CHECK-MVE-NEXT:    cmp r0, #02720; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52721; CHECK-MVE-NEXT:    vins.f16 s1, s42722; CHECK-MVE-NEXT:    vmovx.f16 s4, s22723; CHECK-MVE-NEXT:    vcmp.f16 s4, #02724; CHECK-MVE-NEXT:    vmovx.f16 s4, s62725; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2726; CHECK-MVE-NEXT:    vcmp.f16 s2, #02727; CHECK-MVE-NEXT:    cset r0, le2728; CHECK-MVE-NEXT:    cmp r0, #02729; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42730; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2731; CHECK-MVE-NEXT:    cset r0, le2732; CHECK-MVE-NEXT:    cmp r0, #02733; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62734; CHECK-MVE-NEXT:    vmovx.f16 s6, s112735; CHECK-MVE-NEXT:    vins.f16 s2, s42736; CHECK-MVE-NEXT:    vmovx.f16 s4, s32737; CHECK-MVE-NEXT:    vcmp.f16 s4, #02738; CHECK-MVE-NEXT:    vmovx.f16 s4, s72739; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2740; CHECK-MVE-NEXT:    vcmp.f16 s3, #02741; CHECK-MVE-NEXT:    cset r0, le2742; CHECK-MVE-NEXT:    cmp r0, #02743; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42744; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2745; CHECK-MVE-NEXT:    cset r0, le2746; CHECK-MVE-NEXT:    cmp r0, #02747; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72748; CHECK-MVE-NEXT:    vins.f16 s3, s42749; CHECK-MVE-NEXT:    bx lr2750;2751; CHECK-MVEFP-LABEL: vcmp_r_uge_v8f16:2752; CHECK-MVEFP:       @ %bb.0: @ %entry2753; CHECK-MVEFP-NEXT:    vcmp.f16 le, q0, zr2754; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22755; CHECK-MVEFP-NEXT:    bx lr2756entry:2757  %c = fcmp uge <8 x half> zeroinitializer, %src2758  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2759  ret <8 x half> %s2760}2761 2762define arm_aapcs_vfpcc <8 x half> @vcmp_r_ult_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2763; CHECK-MVE-LABEL: vcmp_r_ult_v8f16:2764; CHECK-MVE:       @ %bb.0: @ %entry2765; CHECK-MVE-NEXT:    vmovx.f16 s12, s02766; CHECK-MVE-NEXT:    vmovx.f16 s14, s82767; CHECK-MVE-NEXT:    vcmp.f16 s12, #02768; CHECK-MVE-NEXT:    vmovx.f16 s12, s42769; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2770; CHECK-MVE-NEXT:    vcmp.f16 s0, #02771; CHECK-MVE-NEXT:    cset r0, hi2772; CHECK-MVE-NEXT:    cmp r0, #02773; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122774; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2775; CHECK-MVE-NEXT:    cset r0, hi2776; CHECK-MVE-NEXT:    cmp r0, #02777; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42778; CHECK-MVE-NEXT:    vmovx.f16 s4, s12779; CHECK-MVE-NEXT:    vcmp.f16 s4, #02780; CHECK-MVE-NEXT:    vmovx.f16 s4, s52781; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2782; CHECK-MVE-NEXT:    vmovx.f16 s8, s92783; CHECK-MVE-NEXT:    vcmp.f16 s1, #02784; CHECK-MVE-NEXT:    vins.f16 s0, s122785; CHECK-MVE-NEXT:    cset r0, hi2786; CHECK-MVE-NEXT:    cmp r0, #02787; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42788; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2789; CHECK-MVE-NEXT:    vmovx.f16 s8, s102790; CHECK-MVE-NEXT:    cset r0, hi2791; CHECK-MVE-NEXT:    cmp r0, #02792; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52793; CHECK-MVE-NEXT:    vins.f16 s1, s42794; CHECK-MVE-NEXT:    vmovx.f16 s4, s22795; CHECK-MVE-NEXT:    vcmp.f16 s4, #02796; CHECK-MVE-NEXT:    vmovx.f16 s4, s62797; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2798; CHECK-MVE-NEXT:    vcmp.f16 s2, #02799; CHECK-MVE-NEXT:    cset r0, hi2800; CHECK-MVE-NEXT:    cmp r0, #02801; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42802; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2803; CHECK-MVE-NEXT:    cset r0, hi2804; CHECK-MVE-NEXT:    cmp r0, #02805; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62806; CHECK-MVE-NEXT:    vmovx.f16 s6, s112807; CHECK-MVE-NEXT:    vins.f16 s2, s42808; CHECK-MVE-NEXT:    vmovx.f16 s4, s32809; CHECK-MVE-NEXT:    vcmp.f16 s4, #02810; CHECK-MVE-NEXT:    vmovx.f16 s4, s72811; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2812; CHECK-MVE-NEXT:    vcmp.f16 s3, #02813; CHECK-MVE-NEXT:    cset r0, hi2814; CHECK-MVE-NEXT:    cmp r0, #02815; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42816; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2817; CHECK-MVE-NEXT:    cset r0, hi2818; CHECK-MVE-NEXT:    cmp r0, #02819; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72820; CHECK-MVE-NEXT:    vins.f16 s3, s42821; CHECK-MVE-NEXT:    bx lr2822;2823; CHECK-MVEFP-LABEL: vcmp_r_ult_v8f16:2824; CHECK-MVEFP:       @ %bb.0: @ %entry2825; CHECK-MVEFP-NEXT:    vcmp.f16 gt, q0, zr2826; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22827; CHECK-MVEFP-NEXT:    bx lr2828entry:2829  %c = fcmp ult <8 x half> zeroinitializer, %src2830  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2831  ret <8 x half> %s2832}2833 2834define arm_aapcs_vfpcc <8 x half> @vcmp_r_ule_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2835; CHECK-MVE-LABEL: vcmp_r_ule_v8f16:2836; CHECK-MVE:       @ %bb.0: @ %entry2837; CHECK-MVE-NEXT:    vmovx.f16 s12, s02838; CHECK-MVE-NEXT:    vmovx.f16 s14, s82839; CHECK-MVE-NEXT:    vcmp.f16 s12, #02840; CHECK-MVE-NEXT:    vmovx.f16 s12, s42841; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2842; CHECK-MVE-NEXT:    vcmp.f16 s0, #02843; CHECK-MVE-NEXT:    cset r0, pl2844; CHECK-MVE-NEXT:    cmp r0, #02845; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122846; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2847; CHECK-MVE-NEXT:    cset r0, pl2848; CHECK-MVE-NEXT:    cmp r0, #02849; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42850; CHECK-MVE-NEXT:    vmovx.f16 s4, s12851; CHECK-MVE-NEXT:    vcmp.f16 s4, #02852; CHECK-MVE-NEXT:    vmovx.f16 s4, s52853; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2854; CHECK-MVE-NEXT:    vmovx.f16 s8, s92855; CHECK-MVE-NEXT:    vcmp.f16 s1, #02856; CHECK-MVE-NEXT:    vins.f16 s0, s122857; CHECK-MVE-NEXT:    cset r0, pl2858; CHECK-MVE-NEXT:    cmp r0, #02859; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42860; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2861; CHECK-MVE-NEXT:    vmovx.f16 s8, s102862; CHECK-MVE-NEXT:    cset r0, pl2863; CHECK-MVE-NEXT:    cmp r0, #02864; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52865; CHECK-MVE-NEXT:    vins.f16 s1, s42866; CHECK-MVE-NEXT:    vmovx.f16 s4, s22867; CHECK-MVE-NEXT:    vcmp.f16 s4, #02868; CHECK-MVE-NEXT:    vmovx.f16 s4, s62869; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2870; CHECK-MVE-NEXT:    vcmp.f16 s2, #02871; CHECK-MVE-NEXT:    cset r0, pl2872; CHECK-MVE-NEXT:    cmp r0, #02873; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42874; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2875; CHECK-MVE-NEXT:    cset r0, pl2876; CHECK-MVE-NEXT:    cmp r0, #02877; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62878; CHECK-MVE-NEXT:    vmovx.f16 s6, s112879; CHECK-MVE-NEXT:    vins.f16 s2, s42880; CHECK-MVE-NEXT:    vmovx.f16 s4, s32881; CHECK-MVE-NEXT:    vcmp.f16 s4, #02882; CHECK-MVE-NEXT:    vmovx.f16 s4, s72883; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2884; CHECK-MVE-NEXT:    vcmp.f16 s3, #02885; CHECK-MVE-NEXT:    cset r0, pl2886; CHECK-MVE-NEXT:    cmp r0, #02887; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42888; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2889; CHECK-MVE-NEXT:    cset r0, pl2890; CHECK-MVE-NEXT:    cmp r0, #02891; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72892; CHECK-MVE-NEXT:    vins.f16 s3, s42893; CHECK-MVE-NEXT:    bx lr2894;2895; CHECK-MVEFP-LABEL: vcmp_r_ule_v8f16:2896; CHECK-MVEFP:       @ %bb.0: @ %entry2897; CHECK-MVEFP-NEXT:    vcmp.f16 ge, q0, zr2898; CHECK-MVEFP-NEXT:    vpsel q0, q1, q22899; CHECK-MVEFP-NEXT:    bx lr2900entry:2901  %c = fcmp ule <8 x half> zeroinitializer, %src2902  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2903  ret <8 x half> %s2904}2905 2906define arm_aapcs_vfpcc <8 x half> @vcmp_r_ord_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2907; CHECK-MVE-LABEL: vcmp_r_ord_v8f16:2908; CHECK-MVE:       @ %bb.0: @ %entry2909; CHECK-MVE-NEXT:    vmovx.f16 s12, s02910; CHECK-MVE-NEXT:    vmovx.f16 s14, s82911; CHECK-MVE-NEXT:    vcmp.f16 s12, s122912; CHECK-MVE-NEXT:    vmovx.f16 s12, s42913; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2914; CHECK-MVE-NEXT:    vcmp.f16 s0, s02915; CHECK-MVE-NEXT:    cset r0, vc2916; CHECK-MVE-NEXT:    cmp r0, #02917; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122918; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2919; CHECK-MVE-NEXT:    cset r0, vc2920; CHECK-MVE-NEXT:    cmp r0, #02921; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42922; CHECK-MVE-NEXT:    vmovx.f16 s4, s12923; CHECK-MVE-NEXT:    vcmp.f16 s4, s42924; CHECK-MVE-NEXT:    vmovx.f16 s4, s52925; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2926; CHECK-MVE-NEXT:    vmovx.f16 s8, s92927; CHECK-MVE-NEXT:    vcmp.f16 s1, s12928; CHECK-MVE-NEXT:    vins.f16 s0, s122929; CHECK-MVE-NEXT:    cset r0, vc2930; CHECK-MVE-NEXT:    cmp r0, #02931; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42932; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2933; CHECK-MVE-NEXT:    vmovx.f16 s8, s102934; CHECK-MVE-NEXT:    cset r0, vc2935; CHECK-MVE-NEXT:    cmp r0, #02936; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s52937; CHECK-MVE-NEXT:    vins.f16 s1, s42938; CHECK-MVE-NEXT:    vmovx.f16 s4, s22939; CHECK-MVE-NEXT:    vcmp.f16 s4, s42940; CHECK-MVE-NEXT:    vmovx.f16 s4, s62941; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2942; CHECK-MVE-NEXT:    vcmp.f16 s2, s22943; CHECK-MVE-NEXT:    cset r0, vc2944; CHECK-MVE-NEXT:    cmp r0, #02945; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s42946; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2947; CHECK-MVE-NEXT:    cset r0, vc2948; CHECK-MVE-NEXT:    cmp r0, #02949; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s62950; CHECK-MVE-NEXT:    vmovx.f16 s6, s112951; CHECK-MVE-NEXT:    vins.f16 s2, s42952; CHECK-MVE-NEXT:    vmovx.f16 s4, s32953; CHECK-MVE-NEXT:    vcmp.f16 s4, s42954; CHECK-MVE-NEXT:    vmovx.f16 s4, s72955; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2956; CHECK-MVE-NEXT:    vcmp.f16 s3, s32957; CHECK-MVE-NEXT:    cset r0, vc2958; CHECK-MVE-NEXT:    cmp r0, #02959; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s42960; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2961; CHECK-MVE-NEXT:    cset r0, vc2962; CHECK-MVE-NEXT:    cmp r0, #02963; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s72964; CHECK-MVE-NEXT:    vins.f16 s3, s42965; CHECK-MVE-NEXT:    bx lr2966;2967; CHECK-MVEFP-LABEL: vcmp_r_ord_v8f16:2968; CHECK-MVEFP:       @ %bb.0: @ %entry2969; CHECK-MVEFP-NEXT:    vpt.f16 le, q0, zr2970; CHECK-MVEFP-NEXT:    vcmpt.f16 gt, q0, zr2971; CHECK-MVEFP-NEXT:    vpsel q0, q2, q12972; CHECK-MVEFP-NEXT:    bx lr2973entry:2974  %c = fcmp ord <8 x half> zeroinitializer, %src2975  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b2976  ret <8 x half> %s2977}2978 2979define arm_aapcs_vfpcc <8 x half> @vcmp_r_uno_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {2980; CHECK-MVE-LABEL: vcmp_r_uno_v8f16:2981; CHECK-MVE:       @ %bb.0: @ %entry2982; CHECK-MVE-NEXT:    vmovx.f16 s12, s02983; CHECK-MVE-NEXT:    vmovx.f16 s14, s82984; CHECK-MVE-NEXT:    vcmp.f16 s12, s122985; CHECK-MVE-NEXT:    vmovx.f16 s12, s42986; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2987; CHECK-MVE-NEXT:    vcmp.f16 s0, s02988; CHECK-MVE-NEXT:    cset r0, vs2989; CHECK-MVE-NEXT:    cmp r0, #02990; CHECK-MVE-NEXT:    vseleq.f16 s12, s14, s122991; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2992; CHECK-MVE-NEXT:    cset r0, vs2993; CHECK-MVE-NEXT:    cmp r0, #02994; CHECK-MVE-NEXT:    vseleq.f16 s0, s8, s42995; CHECK-MVE-NEXT:    vmovx.f16 s4, s12996; CHECK-MVE-NEXT:    vcmp.f16 s4, s42997; CHECK-MVE-NEXT:    vmovx.f16 s4, s52998; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr2999; CHECK-MVE-NEXT:    vmovx.f16 s8, s93000; CHECK-MVE-NEXT:    vcmp.f16 s1, s13001; CHECK-MVE-NEXT:    vins.f16 s0, s123002; CHECK-MVE-NEXT:    cset r0, vs3003; CHECK-MVE-NEXT:    cmp r0, #03004; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s43005; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr3006; CHECK-MVE-NEXT:    vmovx.f16 s8, s103007; CHECK-MVE-NEXT:    cset r0, vs3008; CHECK-MVE-NEXT:    cmp r0, #03009; CHECK-MVE-NEXT:    vseleq.f16 s1, s9, s53010; CHECK-MVE-NEXT:    vins.f16 s1, s43011; CHECK-MVE-NEXT:    vmovx.f16 s4, s23012; CHECK-MVE-NEXT:    vcmp.f16 s4, s43013; CHECK-MVE-NEXT:    vmovx.f16 s4, s63014; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr3015; CHECK-MVE-NEXT:    vcmp.f16 s2, s23016; CHECK-MVE-NEXT:    cset r0, vs3017; CHECK-MVE-NEXT:    cmp r0, #03018; CHECK-MVE-NEXT:    vseleq.f16 s4, s8, s43019; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr3020; CHECK-MVE-NEXT:    cset r0, vs3021; CHECK-MVE-NEXT:    cmp r0, #03022; CHECK-MVE-NEXT:    vseleq.f16 s2, s10, s63023; CHECK-MVE-NEXT:    vmovx.f16 s6, s113024; CHECK-MVE-NEXT:    vins.f16 s2, s43025; CHECK-MVE-NEXT:    vmovx.f16 s4, s33026; CHECK-MVE-NEXT:    vcmp.f16 s4, s43027; CHECK-MVE-NEXT:    vmovx.f16 s4, s73028; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr3029; CHECK-MVE-NEXT:    vcmp.f16 s3, s33030; CHECK-MVE-NEXT:    cset r0, vs3031; CHECK-MVE-NEXT:    cmp r0, #03032; CHECK-MVE-NEXT:    vseleq.f16 s4, s6, s43033; CHECK-MVE-NEXT:    vmrs APSR_nzcv, fpscr3034; CHECK-MVE-NEXT:    cset r0, vs3035; CHECK-MVE-NEXT:    cmp r0, #03036; CHECK-MVE-NEXT:    vseleq.f16 s3, s11, s73037; CHECK-MVE-NEXT:    vins.f16 s3, s43038; CHECK-MVE-NEXT:    bx lr3039;3040; CHECK-MVEFP-LABEL: vcmp_r_uno_v8f16:3041; CHECK-MVEFP:       @ %bb.0: @ %entry3042; CHECK-MVEFP-NEXT:    vpt.f16 le, q0, zr3043; CHECK-MVEFP-NEXT:    vcmpt.f16 gt, q0, zr3044; CHECK-MVEFP-NEXT:    vpsel q0, q1, q23045; CHECK-MVEFP-NEXT:    bx lr3046entry:3047  %c = fcmp uno <8 x half> zeroinitializer, %src3048  %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b3049  ret <8 x half> %s3050}3051