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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVE3; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVEFP4 5define arm_aapcs_vfpcc <4 x float> @foo_float_int32(<4 x i32> %src) {6; CHECK-MVE-LABEL: foo_float_int32:7; CHECK-MVE: @ %bb.0: @ %entry8; CHECK-MVE-NEXT: vcvt.f32.s32 s3, s39; CHECK-MVE-NEXT: vcvt.f32.s32 s2, s210; CHECK-MVE-NEXT: vcvt.f32.s32 s1, s111; CHECK-MVE-NEXT: vcvt.f32.s32 s0, s012; CHECK-MVE-NEXT: bx lr13;14; CHECK-MVEFP-LABEL: foo_float_int32:15; CHECK-MVEFP: @ %bb.0: @ %entry16; CHECK-MVEFP-NEXT: vcvt.f32.s32 q0, q017; CHECK-MVEFP-NEXT: bx lr18entry:19 %out = sitofp <4 x i32> %src to <4 x float>20 ret <4 x float> %out21}22 23define arm_aapcs_vfpcc <4 x float> @foo_float_uint32(<4 x i32> %src) {24; CHECK-MVE-LABEL: foo_float_uint32:25; CHECK-MVE: @ %bb.0: @ %entry26; CHECK-MVE-NEXT: vcvt.f32.u32 s3, s327; CHECK-MVE-NEXT: vcvt.f32.u32 s2, s228; CHECK-MVE-NEXT: vcvt.f32.u32 s1, s129; CHECK-MVE-NEXT: vcvt.f32.u32 s0, s030; CHECK-MVE-NEXT: bx lr31;32; CHECK-MVEFP-LABEL: foo_float_uint32:33; CHECK-MVEFP: @ %bb.0: @ %entry34; CHECK-MVEFP-NEXT: vcvt.f32.u32 q0, q035; CHECK-MVEFP-NEXT: bx lr36entry:37 %out = uitofp <4 x i32> %src to <4 x float>38 ret <4 x float> %out39}40 41define arm_aapcs_vfpcc <4 x i32> @foo_int32_float(<4 x float> %src) {42; CHECK-MVE-LABEL: foo_int32_float:43; CHECK-MVE: @ %bb.0: @ %entry44; CHECK-MVE-NEXT: vcvt.s32.f32 s2, s245; CHECK-MVE-NEXT: vcvt.s32.f32 s0, s046; CHECK-MVE-NEXT: vcvt.s32.f32 s4, s347; CHECK-MVE-NEXT: vcvt.s32.f32 s6, s148; CHECK-MVE-NEXT: vmov r0, s249; CHECK-MVE-NEXT: vmov r1, s050; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r051; CHECK-MVE-NEXT: vmov r0, s452; CHECK-MVE-NEXT: vmov r1, s653; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r054; CHECK-MVE-NEXT: bx lr55;56; CHECK-MVEFP-LABEL: foo_int32_float:57; CHECK-MVEFP: @ %bb.0: @ %entry58; CHECK-MVEFP-NEXT: vcvt.s32.f32 q0, q059; CHECK-MVEFP-NEXT: bx lr60entry:61 %out = fptosi <4 x float> %src to <4 x i32>62 ret <4 x i32> %out63}64 65define arm_aapcs_vfpcc <4 x i32> @foo_uint32_float(<4 x float> %src) {66; CHECK-MVE-LABEL: foo_uint32_float:67; CHECK-MVE: @ %bb.0: @ %entry68; CHECK-MVE-NEXT: vcvt.u32.f32 s2, s269; CHECK-MVE-NEXT: vcvt.u32.f32 s0, s070; CHECK-MVE-NEXT: vcvt.u32.f32 s4, s371; CHECK-MVE-NEXT: vcvt.u32.f32 s6, s172; CHECK-MVE-NEXT: vmov r0, s273; CHECK-MVE-NEXT: vmov r1, s074; CHECK-MVE-NEXT: vmov q0[2], q0[0], r1, r075; CHECK-MVE-NEXT: vmov r0, s476; CHECK-MVE-NEXT: vmov r1, s677; CHECK-MVE-NEXT: vmov q0[3], q0[1], r1, r078; CHECK-MVE-NEXT: bx lr79;80; CHECK-MVEFP-LABEL: foo_uint32_float:81; CHECK-MVEFP: @ %bb.0: @ %entry82; CHECK-MVEFP-NEXT: vcvt.u32.f32 q0, q083; CHECK-MVEFP-NEXT: bx lr84entry:85 %out = fptoui <4 x float> %src to <4 x i32>86 ret <4 x i32> %out87}88 89define arm_aapcs_vfpcc <8 x half> @foo_half_int16(<8 x i16> %src) {90; CHECK-MVE-LABEL: foo_half_int16:91; CHECK-MVE: @ %bb.0: @ %entry92; CHECK-MVE-NEXT: vmov q1, q093; CHECK-MVE-NEXT: vmov.s16 r0, q0[0]94; CHECK-MVE-NEXT: vmov s0, r095; CHECK-MVE-NEXT: vmov.s16 r0, q1[1]96; CHECK-MVE-NEXT: vmov s2, r097; CHECK-MVE-NEXT: vcvt.f16.s32 s0, s098; CHECK-MVE-NEXT: vcvt.f16.s32 s2, s299; CHECK-MVE-NEXT: vmov.s16 r0, q1[3]100; CHECK-MVE-NEXT: vins.f16 s0, s2101; CHECK-MVE-NEXT: vmov s2, r0102; CHECK-MVE-NEXT: vmov.s16 r0, q1[2]103; CHECK-MVE-NEXT: vcvt.f16.s32 s2, s2104; CHECK-MVE-NEXT: vmov s8, r0105; CHECK-MVE-NEXT: vmov.s16 r0, q1[4]106; CHECK-MVE-NEXT: vcvt.f16.s32 s1, s8107; CHECK-MVE-NEXT: vins.f16 s1, s2108; CHECK-MVE-NEXT: vmov s2, r0109; CHECK-MVE-NEXT: vmov.s16 r0, q1[5]110; CHECK-MVE-NEXT: vcvt.f16.s32 s2, s2111; CHECK-MVE-NEXT: vmov s8, r0112; CHECK-MVE-NEXT: vmov.s16 r0, q1[7]113; CHECK-MVE-NEXT: vcvt.f16.s32 s8, s8114; CHECK-MVE-NEXT: vins.f16 s2, s8115; CHECK-MVE-NEXT: vmov s8, r0116; CHECK-MVE-NEXT: vmov.s16 r0, q1[6]117; CHECK-MVE-NEXT: vcvt.f16.s32 s8, s8118; CHECK-MVE-NEXT: vmov s4, r0119; CHECK-MVE-NEXT: vcvt.f16.s32 s3, s4120; CHECK-MVE-NEXT: vins.f16 s3, s8121; CHECK-MVE-NEXT: bx lr122;123; CHECK-MVEFP-LABEL: foo_half_int16:124; CHECK-MVEFP: @ %bb.0: @ %entry125; CHECK-MVEFP-NEXT: vcvt.f16.s16 q0, q0126; CHECK-MVEFP-NEXT: bx lr127entry:128 %out = sitofp <8 x i16> %src to <8 x half>129 ret <8 x half> %out130}131 132define arm_aapcs_vfpcc <8 x half> @foo_half_uint16(<8 x i16> %src) {133; CHECK-MVE-LABEL: foo_half_uint16:134; CHECK-MVE: @ %bb.0: @ %entry135; CHECK-MVE-NEXT: vmov q1, q0136; CHECK-MVE-NEXT: vmov.u16 r0, q0[0]137; CHECK-MVE-NEXT: vmov s0, r0138; CHECK-MVE-NEXT: vmov.u16 r0, q1[1]139; CHECK-MVE-NEXT: vmov s2, r0140; CHECK-MVE-NEXT: vcvt.f16.u32 s0, s0141; CHECK-MVE-NEXT: vcvt.f16.u32 s2, s2142; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]143; CHECK-MVE-NEXT: vins.f16 s0, s2144; CHECK-MVE-NEXT: vmov s2, r0145; CHECK-MVE-NEXT: vmov.u16 r0, q1[2]146; CHECK-MVE-NEXT: vcvt.f16.u32 s2, s2147; CHECK-MVE-NEXT: vmov s8, r0148; CHECK-MVE-NEXT: vmov.u16 r0, q1[4]149; CHECK-MVE-NEXT: vcvt.f16.u32 s1, s8150; CHECK-MVE-NEXT: vins.f16 s1, s2151; CHECK-MVE-NEXT: vmov s2, r0152; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]153; CHECK-MVE-NEXT: vcvt.f16.u32 s2, s2154; CHECK-MVE-NEXT: vmov s8, r0155; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]156; CHECK-MVE-NEXT: vcvt.f16.u32 s8, s8157; CHECK-MVE-NEXT: vins.f16 s2, s8158; CHECK-MVE-NEXT: vmov s8, r0159; CHECK-MVE-NEXT: vmov.u16 r0, q1[6]160; CHECK-MVE-NEXT: vcvt.f16.u32 s8, s8161; CHECK-MVE-NEXT: vmov s4, r0162; CHECK-MVE-NEXT: vcvt.f16.u32 s3, s4163; CHECK-MVE-NEXT: vins.f16 s3, s8164; CHECK-MVE-NEXT: bx lr165;166; CHECK-MVEFP-LABEL: foo_half_uint16:167; CHECK-MVEFP: @ %bb.0: @ %entry168; CHECK-MVEFP-NEXT: vcvt.f16.u16 q0, q0169; CHECK-MVEFP-NEXT: bx lr170entry:171 %out = uitofp <8 x i16> %src to <8 x half>172 ret <8 x half> %out173}174 175define arm_aapcs_vfpcc <8 x i16> @foo_int16_half(<8 x half> %src) {176; CHECK-MVE-LABEL: foo_int16_half:177; CHECK-MVE: @ %bb.0: @ %entry178; CHECK-MVE-NEXT: vmovx.f16 s6, s2179; CHECK-MVE-NEXT: vcvt.s32.f16 s12, s2180; CHECK-MVE-NEXT: vmovx.f16 s2, s0181; CHECK-MVE-NEXT: vcvt.s32.f16 s0, s0182; CHECK-MVE-NEXT: vcvt.s32.f16 s14, s2183; CHECK-MVE-NEXT: vmov r0, s0184; CHECK-MVE-NEXT: vmovx.f16 s4, s3185; CHECK-MVE-NEXT: vmovx.f16 s10, s1186; CHECK-MVE-NEXT: vcvt.s32.f16 s8, s3187; CHECK-MVE-NEXT: vcvt.s32.f16 s5, s1188; CHECK-MVE-NEXT: vmov.16 q0[0], r0189; CHECK-MVE-NEXT: vmov r0, s14190; CHECK-MVE-NEXT: vmov.16 q0[1], r0191; CHECK-MVE-NEXT: vmov r0, s5192; CHECK-MVE-NEXT: vcvt.s32.f16 s10, s10193; CHECK-MVE-NEXT: vmov.16 q0[2], r0194; CHECK-MVE-NEXT: vmov r0, s10195; CHECK-MVE-NEXT: vcvt.s32.f16 s6, s6196; CHECK-MVE-NEXT: vmov.16 q0[3], r0197; CHECK-MVE-NEXT: vmov r0, s12198; CHECK-MVE-NEXT: vmov.16 q0[4], r0199; CHECK-MVE-NEXT: vmov r0, s6200; CHECK-MVE-NEXT: vmov.16 q0[5], r0201; CHECK-MVE-NEXT: vmov r0, s8202; CHECK-MVE-NEXT: vcvt.s32.f16 s4, s4203; CHECK-MVE-NEXT: vmov.16 q0[6], r0204; CHECK-MVE-NEXT: vmov r0, s4205; CHECK-MVE-NEXT: vmov.16 q0[7], r0206; CHECK-MVE-NEXT: bx lr207;208; CHECK-MVEFP-LABEL: foo_int16_half:209; CHECK-MVEFP: @ %bb.0: @ %entry210; CHECK-MVEFP-NEXT: vcvt.s16.f16 q0, q0211; CHECK-MVEFP-NEXT: bx lr212entry:213 %out = fptosi <8 x half> %src to <8 x i16>214 ret <8 x i16> %out215}216 217define arm_aapcs_vfpcc <8 x i16> @foo_uint16_half(<8 x half> %src) {218; CHECK-MVE-LABEL: foo_uint16_half:219; CHECK-MVE: @ %bb.0: @ %entry220; CHECK-MVE-NEXT: vmovx.f16 s6, s2221; CHECK-MVE-NEXT: vcvt.s32.f16 s12, s2222; CHECK-MVE-NEXT: vmovx.f16 s2, s0223; CHECK-MVE-NEXT: vcvt.s32.f16 s0, s0224; CHECK-MVE-NEXT: vcvt.s32.f16 s14, s2225; CHECK-MVE-NEXT: vmov r0, s0226; CHECK-MVE-NEXT: vmovx.f16 s4, s3227; CHECK-MVE-NEXT: vmovx.f16 s10, s1228; CHECK-MVE-NEXT: vcvt.s32.f16 s8, s3229; CHECK-MVE-NEXT: vcvt.s32.f16 s5, s1230; CHECK-MVE-NEXT: vmov.16 q0[0], r0231; CHECK-MVE-NEXT: vmov r0, s14232; CHECK-MVE-NEXT: vmov.16 q0[1], r0233; CHECK-MVE-NEXT: vmov r0, s5234; CHECK-MVE-NEXT: vcvt.s32.f16 s10, s10235; CHECK-MVE-NEXT: vmov.16 q0[2], r0236; CHECK-MVE-NEXT: vmov r0, s10237; CHECK-MVE-NEXT: vcvt.s32.f16 s6, s6238; CHECK-MVE-NEXT: vmov.16 q0[3], r0239; CHECK-MVE-NEXT: vmov r0, s12240; CHECK-MVE-NEXT: vmov.16 q0[4], r0241; CHECK-MVE-NEXT: vmov r0, s6242; CHECK-MVE-NEXT: vmov.16 q0[5], r0243; CHECK-MVE-NEXT: vmov r0, s8244; CHECK-MVE-NEXT: vcvt.s32.f16 s4, s4245; CHECK-MVE-NEXT: vmov.16 q0[6], r0246; CHECK-MVE-NEXT: vmov r0, s4247; CHECK-MVE-NEXT: vmov.16 q0[7], r0248; CHECK-MVE-NEXT: bx lr249;250; CHECK-MVEFP-LABEL: foo_uint16_half:251; CHECK-MVEFP: @ %bb.0: @ %entry252; CHECK-MVEFP-NEXT: vcvt.u16.f16 q0, q0253; CHECK-MVEFP-NEXT: bx lr254entry:255 %out = fptoui <8 x half> %src to <8 x i16>256 ret <8 x i16> %out257}258 259define arm_aapcs_vfpcc <2 x double> @foo_float_int64(<2 x i64> %src) {260; CHECK-LABEL: foo_float_int64:261; CHECK: @ %bb.0: @ %entry262; CHECK-NEXT: .save {r7, lr}263; CHECK-NEXT: push {r7, lr}264; CHECK-NEXT: .vsave {d8, d9}265; CHECK-NEXT: vpush {d8, d9}266; CHECK-NEXT: vmov q4, q0267; CHECK-NEXT: vmov r0, r1, d9268; CHECK-NEXT: bl __aeabi_l2d269; CHECK-NEXT: vmov r2, r3, d8270; CHECK-NEXT: vmov d9, r0, r1271; CHECK-NEXT: mov r0, r2272; CHECK-NEXT: mov r1, r3273; CHECK-NEXT: bl __aeabi_l2d274; CHECK-NEXT: vmov d8, r0, r1275; CHECK-NEXT: vmov q0, q4276; CHECK-NEXT: vpop {d8, d9}277; CHECK-NEXT: pop {r7, pc}278entry:279 %out = sitofp <2 x i64> %src to <2 x double>280 ret <2 x double> %out281}282 283define arm_aapcs_vfpcc <2 x double> @foo_float_uint64(<2 x i64> %src) {284; CHECK-LABEL: foo_float_uint64:285; CHECK: @ %bb.0: @ %entry286; CHECK-NEXT: .save {r7, lr}287; CHECK-NEXT: push {r7, lr}288; CHECK-NEXT: .vsave {d8, d9}289; CHECK-NEXT: vpush {d8, d9}290; CHECK-NEXT: vmov q4, q0291; CHECK-NEXT: vmov r0, r1, d9292; CHECK-NEXT: bl __aeabi_ul2d293; CHECK-NEXT: vmov r2, r3, d8294; CHECK-NEXT: vmov d9, r0, r1295; CHECK-NEXT: mov r0, r2296; CHECK-NEXT: mov r1, r3297; CHECK-NEXT: bl __aeabi_ul2d298; CHECK-NEXT: vmov d8, r0, r1299; CHECK-NEXT: vmov q0, q4300; CHECK-NEXT: vpop {d8, d9}301; CHECK-NEXT: pop {r7, pc}302entry:303 %out = uitofp <2 x i64> %src to <2 x double>304 ret <2 x double> %out305}306 307define arm_aapcs_vfpcc <2 x i64> @foo_int64_float(<2 x double> %src) {308; CHECK-LABEL: foo_int64_float:309; CHECK: @ %bb.0: @ %entry310; CHECK-NEXT: .save {r4, r5, r7, lr}311; CHECK-NEXT: push {r4, r5, r7, lr}312; CHECK-NEXT: .vsave {d8, d9}313; CHECK-NEXT: vpush {d8, d9}314; CHECK-NEXT: vmov q4, q0315; CHECK-NEXT: vmov r0, r1, d9316; CHECK-NEXT: bl __aeabi_d2lz317; CHECK-NEXT: mov r4, r0318; CHECK-NEXT: mov r5, r1319; CHECK-NEXT: vmov r0, r1, d8320; CHECK-NEXT: bl __aeabi_d2lz321; CHECK-NEXT: vmov q0[2], q0[0], r0, r4322; CHECK-NEXT: vmov q0[3], q0[1], r1, r5323; CHECK-NEXT: vpop {d8, d9}324; CHECK-NEXT: pop {r4, r5, r7, pc}325entry:326 %out = fptosi <2 x double> %src to <2 x i64>327 ret <2 x i64> %out328}329 330define arm_aapcs_vfpcc <2 x i64> @foo_uint64_float(<2 x double> %src) {331; CHECK-LABEL: foo_uint64_float:332; CHECK: @ %bb.0: @ %entry333; CHECK-NEXT: .save {r4, r5, r7, lr}334; CHECK-NEXT: push {r4, r5, r7, lr}335; CHECK-NEXT: .vsave {d8, d9}336; CHECK-NEXT: vpush {d8, d9}337; CHECK-NEXT: vmov q4, q0338; CHECK-NEXT: vmov r0, r1, d9339; CHECK-NEXT: bl __aeabi_d2ulz340; CHECK-NEXT: mov r4, r0341; CHECK-NEXT: mov r5, r1342; CHECK-NEXT: vmov r0, r1, d8343; CHECK-NEXT: bl __aeabi_d2ulz344; CHECK-NEXT: vmov q0[2], q0[0], r0, r4345; CHECK-NEXT: vmov q0[3], q0[1], r1, r5346; CHECK-NEXT: vpop {d8, d9}347; CHECK-NEXT: pop {r4, r5, r7, pc}348entry:349 %out = fptoui <2 x double> %src to <2 x i64>350 ret <2 x i64> %out351}352 353define arm_aapcs_vfpcc <8 x half> @vmovn32_trunc1(<4 x float> %src1, <4 x float> %src2) {354; CHECK-MVE-LABEL: vmovn32_trunc1:355; CHECK-MVE: @ %bb.0: @ %entry356; CHECK-MVE-NEXT: vcvtb.f16.f32 s0, s0357; CHECK-MVE-NEXT: vcvtb.f16.f32 s1, s1358; CHECK-MVE-NEXT: vcvtb.f16.f32 s2, s2359; CHECK-MVE-NEXT: vcvtb.f16.f32 s3, s3360; CHECK-MVE-NEXT: vcvtt.f16.f32 s0, s4361; CHECK-MVE-NEXT: vcvtt.f16.f32 s1, s5362; CHECK-MVE-NEXT: vcvtt.f16.f32 s2, s6363; CHECK-MVE-NEXT: vcvtt.f16.f32 s3, s7364; CHECK-MVE-NEXT: bx lr365;366; CHECK-MVEFP-LABEL: vmovn32_trunc1:367; CHECK-MVEFP: @ %bb.0: @ %entry368; CHECK-MVEFP-NEXT: vcvtb.f16.f32 q0, q0369; CHECK-MVEFP-NEXT: vcvtt.f16.f32 q0, q1370; CHECK-MVEFP-NEXT: bx lr371entry:372 %strided.vec = shufflevector <4 x float> %src1, <4 x float> %src2, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>373 %out = fptrunc <8 x float> %strided.vec to <8 x half>374 ret <8 x half> %out375}376 377define arm_aapcs_vfpcc <8 x half> @vmovn32_trunc2(<4 x float> %src1, <4 x float> %src2) {378; CHECK-MVE-LABEL: vmovn32_trunc2:379; CHECK-MVE: @ %bb.0: @ %entry380; CHECK-MVE-NEXT: vmov q2, q0381; CHECK-MVE-NEXT: vcvtb.f16.f32 s0, s4382; CHECK-MVE-NEXT: vcvtb.f16.f32 s1, s5383; CHECK-MVE-NEXT: vcvtb.f16.f32 s2, s6384; CHECK-MVE-NEXT: vcvtb.f16.f32 s3, s7385; CHECK-MVE-NEXT: vcvtt.f16.f32 s0, s8386; CHECK-MVE-NEXT: vcvtt.f16.f32 s1, s9387; CHECK-MVE-NEXT: vcvtt.f16.f32 s2, s10388; CHECK-MVE-NEXT: vcvtt.f16.f32 s3, s11389; CHECK-MVE-NEXT: bx lr390;391; CHECK-MVEFP-LABEL: vmovn32_trunc2:392; CHECK-MVEFP: @ %bb.0: @ %entry393; CHECK-MVEFP-NEXT: vcvtb.f16.f32 q1, q1394; CHECK-MVEFP-NEXT: vcvtt.f16.f32 q1, q0395; CHECK-MVEFP-NEXT: vmov q0, q1396; CHECK-MVEFP-NEXT: bx lr397entry:398 %strided.vec = shufflevector <4 x float> %src1, <4 x float> %src2, <8 x i32> <i32 4, i32 0, i32 5, i32 1, i32 6, i32 2, i32 7, i32 3>399 %out = fptrunc <8 x float> %strided.vec to <8 x half>400 ret <8 x half> %out401}402