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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -O0 -mattr=+mve %s -o - | FileCheck %s3 4declare void @external_function()5 6define arm_aapcs_vfpcc void @spill_vector_i32(<4 x i32> %v, ptr %p) {7; CHECK-LABEL: spill_vector_i32:8; CHECK: @ %bb.0: @ %entry9; CHECK-NEXT: .save {r7, lr}10; CHECK-NEXT: push {r7, lr}11; CHECK-NEXT: .pad #2412; CHECK-NEXT: sub sp, #2413; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill14; CHECK-NEXT: vstrw.32 q0, [sp, #8] @ 16-byte Spill15; CHECK-NEXT: bl external_function16; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload17; CHECK-NEXT: vldrw.u32 q0, [sp, #8] @ 16-byte Reload18; CHECK-NEXT: vstrw.32 q0, [r0]19; CHECK-NEXT: add sp, #2420; CHECK-NEXT: pop {r7, pc}21entry:22 call void @external_function()23 store <4 x i32> %v, ptr %p, align 424 ret void25}26 27define arm_aapcs_vfpcc void @spill_vector_i16(<8 x i16> %v, ptr %p) {28; CHECK-LABEL: spill_vector_i16:29; CHECK: @ %bb.0: @ %entry30; CHECK-NEXT: .save {r7, lr}31; CHECK-NEXT: push {r7, lr}32; CHECK-NEXT: .pad #2433; CHECK-NEXT: sub sp, #2434; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill35; CHECK-NEXT: vstrw.32 q0, [sp, #8] @ 16-byte Spill36; CHECK-NEXT: bl external_function37; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload38; CHECK-NEXT: vldrw.u32 q0, [sp, #8] @ 16-byte Reload39; CHECK-NEXT: vstrh.16 q0, [r0]40; CHECK-NEXT: add sp, #2441; CHECK-NEXT: pop {r7, pc}42entry:43 call void @external_function()44 store <8 x i16> %v, ptr %p, align 245 ret void46}47 48define arm_aapcs_vfpcc void @spill_vector_i8(<16 x i8> %v, ptr %p) {49; CHECK-LABEL: spill_vector_i8:50; CHECK: @ %bb.0: @ %entry51; CHECK-NEXT: .save {r7, lr}52; CHECK-NEXT: push {r7, lr}53; CHECK-NEXT: .pad #2454; CHECK-NEXT: sub sp, #2455; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill56; CHECK-NEXT: vstrw.32 q0, [sp, #8] @ 16-byte Spill57; CHECK-NEXT: bl external_function58; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload59; CHECK-NEXT: vldrw.u32 q0, [sp, #8] @ 16-byte Reload60; CHECK-NEXT: vstrb.8 q0, [r0]61; CHECK-NEXT: add sp, #2462; CHECK-NEXT: pop {r7, pc}63entry:64 call void @external_function()65 store <16 x i8> %v, ptr %p, align 166 ret void67}68 69define arm_aapcs_vfpcc void @spill_vector_i64(<2 x i64> %v, ptr %p) {70; CHECK-LABEL: spill_vector_i64:71; CHECK: @ %bb.0: @ %entry72; CHECK-NEXT: .save {r7, lr}73; CHECK-NEXT: push {r7, lr}74; CHECK-NEXT: .pad #2475; CHECK-NEXT: sub sp, #2476; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill77; CHECK-NEXT: vstrw.32 q0, [sp, #8] @ 16-byte Spill78; CHECK-NEXT: bl external_function79; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload80; CHECK-NEXT: vldrw.u32 q0, [sp, #8] @ 16-byte Reload81; CHECK-NEXT: vstrw.32 q0, [r0]82; CHECK-NEXT: add sp, #2483; CHECK-NEXT: pop {r7, pc}84entry:85 call void @external_function()86 store <2 x i64> %v, ptr %p, align 887 ret void88}89 90define arm_aapcs_vfpcc void @spill_vector_f32(<4 x float> %v, ptr %p) {91; CHECK-LABEL: spill_vector_f32:92; CHECK: @ %bb.0: @ %entry93; CHECK-NEXT: .save {r7, lr}94; CHECK-NEXT: push {r7, lr}95; CHECK-NEXT: .pad #2496; CHECK-NEXT: sub sp, #2497; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill98; CHECK-NEXT: vstrw.32 q0, [sp, #8] @ 16-byte Spill99; CHECK-NEXT: bl external_function100; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload101; CHECK-NEXT: vldrw.u32 q0, [sp, #8] @ 16-byte Reload102; CHECK-NEXT: vstrw.32 q0, [r0]103; CHECK-NEXT: add sp, #24104; CHECK-NEXT: pop {r7, pc}105entry:106 call void @external_function()107 store <4 x float> %v, ptr %p, align 8108 ret void109}110 111define arm_aapcs_vfpcc void @spill_vector_f16(<8 x half> %v, ptr %p) {112; CHECK-LABEL: spill_vector_f16:113; CHECK: @ %bb.0: @ %entry114; CHECK-NEXT: .save {r7, lr}115; CHECK-NEXT: push {r7, lr}116; CHECK-NEXT: .pad #24117; CHECK-NEXT: sub sp, #24118; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill119; CHECK-NEXT: vstrw.32 q0, [sp, #8] @ 16-byte Spill120; CHECK-NEXT: bl external_function121; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload122; CHECK-NEXT: vldrw.u32 q0, [sp, #8] @ 16-byte Reload123; CHECK-NEXT: vstrw.32 q0, [r0]124; CHECK-NEXT: add sp, #24125; CHECK-NEXT: pop {r7, pc}126entry:127 call void @external_function()128 store <8 x half> %v, ptr %p, align 8129 ret void130}131 132define arm_aapcs_vfpcc void @spill_vector_f64(<2 x double> %v, ptr %p) {133; CHECK-LABEL: spill_vector_f64:134; CHECK: @ %bb.0: @ %entry135; CHECK-NEXT: .save {r7, lr}136; CHECK-NEXT: push {r7, lr}137; CHECK-NEXT: .pad #24138; CHECK-NEXT: sub sp, #24139; CHECK-NEXT: str r0, [sp, #4] @ 4-byte Spill140; CHECK-NEXT: vstrw.32 q0, [sp, #8] @ 16-byte Spill141; CHECK-NEXT: bl external_function142; CHECK-NEXT: ldr r0, [sp, #4] @ 4-byte Reload143; CHECK-NEXT: vldrw.u32 q0, [sp, #8] @ 16-byte Reload144; CHECK-NEXT: vstrw.32 q0, [r0]145; CHECK-NEXT: add sp, #24146; CHECK-NEXT: pop {r7, pc}147entry:148 call void @external_function()149 store <2 x double> %v, ptr %p, align 8150 ret void151}152