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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp,+fp64 -verify-machineinstrs %s -o - | FileCheck %s3 4; i325 6define void @vst3_v2i32(ptr %src, ptr %dst) {7; CHECK-LABEL: vst3_v2i32:8; CHECK: @ %bb.0: @ %entry9; CHECK-NEXT: .save {r4, lr}10; CHECK-NEXT: push {r4, lr}11; CHECK-NEXT: ldrd lr, r12, [r0]12; CHECK-NEXT: ldrd r3, r2, [r0, #8]13; CHECK-NEXT: ldrd r4, r0, [r0, #16]14; CHECK-NEXT: vmov q1[2], q1[0], lr, r315; CHECK-NEXT: strd r2, r0, [r1, #16]16; CHECK-NEXT: vmov q1[3], q1[1], r12, r217; CHECK-NEXT: vmov.32 q0[0], r418; CHECK-NEXT: vmov.f32 s8, s419; CHECK-NEXT: vmov.f32 s9, s620; CHECK-NEXT: vmov.f32 s10, s021; CHECK-NEXT: vmov.f32 s11, s522; CHECK-NEXT: vstrw.32 q2, [r1]23; CHECK-NEXT: pop {r4, pc}24entry:25 %l1 = load <2 x i32>, ptr %src, align 426 %s2 = getelementptr <2 x i32>, ptr %src, i32 127 %l2 = load <2 x i32>, ptr %s2, align 428 %s3 = getelementptr <2 x i32>, ptr %src, i32 229 %l3 = load <2 x i32>, ptr %s3, align 430 %t1 = shufflevector <2 x i32> %l1, <2 x i32> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>31 %t2 = shufflevector <2 x i32> %l3, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>32 %s = shufflevector <4 x i32> %t1, <4 x i32> %t2, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>33 store <6 x i32> %s, ptr %dst34 ret void35}36 37define void @vst3_v4i32(ptr %src, ptr %dst) {38; CHECK-LABEL: vst3_v4i32:39; CHECK: @ %bb.0: @ %entry40; CHECK-NEXT: .vsave {d8, d9}41; CHECK-NEXT: vpush {d8, d9}42; CHECK-NEXT: vldrw.u32 q2, [r0]43; CHECK-NEXT: vldrw.u32 q3, [r0, #16]44; CHECK-NEXT: vldrw.u32 q0, [r0, #32]45; CHECK-NEXT: vmov.f32 s4, s846; CHECK-NEXT: vmov r0, r2, d047; CHECK-NEXT: vmov.f32 s5, s1248; CHECK-NEXT: vmov.f32 s7, s949; CHECK-NEXT: vmov.f32 s16, s1350; CHECK-NEXT: vmov.32 q1[2], r051; CHECK-NEXT: vmov.f32 s18, s1052; CHECK-NEXT: vstrw.32 q1, [r1]53; CHECK-NEXT: vmov.f32 s19, s1454; CHECK-NEXT: vmov.f32 s0, s255; CHECK-NEXT: vmov.32 q4[1], r256; CHECK-NEXT: vmov.f32 s1, s1157; CHECK-NEXT: vstrw.32 q4, [r1, #16]58; CHECK-NEXT: vmov.f32 s2, s1559; CHECK-NEXT: vstrw.32 q0, [r1, #32]60; CHECK-NEXT: vpop {d8, d9}61; CHECK-NEXT: bx lr62entry:63 %l1 = load <4 x i32>, ptr %src, align 464 %s2 = getelementptr <4 x i32>, ptr %src, i32 165 %l2 = load <4 x i32>, ptr %s2, align 466 %s3 = getelementptr <4 x i32>, ptr %src, i32 267 %l3 = load <4 x i32>, ptr %s3, align 468 %t1 = shufflevector <4 x i32> %l1, <4 x i32> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>69 %t2 = shufflevector <4 x i32> %l3, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>70 %s = shufflevector <8 x i32> %t1, <8 x i32> %t2, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>71 store <12 x i32> %s, ptr %dst72 ret void73}74 75define void @vst3_v8i32(ptr %src, ptr %dst) {76; CHECK-LABEL: vst3_v8i32:77; CHECK: @ %bb.0: @ %entry78; CHECK-NEXT: .save {r7, lr}79; CHECK-NEXT: push {r7, lr}80; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}81; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}82; CHECK-NEXT: vldrw.u32 q3, [r0]83; CHECK-NEXT: vldrw.u32 q7, [r0, #48]84; CHECK-NEXT: vldrw.u32 q0, [r0, #80]85; CHECK-NEXT: vldrw.u32 q2, [r0, #64]86; CHECK-NEXT: vmov.f32 s4, s1287; CHECK-NEXT: vldrw.u32 q4, [r0, #32]88; CHECK-NEXT: vmov.f32 s12, s2889; CHECK-NEXT: vldrw.u32 q6, [r0, #16]90; CHECK-NEXT: vmov r2, lr, d091; CHECK-NEXT: vmov r12, r3, d492; CHECK-NEXT: vmov.f32 s0, s293; CHECK-NEXT: vmov.f32 s2, s3194; CHECK-NEXT: vmov.f32 s20, s2995; CHECK-NEXT: vmov.f32 s9, s1596; CHECK-NEXT: vmov.f32 s29, s1297; CHECK-NEXT: vmov.f32 s5, s1698; CHECK-NEXT: vmov.f32 s7, s1399; CHECK-NEXT: vmov.f32 s22, s26100; CHECK-NEXT: vmov.32 q1[2], r12101; CHECK-NEXT: vmov.f32 s23, s30102; CHECK-NEXT: vstrw.32 q1, [r1]103; CHECK-NEXT: vmov.f32 s28, s24104; CHECK-NEXT: vmov.32 q5[1], lr105; CHECK-NEXT: vmov.f32 s31, s25106; CHECK-NEXT: vstrw.32 q5, [r1, #64]107; CHECK-NEXT: vmov.f32 s12, s17108; CHECK-NEXT: vmov.32 q7[2], r2109; CHECK-NEXT: vmov.f32 s15, s18110; CHECK-NEXT: vstrw.32 q7, [r1, #48]111; CHECK-NEXT: vmov.f32 s1, s27112; CHECK-NEXT: vmov.32 q3[1], r3113; CHECK-NEXT: vmov.f32 s8, s10114; CHECK-NEXT: vstrw.32 q3, [r1, #16]115; CHECK-NEXT: vmov.f32 s10, s19116; CHECK-NEXT: vstrw.32 q0, [r1, #80]117; CHECK-NEXT: vstrw.32 q2, [r1, #32]118; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}119; CHECK-NEXT: pop {r7, pc}120entry:121 %l1 = load <8 x i32>, ptr %src, align 4122 %s2 = getelementptr <8 x i32>, ptr %src, i32 1123 %l2 = load <8 x i32>, ptr %s2, align 4124 %s3 = getelementptr <8 x i32>, ptr %src, i32 2125 %l3 = load <8 x i32>, ptr %s3, align 4126 %t1 = shufflevector <8 x i32> %l1, <8 x i32> %l2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>127 %t2 = shufflevector <8 x i32> %l3, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>128 %s = shufflevector <16 x i32> %t1, <16 x i32> %t2, <24 x i32> <i32 0, i32 8, i32 16, i32 1, i32 9, i32 17, i32 2, i32 10, i32 18, i32 3, i32 11, i32 19, i32 4, i32 12, i32 20, i32 5, i32 13, i32 21, i32 6, i32 14, i32 22, i32 7, i32 15, i32 23>129 store <24 x i32> %s, ptr %dst130 ret void131}132 133define void @vst3_v16i32(ptr %src, ptr %dst) {134; CHECK-LABEL: vst3_v16i32:135; CHECK: @ %bb.0: @ %entry136; CHECK-NEXT: .save {r4, lr}137; CHECK-NEXT: push {r4, lr}138; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}139; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}140; CHECK-NEXT: .pad #176141; CHECK-NEXT: sub sp, #176142; CHECK-NEXT: vldrw.u32 q1, [r0, #160]143; CHECK-NEXT: vldrw.u32 q3, [r0, #96]144; CHECK-NEXT: vldrw.u32 q0, [r0, #64]145; CHECK-NEXT: vldrw.u32 q5, [r0, #128]146; CHECK-NEXT: vstrw.32 q1, [sp, #160] @ 16-byte Spill147; CHECK-NEXT: vldrw.u32 q1, [r0, #144]148; CHECK-NEXT: vstrw.32 q3, [sp, #16] @ 16-byte Spill149; CHECK-NEXT: vldrw.u32 q3, [r0, #80]150; CHECK-NEXT: vldrw.u32 q2, [r0]151; CHECK-NEXT: vldrw.u32 q7, [r0, #176]152; CHECK-NEXT: vstrw.32 q1, [sp, #80] @ 16-byte Spill153; CHECK-NEXT: vstrw.32 q3, [sp, #96] @ 16-byte Spill154; CHECK-NEXT: vldrw.u32 q4, [r0, #32]155; CHECK-NEXT: vldrw.u32 q1, [r0, #112]156; CHECK-NEXT: vldrw.u32 q3, [r0, #48]157; CHECK-NEXT: vmov r12, r3, d10158; CHECK-NEXT: vmov.f32 s20, s22159; CHECK-NEXT: vstrw.32 q4, [sp] @ 16-byte Spill160; CHECK-NEXT: vmov.f32 s22, s3161; CHECK-NEXT: vldrw.u32 q4, [r0, #16]162; CHECK-NEXT: vmov.f32 s21, s11163; CHECK-NEXT: vstrw.32 q7, [sp, #48] @ 16-byte Spill164; CHECK-NEXT: vstrw.32 q5, [r1, #32]165; CHECK-NEXT: vmov.f32 s24, s1166; CHECK-NEXT: vmov.f32 s27, s2167; CHECK-NEXT: vstrw.32 q4, [sp, #64] @ 16-byte Spill168; CHECK-NEXT: vmov.f32 s21, s0169; CHECK-NEXT: vmov.f32 s0, s30170; CHECK-NEXT: vmov.f32 s3, s31171; CHECK-NEXT: vldrw.u32 q7, [sp] @ 16-byte Reload172; CHECK-NEXT: vmov.f32 s1, s15173; CHECK-NEXT: vmov.f32 s2, s7174; CHECK-NEXT: vstrw.32 q0, [sp, #128] @ 16-byte Spill175; CHECK-NEXT: vmov.f32 s0, s5176; CHECK-NEXT: vmov.f32 s2, s14177; CHECK-NEXT: vmov.f32 s3, s6178; CHECK-NEXT: vstrw.32 q0, [sp, #112] @ 16-byte Spill179; CHECK-NEXT: vldrw.u32 q0, [sp, #160] @ 16-byte Reload180; CHECK-NEXT: vmov.f32 s26, s10181; CHECK-NEXT: vmov.f32 s20, s8182; CHECK-NEXT: vmov.32 q6[1], r3183; CHECK-NEXT: vmov.f32 s23, s9184; CHECK-NEXT: vldrw.u32 q2, [sp, #16] @ 16-byte Reload185; CHECK-NEXT: vmov.f32 s16, s2186; CHECK-NEXT: vstrw.32 q6, [r1, #16]187; CHECK-NEXT: vmov.f32 s19, s3188; CHECK-NEXT: vldrw.u32 q0, [sp, #80] @ 16-byte Reload189; CHECK-NEXT: vmov.f32 s17, s31190; CHECK-NEXT: vstrw.32 q5, [sp, #144] @ 16-byte Spill191; CHECK-NEXT: vmov.f32 s18, s11192; CHECK-NEXT: vstrw.32 q4, [sp, #32] @ 16-byte Spill193; CHECK-NEXT: vmov.f64 d8, d14194; CHECK-NEXT: vmov.f32 s19, s29195; CHECK-NEXT: vmov.f64 d14, d0196; CHECK-NEXT: vmov.f32 s25, s4197; CHECK-NEXT: vldrw.u32 q1, [sp, #96] @ 16-byte Reload198; CHECK-NEXT: vmov.f32 s20, s9199; CHECK-NEXT: vmov.f32 s23, s10200; CHECK-NEXT: vmov.f32 s17, s8201; CHECK-NEXT: vldrw.u32 q2, [sp, #64] @ 16-byte Reload202; CHECK-NEXT: vmov.f32 s15, s3203; CHECK-NEXT: vmov.f32 s0, s8204; CHECK-NEXT: vmov.f32 s1, s4205; CHECK-NEXT: vmov.f32 s3, s9206; CHECK-NEXT: vmov r0, r3, d14207; CHECK-NEXT: vmov.f32 s24, s12208; CHECK-NEXT: vmov.f32 s12, s2209; CHECK-NEXT: vmov.32 q0[2], r0210; CHECK-NEXT: vstrw.32 q0, [r1, #48]211; CHECK-NEXT: vldrw.u32 q0, [sp, #32] @ 16-byte Reload212; CHECK-NEXT: vmov.f32 s18, s30213; CHECK-NEXT: vmov.f32 s22, s30214; CHECK-NEXT: vldrw.u32 q7, [sp, #48] @ 16-byte Reload215; CHECK-NEXT: vstrw.32 q0, [r1, #128]216; CHECK-NEXT: vldrw.u32 q0, [sp, #112] @ 16-byte Reload217; CHECK-NEXT: vmov r0, lr, d14218; CHECK-NEXT: vldrw.u32 q7, [sp, #160] @ 16-byte Reload219; CHECK-NEXT: vmov.32 q0[1], lr220; CHECK-NEXT: vmov.f32 s27, s13221; CHECK-NEXT: vstrw.32 q0, [r1, #160]222; CHECK-NEXT: vldrw.u32 q0, [sp, #128] @ 16-byte Reload223; CHECK-NEXT: vmov r2, r4, d14224; CHECK-NEXT: vmov.32 q6[2], r0225; CHECK-NEXT: vstrw.32 q0, [r1, #176]226; CHECK-NEXT: vldrw.u32 q0, [sp, #144] @ 16-byte Reload227; CHECK-NEXT: vmov.f32 s13, s11228; CHECK-NEXT: vmov.32 q4[2], r2229; CHECK-NEXT: vmov.f32 s8, s5230; CHECK-NEXT: vmov.32 q5[1], r4231; CHECK-NEXT: vmov.f32 s11, s6232; CHECK-NEXT: vmov.32 q0[2], r12233; CHECK-NEXT: vmov.f32 s14, s7234; CHECK-NEXT: vmov.32 q2[1], r3235; CHECK-NEXT: vstrw.32 q2, [r1, #64]236; CHECK-NEXT: vstrw.32 q3, [r1, #80]237; CHECK-NEXT: vstrw.32 q4, [r1, #96]238; CHECK-NEXT: vstrw.32 q5, [r1, #112]239; CHECK-NEXT: vstrw.32 q6, [r1, #144]240; CHECK-NEXT: vstrw.32 q0, [r1]241; CHECK-NEXT: add sp, #176242; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}243; CHECK-NEXT: pop {r4, pc}244entry:245 %l1 = load <16 x i32>, ptr %src, align 4246 %s2 = getelementptr <16 x i32>, ptr %src, i32 1247 %l2 = load <16 x i32>, ptr %s2, align 4248 %s3 = getelementptr <16 x i32>, ptr %src, i32 2249 %l3 = load <16 x i32>, ptr %s3, align 4250 %t1 = shufflevector <16 x i32> %l1, <16 x i32> %l2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>251 %t2 = shufflevector <16 x i32> %l3, <16 x i32> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>252 %s = shufflevector <32 x i32> %t1, <32 x i32> %t2, <48 x i32> <i32 0, i32 16, i32 32, i32 1, i32 17, i32 33, i32 2, i32 18, i32 34, i32 3, i32 19, i32 35, i32 4, i32 20, i32 36, i32 5, i32 21, i32 37, i32 6, i32 22, i32 38, i32 7, i32 23, i32 39, i32 8, i32 24, i32 40, i32 9, i32 25, i32 41, i32 10, i32 26, i32 42, i32 11, i32 27, i32 43, i32 12, i32 28, i32 44, i32 13, i32 29, i32 45, i32 14, i32 30, i32 46, i32 15, i32 31, i32 47>253 store <48 x i32> %s, ptr %dst254 ret void255}256 257; i16258 259define void @vst3_v2i16(ptr %src, ptr %dst) {260; CHECK-LABEL: vst3_v2i16:261; CHECK: @ %bb.0: @ %entry262; CHECK-NEXT: .save {r4, lr}263; CHECK-NEXT: push {r4, lr}264; CHECK-NEXT: ldrh r2, [r0, #10]265; CHECK-NEXT: ldrh r4, [r0, #8]266; CHECK-NEXT: ldrh.w r12, [r0, #2]267; CHECK-NEXT: ldrh.w lr, [r0]268; CHECK-NEXT: vmov q0[2], q0[0], r4, r2269; CHECK-NEXT: ldrh r3, [r0, #6]270; CHECK-NEXT: ldrh r0, [r0, #4]271; CHECK-NEXT: vmov q1[2], q1[0], r0, r3272; CHECK-NEXT: vmov q2, q1273; CHECK-NEXT: vmovnt.i32 q2, q0274; CHECK-NEXT: vmov q0[2], q0[0], lr, r12275; CHECK-NEXT: vmov r0, s10276; CHECK-NEXT: vmov.f32 s1, s4277; CHECK-NEXT: vmov.f32 s3, s2278; CHECK-NEXT: vmov.32 q0[2], r4279; CHECK-NEXT: vstrh.32 q0, [r1]280; CHECK-NEXT: str r0, [r1, #8]281; CHECK-NEXT: pop {r4, pc}282entry:283 %l1 = load <2 x i16>, ptr %src, align 4284 %s2 = getelementptr <2 x i16>, ptr %src, i32 1285 %l2 = load <2 x i16>, ptr %s2, align 4286 %s3 = getelementptr <2 x i16>, ptr %src, i32 2287 %l3 = load <2 x i16>, ptr %s3, align 4288 %t1 = shufflevector <2 x i16> %l1, <2 x i16> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>289 %t2 = shufflevector <2 x i16> %l3, <2 x i16> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>290 %s = shufflevector <4 x i16> %t1, <4 x i16> %t2, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>291 store <6 x i16> %s, ptr %dst292 ret void293}294 295define void @vst3_v4i16(ptr %src, ptr %dst) {296; CHECK-LABEL: vst3_v4i16:297; CHECK: @ %bb.0: @ %entry298; CHECK-NEXT: .save {r4, r5, r7, lr}299; CHECK-NEXT: push {r4, r5, r7, lr}300; CHECK-NEXT: vldrh.u32 q1, [r0]301; CHECK-NEXT: vldrh.u32 q0, [r0, #8]302; CHECK-NEXT: vldrh.u32 q2, [r0, #16]303; CHECK-NEXT: vmov r0, r5, d2304; CHECK-NEXT: vmov.f32 s5, s7305; CHECK-NEXT: vmov r2, r3, d0306; CHECK-NEXT: vmov lr, r4, d1307; CHECK-NEXT: vmov.16 q0[0], r0308; CHECK-NEXT: vmov.f32 s4, s10309; CHECK-NEXT: vmov.16 q0[1], r2310; CHECK-NEXT: vmov.f32 s7, s11311; CHECK-NEXT: vmov r12, s6312; CHECK-NEXT: vmov.32 q1[2], r4313; CHECK-NEXT: vmov r0, r4, d4314; CHECK-NEXT: vstrh.32 q1, [r1, #16]315; CHECK-NEXT: vmov.16 q0[2], r0316; CHECK-NEXT: vmov.16 q0[3], r5317; CHECK-NEXT: vmov.16 q0[4], r3318; CHECK-NEXT: vmov.16 q0[5], r4319; CHECK-NEXT: vmov.16 q0[6], r12320; CHECK-NEXT: vmov.16 q0[7], lr321; CHECK-NEXT: vstrw.32 q0, [r1]322; CHECK-NEXT: pop {r4, r5, r7, pc}323entry:324 %l1 = load <4 x i16>, ptr %src, align 4325 %s2 = getelementptr <4 x i16>, ptr %src, i32 1326 %l2 = load <4 x i16>, ptr %s2, align 4327 %s3 = getelementptr <4 x i16>, ptr %src, i32 2328 %l3 = load <4 x i16>, ptr %s3, align 4329 %t1 = shufflevector <4 x i16> %l1, <4 x i16> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>330 %t2 = shufflevector <4 x i16> %l3, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>331 %s = shufflevector <8 x i16> %t1, <8 x i16> %t2, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>332 store <12 x i16> %s, ptr %dst333 ret void334}335 336define void @vst3_v8i16(ptr %src, ptr %dst) {337; CHECK-LABEL: vst3_v8i16:338; CHECK: @ %bb.0: @ %entry339; CHECK-NEXT: .vsave {d8, d9, d10, d11}340; CHECK-NEXT: vpush {d8, d9, d10, d11}341; CHECK-NEXT: vldrw.u32 q0, [r0]342; CHECK-NEXT: vldrw.u32 q2, [r0, #16]343; CHECK-NEXT: vmov.f32 s12, s3344; CHECK-NEXT: vmov.u16 r2, q2[5]345; CHECK-NEXT: vmov.16 q1[0], r2346; CHECK-NEXT: vins.f16 s12, s11347; CHECK-NEXT: vmov.f32 s5, s12348; CHECK-NEXT: vmov.u16 r2, q2[7]349; CHECK-NEXT: vldrw.u32 q3, [r0, #32]350; CHECK-NEXT: vmov.16 q1[6], r2351; CHECK-NEXT: vmov.f32 s20, s0352; CHECK-NEXT: vmov.u16 r0, q2[3]353; CHECK-NEXT: vmovx.f16 s6, s14354; CHECK-NEXT: vmov.16 q4[2], r0355; CHECK-NEXT: vins.f16 s4, s6356; CHECK-NEXT: vmovx.f16 s6, s3357; CHECK-NEXT: vmovx.f16 s3, s15358; CHECK-NEXT: vins.f16 s15, s6359; CHECK-NEXT: vmov.f32 s6, s15360; CHECK-NEXT: vins.f16 s7, s3361; CHECK-NEXT: vmov.f32 s3, s2362; CHECK-NEXT: vmovx.f16 s15, s1363; CHECK-NEXT: vmovx.f16 s2, s2364; CHECK-NEXT: vins.f16 s20, s8365; CHECK-NEXT: vmov.u16 r0, q2[1]366; CHECK-NEXT: vmovx.f16 s0, s0367; CHECK-NEXT: vmovx.f16 s16, s13368; CHECK-NEXT: vins.f16 s14, s2369; CHECK-NEXT: vins.f16 s3, s10370; CHECK-NEXT: vmovx.f16 s2, s12371; CHECK-NEXT: vmov.16 q5[4], r0372; CHECK-NEXT: vins.f16 s1, s9373; CHECK-NEXT: vins.f16 s12, s0374; CHECK-NEXT: vins.f16 s13, s15375; CHECK-NEXT: vins.f16 s17, s16376; CHECK-NEXT: vmov.f32 s16, s13377; CHECK-NEXT: vmov.f32 s18, s3378; CHECK-NEXT: vins.f16 s22, s2379; CHECK-NEXT: vmov.f32 s19, s14380; CHECK-NEXT: vstrw.32 q1, [r1, #32]381; CHECK-NEXT: vmov.f32 s21, s12382; CHECK-NEXT: vstrw.32 q4, [r1, #16]383; CHECK-NEXT: vmov.f32 s23, s1384; CHECK-NEXT: vstrw.32 q5, [r1]385; CHECK-NEXT: vpop {d8, d9, d10, d11}386; CHECK-NEXT: bx lr387entry:388 %l1 = load <8 x i16>, ptr %src, align 4389 %s2 = getelementptr <8 x i16>, ptr %src, i32 1390 %l2 = load <8 x i16>, ptr %s2, align 4391 %s3 = getelementptr <8 x i16>, ptr %src, i32 2392 %l3 = load <8 x i16>, ptr %s3, align 4393 %t1 = shufflevector <8 x i16> %l1, <8 x i16> %l2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>394 %t2 = shufflevector <8 x i16> %l3, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>395 %s = shufflevector <16 x i16> %t1, <16 x i16> %t2, <24 x i32> <i32 0, i32 8, i32 16, i32 1, i32 9, i32 17, i32 2, i32 10, i32 18, i32 3, i32 11, i32 19, i32 4, i32 12, i32 20, i32 5, i32 13, i32 21, i32 6, i32 14, i32 22, i32 7, i32 15, i32 23>396 store <24 x i16> %s, ptr %dst397 ret void398}399 400define void @vst3_v16i16(ptr %src, ptr %dst) {401; CHECK-LABEL: vst3_v16i16:402; CHECK: @ %bb.0: @ %entry403; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}404; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}405; CHECK-NEXT: .pad #48406; CHECK-NEXT: sub sp, #48407; CHECK-NEXT: vldrw.u32 q2, [r0, #32]408; CHECK-NEXT: vldrw.u32 q6, [r0]409; CHECK-NEXT: vldrw.u32 q3, [r0, #16]410; CHECK-NEXT: vldrw.u32 q7, [r0, #80]411; CHECK-NEXT: vmov.f32 s0, s27412; CHECK-NEXT: vmov.u16 r2, q2[5]413; CHECK-NEXT: vmov.16 q1[0], r2414; CHECK-NEXT: vins.f16 s0, s11415; CHECK-NEXT: vstrw.32 q2, [sp, #32] @ 16-byte Spill416; CHECK-NEXT: vmov.u16 r2, q2[7]417; CHECK-NEXT: vldrw.u32 q2, [r0, #64]418; CHECK-NEXT: vmov.f32 s5, s0419; CHECK-NEXT: vmov.16 q1[6], r2420; CHECK-NEXT: vmov.f32 s20, s15421; CHECK-NEXT: vmovx.f16 s0, s10422; CHECK-NEXT: vmov.f32 s6, s11423; CHECK-NEXT: vins.f16 s4, s0424; CHECK-NEXT: vmovx.f16 s0, s27425; CHECK-NEXT: vins.f16 s6, s0426; CHECK-NEXT: vmovx.f16 s11, s11427; CHECK-NEXT: vmov q0, q1428; CHECK-NEXT: vldrw.u32 q1, [r0, #48]429; CHECK-NEXT: vins.f16 s3, s11430; CHECK-NEXT: vmovx.f16 s15, s15431; CHECK-NEXT: vmov.u16 r2, q1[5]432; CHECK-NEXT: vins.f16 s20, s7433; CHECK-NEXT: vmov.16 q4[0], r2434; CHECK-NEXT: vmov.u16 r2, q1[7]435; CHECK-NEXT: vmov.f32 s17, s20436; CHECK-NEXT: vmovx.f16 s20, s31437; CHECK-NEXT: vmov.16 q4[6], r2438; CHECK-NEXT: vstrw.32 q0, [sp, #16] @ 16-byte Spill439; CHECK-NEXT: vins.f16 s19, s20440; CHECK-NEXT: vmov.f64 d10, d12441; CHECK-NEXT: vldrw.u32 q0, [sp, #32] @ 16-byte Reload442; CHECK-NEXT: vins.f16 s31, s15443; CHECK-NEXT: vmovx.f16 s18, s30444; CHECK-NEXT: vins.f16 s24, s0445; CHECK-NEXT: vmov.u16 r0, q0[1]446; CHECK-NEXT: vmov.f32 s22, s26447; CHECK-NEXT: vmov.16 q6[4], r0448; CHECK-NEXT: vmovx.f16 s15, s20449; CHECK-NEXT: vstrw.32 q5, [sp] @ 16-byte Spill450; CHECK-NEXT: vmovx.f16 s20, s8451; CHECK-NEXT: vmov.u16 r0, q1[1]452; CHECK-NEXT: vins.f16 s26, s20453; CHECK-NEXT: vmov.f32 s20, s12454; CHECK-NEXT: vins.f16 s20, s4455; CHECK-NEXT: vmov.f32 s11, s21456; CHECK-NEXT: vmov.16 q5[4], r0457; CHECK-NEXT: vmov.u16 r0, q1[3]458; CHECK-NEXT: vins.f16 s11, s1459; CHECK-NEXT: vmov.16 q0[2], r0460; CHECK-NEXT: vmovx.f16 s12, s12461; CHECK-NEXT: vins.f16 s8, s15462; CHECK-NEXT: vmov.f32 s27, s11463; CHECK-NEXT: vmovx.f16 s11, s28464; CHECK-NEXT: vins.f16 s28, s12465; CHECK-NEXT: vmov.f32 s12, s14466; CHECK-NEXT: vmovx.f16 s2, s29467; CHECK-NEXT: vmov.f32 s25, s8468; CHECK-NEXT: vmov.f32 s8, s13469; CHECK-NEXT: vins.f16 s1, s2470; CHECK-NEXT: vmovx.f16 s2, s14471; CHECK-NEXT: vins.f16 s12, s6472; CHECK-NEXT: vins.f16 s8, s5473; CHECK-NEXT: vins.f16 s30, s2474; CHECK-NEXT: vmovx.f16 s0, s13475; CHECK-NEXT: vmov.f32 s2, s12476; CHECK-NEXT: vldrw.u32 q3, [sp, #32] @ 16-byte Reload477; CHECK-NEXT: vldrw.u32 q1, [sp] @ 16-byte Reload478; CHECK-NEXT: vmov.f32 s23, s8479; CHECK-NEXT: vins.f16 s29, s0480; CHECK-NEXT: vmov.f32 s8, s6481; CHECK-NEXT: vmov.u16 r0, q3[3]482; CHECK-NEXT: vins.f16 s8, s14483; CHECK-NEXT: vmov.16 q3[2], r0484; CHECK-NEXT: vmovx.f16 s14, s9485; CHECK-NEXT: vmovx.f16 s12, s5486; CHECK-NEXT: vins.f16 s13, s14487; CHECK-NEXT: vmovx.f16 s14, s6488; CHECK-NEXT: vins.f16 s9, s12489; CHECK-NEXT: vins.f16 s10, s14490; CHECK-NEXT: vldrw.u32 q1, [sp, #16] @ 16-byte Reload491; CHECK-NEXT: vins.f16 s16, s18492; CHECK-NEXT: vmov.f32 s18, s31493; CHECK-NEXT: vins.f16 s22, s11494; CHECK-NEXT: vmov.f32 s21, s28495; CHECK-NEXT: vstrw.32 q1, [r1, #32]496; CHECK-NEXT: vmov.f32 s0, s29497; CHECK-NEXT: vstrw.32 q5, [r1, #48]498; CHECK-NEXT: vmov.f32 s3, s30499; CHECK-NEXT: vstrw.32 q4, [r1, #80]500; CHECK-NEXT: vmov.f32 s12, s9501; CHECK-NEXT: vstrw.32 q0, [r1, #64]502; CHECK-NEXT: vmov.f32 s14, s8503; CHECK-NEXT: vstrw.32 q6, [r1]504; CHECK-NEXT: vmov.f32 s15, s10505; CHECK-NEXT: vstrw.32 q3, [r1, #16]506; CHECK-NEXT: add sp, #48507; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}508; CHECK-NEXT: bx lr509entry:510 %l1 = load <16 x i16>, ptr %src, align 4511 %s2 = getelementptr <16 x i16>, ptr %src, i32 1512 %l2 = load <16 x i16>, ptr %s2, align 4513 %s3 = getelementptr <16 x i16>, ptr %src, i32 2514 %l3 = load <16 x i16>, ptr %s3, align 4515 %t1 = shufflevector <16 x i16> %l1, <16 x i16> %l2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>516 %t2 = shufflevector <16 x i16> %l3, <16 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>517 %s = shufflevector <32 x i16> %t1, <32 x i16> %t2, <48 x i32> <i32 0, i32 16, i32 32, i32 1, i32 17, i32 33, i32 2, i32 18, i32 34, i32 3, i32 19, i32 35, i32 4, i32 20, i32 36, i32 5, i32 21, i32 37, i32 6, i32 22, i32 38, i32 7, i32 23, i32 39, i32 8, i32 24, i32 40, i32 9, i32 25, i32 41, i32 10, i32 26, i32 42, i32 11, i32 27, i32 43, i32 12, i32 28, i32 44, i32 13, i32 29, i32 45, i32 14, i32 30, i32 46, i32 15, i32 31, i32 47>518 store <48 x i16> %s, ptr %dst519 ret void520}521 522; i8523 524define void @vst3_v2i8(ptr %src, ptr %dst) {525; CHECK-LABEL: vst3_v2i8:526; CHECK: @ %bb.0: @ %entry527; CHECK-NEXT: .save {r4, r5, r7, lr}528; CHECK-NEXT: push {r4, r5, r7, lr}529; CHECK-NEXT: .pad #16530; CHECK-NEXT: sub sp, #16531; CHECK-NEXT: ldrb r2, [r0]532; CHECK-NEXT: mov r5, sp533; CHECK-NEXT: ldrb r3, [r0, #2]534; CHECK-NEXT: vmov.16 q0[0], r2535; CHECK-NEXT: ldrb.w r12, [r0, #1]536; CHECK-NEXT: ldrb.w lr, [r0, #3]537; CHECK-NEXT: vmov.16 q0[1], r3538; CHECK-NEXT: ldrb r4, [r0, #5]539; CHECK-NEXT: ldrb r0, [r0, #4]540; CHECK-NEXT: vmov.16 q0[2], r0541; CHECK-NEXT: add r0, sp, #8542; CHECK-NEXT: vmov.16 q0[3], r12543; CHECK-NEXT: vmov.16 q0[4], lr544; CHECK-NEXT: vmov.16 q0[5], r4545; CHECK-NEXT: vstrb.16 q0, [r5]546; CHECK-NEXT: vstrb.16 q0, [r0]547; CHECK-NEXT: vldrh.u32 q0, [r0]548; CHECK-NEXT: ldr r2, [sp]549; CHECK-NEXT: str r2, [r1]550; CHECK-NEXT: vmov r0, s2551; CHECK-NEXT: strh r0, [r1, #4]552; CHECK-NEXT: add sp, #16553; CHECK-NEXT: pop {r4, r5, r7, pc}554entry:555 %l1 = load <2 x i8>, ptr %src, align 4556 %s2 = getelementptr <2 x i8>, ptr %src, i32 1557 %l2 = load <2 x i8>, ptr %s2, align 4558 %s3 = getelementptr <2 x i8>, ptr %src, i32 2559 %l3 = load <2 x i8>, ptr %s3, align 4560 %t1 = shufflevector <2 x i8> %l1, <2 x i8> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>561 %t2 = shufflevector <2 x i8> %l3, <2 x i8> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>562 %s = shufflevector <4 x i8> %t1, <4 x i8> %t2, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>563 store <6 x i8> %s, ptr %dst564 ret void565}566 567define void @vst3_v4i8(ptr %src, ptr %dst) {568; CHECK-LABEL: vst3_v4i8:569; CHECK: @ %bb.0: @ %entry570; CHECK-NEXT: .save {r4, r5, r6, lr}571; CHECK-NEXT: push {r4, r5, r6, lr}572; CHECK-NEXT: vldrb.u32 q0, [r0, #4]573; CHECK-NEXT: vldrb.u32 q1, [r0]574; CHECK-NEXT: vmov r2, lr, d0575; CHECK-NEXT: vmov r12, r3, d1576; CHECK-NEXT: vldrb.u32 q0, [r0, #8]577; CHECK-NEXT: vmov r0, r6, d3578; CHECK-NEXT: vmov r4, r5, d1579; CHECK-NEXT: vmov.8 q2[8], r4580; CHECK-NEXT: vmov.8 q2[9], r6581; CHECK-NEXT: vmov.8 q2[10], r3582; CHECK-NEXT: vmov.8 q2[11], r5583; CHECK-NEXT: vmov r3, s10584; CHECK-NEXT: str r3, [r1, #8]585; CHECK-NEXT: vmov r3, r4, d2586; CHECK-NEXT: vmov.16 q1[0], r3587; CHECK-NEXT: vmov r3, r5, d0588; CHECK-NEXT: vmov.16 q1[1], r2589; CHECK-NEXT: vmov.16 q1[2], r3590; CHECK-NEXT: vmov.16 q1[3], r4591; CHECK-NEXT: vmov.16 q1[4], lr592; CHECK-NEXT: vmov.16 q1[5], r5593; CHECK-NEXT: vmov.16 q1[6], r0594; CHECK-NEXT: vmov.16 q1[7], r12595; CHECK-NEXT: vstrb.16 q1, [r1]596; CHECK-NEXT: pop {r4, r5, r6, pc}597entry:598 %l1 = load <4 x i8>, ptr %src, align 4599 %s2 = getelementptr <4 x i8>, ptr %src, i32 1600 %l2 = load <4 x i8>, ptr %s2, align 4601 %s3 = getelementptr <4 x i8>, ptr %src, i32 2602 %l3 = load <4 x i8>, ptr %s3, align 4603 %t1 = shufflevector <4 x i8> %l1, <4 x i8> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>604 %t2 = shufflevector <4 x i8> %l3, <4 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>605 %s = shufflevector <8 x i8> %t1, <8 x i8> %t2, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>606 store <12 x i8> %s, ptr %dst607 ret void608}609 610define void @vst3_v8i8(ptr %src, ptr %dst) {611; CHECK-LABEL: vst3_v8i8:612; CHECK: @ %bb.0: @ %entry613; CHECK-NEXT: .vsave {d8, d9}614; CHECK-NEXT: vpush {d8, d9}615; CHECK-NEXT: vldrb.u16 q2, [r0, #8]616; CHECK-NEXT: vldrb.u16 q1, [r0, #16]617; CHECK-NEXT: vldrb.u16 q3, [r0]618; CHECK-NEXT: vmovx.f16 s2, s6619; CHECK-NEXT: vmovx.f16 s0, s10620; CHECK-NEXT: vins.f16 s0, s2621; CHECK-NEXT: vins.f16 s1, s11622; CHECK-NEXT: vmovx.f16 s2, s7623; CHECK-NEXT: vmovx.f16 s3, s11624; CHECK-NEXT: vins.f16 s3, s2625; CHECK-NEXT: vmovx.f16 s2, s1626; CHECK-NEXT: vmov.f32 s1, s15627; CHECK-NEXT: vmovx.f16 s16, s15628; CHECK-NEXT: vins.f16 s1, s2629; CHECK-NEXT: vmov.f32 s2, s7630; CHECK-NEXT: vmov.u16 r0, q3[0]631; CHECK-NEXT: vins.f16 s2, s16632; CHECK-NEXT: vmov.8 q4[0], r0633; CHECK-NEXT: vmov.u16 r0, q2[0]634; CHECK-NEXT: vmov.8 q4[1], r0635; CHECK-NEXT: vmov.u16 r0, q1[0]636; CHECK-NEXT: vmov.8 q4[2], r0637; CHECK-NEXT: vmov.u16 r0, q3[1]638; CHECK-NEXT: vmov.8 q4[3], r0639; CHECK-NEXT: vmov.u16 r0, q2[1]640; CHECK-NEXT: vmov.8 q4[4], r0641; CHECK-NEXT: vmov.u16 r0, q1[1]642; CHECK-NEXT: vmov.8 q4[5], r0643; CHECK-NEXT: vmov.u16 r0, q3[2]644; CHECK-NEXT: vmov.8 q4[6], r0645; CHECK-NEXT: vmov.u16 r0, q2[2]646; CHECK-NEXT: vmov.8 q4[7], r0647; CHECK-NEXT: vmov.u16 r0, q1[2]648; CHECK-NEXT: vmov.8 q4[8], r0649; CHECK-NEXT: vmov.u16 r0, q3[3]650; CHECK-NEXT: vmov.8 q4[9], r0651; CHECK-NEXT: vmov.u16 r0, q2[3]652; CHECK-NEXT: vmov.8 q4[10], r0653; CHECK-NEXT: vmov.u16 r0, q1[3]654; CHECK-NEXT: vmov.8 q4[11], r0655; CHECK-NEXT: vmov.u16 r0, q3[4]656; CHECK-NEXT: vmov.8 q4[12], r0657; CHECK-NEXT: vmov.u16 r0, q2[4]658; CHECK-NEXT: vmov.8 q4[13], r0659; CHECK-NEXT: vmov.u16 r0, q1[4]660; CHECK-NEXT: vmov.8 q4[14], r0661; CHECK-NEXT: vmov.u16 r0, q3[5]662; CHECK-NEXT: vmov.8 q4[15], r0663; CHECK-NEXT: vstrb.16 q0, [r1, #16]664; CHECK-NEXT: vstrw.32 q4, [r1]665; CHECK-NEXT: vpop {d8, d9}666; CHECK-NEXT: bx lr667entry:668 %l1 = load <8 x i8>, ptr %src, align 4669 %s2 = getelementptr <8 x i8>, ptr %src, i32 1670 %l2 = load <8 x i8>, ptr %s2, align 4671 %s3 = getelementptr <8 x i8>, ptr %src, i32 2672 %l3 = load <8 x i8>, ptr %s3, align 4673 %t1 = shufflevector <8 x i8> %l1, <8 x i8> %l2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>674 %t2 = shufflevector <8 x i8> %l3, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>675 %s = shufflevector <16 x i8> %t1, <16 x i8> %t2, <24 x i32> <i32 0, i32 8, i32 16, i32 1, i32 9, i32 17, i32 2, i32 10, i32 18, i32 3, i32 11, i32 19, i32 4, i32 12, i32 20, i32 5, i32 13, i32 21, i32 6, i32 14, i32 22, i32 7, i32 15, i32 23>676 store <24 x i8> %s, ptr %dst677 ret void678}679 680define void @vst3_v16i8(ptr %src, ptr %dst) {681; CHECK-LABEL: vst3_v16i8:682; CHECK: @ %bb.0: @ %entry683; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13}684; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13}685; CHECK-NEXT: vldrw.u32 q2, [r0, #16]686; CHECK-NEXT: vldrw.u32 q3, [r0]687; CHECK-NEXT: vldrw.u32 q1, [r0, #32]688; CHECK-NEXT: vmov.u8 r2, q2[5]689; CHECK-NEXT: vmov.8 q4[0], r2690; CHECK-NEXT: vmov.u8 r2, q3[6]691; CHECK-NEXT: vmov.8 q4[2], r2692; CHECK-NEXT: vmov.u8 r2, q2[6]693; CHECK-NEXT: vmov.8 q4[3], r2694; CHECK-NEXT: vmov.u8 r2, q3[7]695; CHECK-NEXT: vmov.8 q4[5], r2696; CHECK-NEXT: vmov.u8 r2, q2[7]697; CHECK-NEXT: vmov.8 q4[6], r2698; CHECK-NEXT: vmov.u8 r2, q3[8]699; CHECK-NEXT: vmov.8 q4[8], r2700; CHECK-NEXT: vmov.u8 r2, q2[8]701; CHECK-NEXT: vmov.8 q4[9], r2702; CHECK-NEXT: vmov.u8 r2, q3[9]703; CHECK-NEXT: vmov.8 q4[11], r2704; CHECK-NEXT: vmov.u8 r2, q2[9]705; CHECK-NEXT: vmov.8 q4[12], r2706; CHECK-NEXT: vmov.u8 r2, q3[10]707; CHECK-NEXT: vmov.8 q4[14], r2708; CHECK-NEXT: vmov.u8 r2, q2[10]709; CHECK-NEXT: vmov.8 q4[15], r2710; CHECK-NEXT: vmov.u8 r0, q1[5]711; CHECK-NEXT: vmov.u8 r2, q4[0]712; CHECK-NEXT: vmov.8 q0[0], r2713; CHECK-NEXT: vmov.8 q0[1], r0714; CHECK-NEXT: vmov.u8 r0, q4[2]715; CHECK-NEXT: vmov.8 q0[2], r0716; CHECK-NEXT: vmov.u8 r0, q4[3]717; CHECK-NEXT: vmov.8 q0[3], r0718; CHECK-NEXT: vmov.u8 r0, q1[6]719; CHECK-NEXT: vmov.8 q0[4], r0720; CHECK-NEXT: vmov.u8 r0, q4[5]721; CHECK-NEXT: vmov.8 q0[5], r0722; CHECK-NEXT: vmov.u8 r0, q4[6]723; CHECK-NEXT: vmov.8 q0[6], r0724; CHECK-NEXT: vmov.u8 r0, q1[7]725; CHECK-NEXT: vmov.8 q0[7], r0726; CHECK-NEXT: vmov.u8 r0, q4[8]727; CHECK-NEXT: vmov.8 q0[8], r0728; CHECK-NEXT: vmov.u8 r0, q4[9]729; CHECK-NEXT: vmov.8 q0[9], r0730; CHECK-NEXT: vmov.u8 r0, q1[8]731; CHECK-NEXT: vmov.8 q0[10], r0732; CHECK-NEXT: vmov.u8 r0, q4[11]733; CHECK-NEXT: vmov.8 q0[11], r0734; CHECK-NEXT: vmov.u8 r0, q4[12]735; CHECK-NEXT: vmov.8 q0[12], r0736; CHECK-NEXT: vmov.u8 r0, q1[9]737; CHECK-NEXT: vmov.8 q0[13], r0738; CHECK-NEXT: vmov.u8 r0, q4[14]739; CHECK-NEXT: vmov.8 q0[14], r0740; CHECK-NEXT: vmov.u8 r0, q4[15]741; CHECK-NEXT: vmov.8 q0[15], r0742; CHECK-NEXT: vmov.u8 r0, q3[0]743; CHECK-NEXT: vmov.8 q5[0], r0744; CHECK-NEXT: vmov.u8 r0, q2[0]745; CHECK-NEXT: vmov.8 q5[1], r0746; CHECK-NEXT: vmov.u8 r0, q3[1]747; CHECK-NEXT: vmov.8 q5[3], r0748; CHECK-NEXT: vmov.u8 r0, q2[1]749; CHECK-NEXT: vmov.8 q5[4], r0750; CHECK-NEXT: vmov.u8 r0, q3[2]751; CHECK-NEXT: vmov.8 q5[6], r0752; CHECK-NEXT: vmov.u8 r0, q2[2]753; CHECK-NEXT: vmov.8 q5[7], r0754; CHECK-NEXT: vmov.u8 r0, q3[3]755; CHECK-NEXT: vmov.8 q5[9], r0756; CHECK-NEXT: vmov.u8 r0, q2[3]757; CHECK-NEXT: vmov.8 q5[10], r0758; CHECK-NEXT: vmov.u8 r0, q3[4]759; CHECK-NEXT: vmov.8 q5[12], r0760; CHECK-NEXT: vmov.u8 r0, q2[4]761; CHECK-NEXT: vmov.8 q5[13], r0762; CHECK-NEXT: vmov.u8 r0, q3[5]763; CHECK-NEXT: vmov.8 q5[15], r0764; CHECK-NEXT: vstrw.32 q0, [r1, #16]765; CHECK-NEXT: vmov.u8 r0, q5[0]766; CHECK-NEXT: vmov.8 q4[0], r0767; CHECK-NEXT: vmov.u8 r0, q5[1]768; CHECK-NEXT: vmov.8 q4[1], r0769; CHECK-NEXT: vmov.u8 r0, q1[0]770; CHECK-NEXT: vmov.8 q4[2], r0771; CHECK-NEXT: vmov.u8 r0, q5[3]772; CHECK-NEXT: vmov.8 q4[3], r0773; CHECK-NEXT: vmov.u8 r0, q5[4]774; CHECK-NEXT: vmov.8 q4[4], r0775; CHECK-NEXT: vmov.u8 r0, q1[1]776; CHECK-NEXT: vmov.8 q4[5], r0777; CHECK-NEXT: vmov.u8 r0, q5[6]778; CHECK-NEXT: vmov.8 q4[6], r0779; CHECK-NEXT: vmov.u8 r0, q5[7]780; CHECK-NEXT: vmov.8 q4[7], r0781; CHECK-NEXT: vmov.u8 r0, q1[2]782; CHECK-NEXT: vmov.8 q4[8], r0783; CHECK-NEXT: vmov.u8 r0, q5[9]784; CHECK-NEXT: vmov.8 q4[9], r0785; CHECK-NEXT: vmov.u8 r0, q5[10]786; CHECK-NEXT: vmov.8 q4[10], r0787; CHECK-NEXT: vmov.u8 r0, q1[3]788; CHECK-NEXT: vmov.8 q4[11], r0789; CHECK-NEXT: vmov.u8 r0, q5[12]790; CHECK-NEXT: vmov.8 q4[12], r0791; CHECK-NEXT: vmov.u8 r0, q5[13]792; CHECK-NEXT: vmov.8 q4[13], r0793; CHECK-NEXT: vmov.u8 r0, q1[4]794; CHECK-NEXT: vmov.8 q4[14], r0795; CHECK-NEXT: vmov.u8 r0, q5[15]796; CHECK-NEXT: vmov.8 q4[15], r0797; CHECK-NEXT: vmov.u8 r0, q1[10]798; CHECK-NEXT: vmov.8 q5[0], r0799; CHECK-NEXT: vmov.u8 r0, q3[11]800; CHECK-NEXT: vmov.8 q6[1], r0801; CHECK-NEXT: vmov.u8 r0, q2[11]802; CHECK-NEXT: vmov.8 q6[2], r0803; CHECK-NEXT: vmov.u8 r0, q3[12]804; CHECK-NEXT: vmov.8 q6[4], r0805; CHECK-NEXT: vmov.u8 r0, q2[12]806; CHECK-NEXT: vmov.8 q6[5], r0807; CHECK-NEXT: vmov.u8 r0, q3[13]808; CHECK-NEXT: vmov.8 q6[7], r0809; CHECK-NEXT: vmov.u8 r0, q2[13]810; CHECK-NEXT: vmov.8 q6[8], r0811; CHECK-NEXT: vmov.u8 r0, q3[14]812; CHECK-NEXT: vmov.8 q6[10], r0813; CHECK-NEXT: vmov.u8 r0, q2[14]814; CHECK-NEXT: vmov.8 q6[11], r0815; CHECK-NEXT: vmov.u8 r0, q3[15]816; CHECK-NEXT: vmov.8 q6[13], r0817; CHECK-NEXT: vmov.u8 r0, q2[15]818; CHECK-NEXT: vmov.8 q6[14], r0819; CHECK-NEXT: vstrw.32 q4, [r1]820; CHECK-NEXT: vmov.u8 r0, q6[1]821; CHECK-NEXT: vmov.8 q5[1], r0822; CHECK-NEXT: vmov.u8 r0, q6[2]823; CHECK-NEXT: vmov.8 q5[2], r0824; CHECK-NEXT: vmov.u8 r0, q1[11]825; CHECK-NEXT: vmov.8 q5[3], r0826; CHECK-NEXT: vmov.u8 r0, q6[4]827; CHECK-NEXT: vmov.8 q5[4], r0828; CHECK-NEXT: vmov.u8 r0, q6[5]829; CHECK-NEXT: vmov.8 q5[5], r0830; CHECK-NEXT: vmov.u8 r0, q1[12]831; CHECK-NEXT: vmov.8 q5[6], r0832; CHECK-NEXT: vmov.u8 r0, q6[7]833; CHECK-NEXT: vmov.8 q5[7], r0834; CHECK-NEXT: vmov.u8 r0, q6[8]835; CHECK-NEXT: vmov.8 q5[8], r0836; CHECK-NEXT: vmov.u8 r0, q1[13]837; CHECK-NEXT: vmov.8 q5[9], r0838; CHECK-NEXT: vmov.u8 r0, q6[10]839; CHECK-NEXT: vmov.8 q5[10], r0840; CHECK-NEXT: vmov.u8 r0, q6[11]841; CHECK-NEXT: vmov.8 q5[11], r0842; CHECK-NEXT: vmov.u8 r0, q1[14]843; CHECK-NEXT: vmov.8 q5[12], r0844; CHECK-NEXT: vmov.u8 r0, q6[13]845; CHECK-NEXT: vmov.8 q5[13], r0846; CHECK-NEXT: vmov.u8 r0, q6[14]847; CHECK-NEXT: vmov.8 q5[14], r0848; CHECK-NEXT: vmov.u8 r0, q1[15]849; CHECK-NEXT: vmov.8 q5[15], r0850; CHECK-NEXT: vstrw.32 q5, [r1, #32]851; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13}852; CHECK-NEXT: bx lr853entry:854 %l1 = load <16 x i8>, ptr %src, align 4855 %s2 = getelementptr <16 x i8>, ptr %src, i32 1856 %l2 = load <16 x i8>, ptr %s2, align 4857 %s3 = getelementptr <16 x i8>, ptr %src, i32 2858 %l3 = load <16 x i8>, ptr %s3, align 4859 %t1 = shufflevector <16 x i8> %l1, <16 x i8> %l2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>860 %t2 = shufflevector <16 x i8> %l3, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>861 %s = shufflevector <32 x i8> %t1, <32 x i8> %t2, <48 x i32> <i32 0, i32 16, i32 32, i32 1, i32 17, i32 33, i32 2, i32 18, i32 34, i32 3, i32 19, i32 35, i32 4, i32 20, i32 36, i32 5, i32 21, i32 37, i32 6, i32 22, i32 38, i32 7, i32 23, i32 39, i32 8, i32 24, i32 40, i32 9, i32 25, i32 41, i32 10, i32 26, i32 42, i32 11, i32 27, i32 43, i32 12, i32 28, i32 44, i32 13, i32 29, i32 45, i32 14, i32 30, i32 46, i32 15, i32 31, i32 47>862 store <48 x i8> %s, ptr %dst863 ret void864}865 866; i64867 868define void @vst3_v2i64(ptr %src, ptr %dst) {869; CHECK-LABEL: vst3_v2i64:870; CHECK: @ %bb.0: @ %entry871; CHECK-NEXT: vldrw.u32 q0, [r0]872; CHECK-NEXT: vldrw.u32 q1, [r0, #32]873; CHECK-NEXT: vldrw.u32 q2, [r0, #16]874; CHECK-NEXT: vmov.f64 d6, d2875; CHECK-NEXT: vmov.f64 d7, d1876; CHECK-NEXT: vmov.f64 d1, d4877; CHECK-NEXT: vstrw.32 q3, [r1, #16]878; CHECK-NEXT: vmov.f64 d2, d5879; CHECK-NEXT: vstrw.32 q0, [r1]880; CHECK-NEXT: vstrw.32 q1, [r1, #32]881; CHECK-NEXT: bx lr882entry:883 %l1 = load <2 x i64>, ptr %src, align 4884 %s2 = getelementptr <2 x i64>, ptr %src, i32 1885 %l2 = load <2 x i64>, ptr %s2, align 4886 %s3 = getelementptr <2 x i64>, ptr %src, i32 2887 %l3 = load <2 x i64>, ptr %s3, align 4888 %t1 = shufflevector <2 x i64> %l1, <2 x i64> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>889 %t2 = shufflevector <2 x i64> %l3, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>890 %s = shufflevector <4 x i64> %t1, <4 x i64> %t2, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>891 store <6 x i64> %s, ptr %dst892 ret void893}894 895define void @vst3_v4i64(ptr %src, ptr %dst) {896; CHECK-LABEL: vst3_v4i64:897; CHECK: @ %bb.0: @ %entry898; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}899; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}900; CHECK-NEXT: vldrw.u32 q6, [r0, #48]901; CHECK-NEXT: vldrw.u32 q7, [r0, #32]902; CHECK-NEXT: vldrw.u32 q0, [r0, #80]903; CHECK-NEXT: vldrw.u32 q2, [r0]904; CHECK-NEXT: vmov.f64 d2, d13905; CHECK-NEXT: vldrw.u32 q3, [r0, #16]906; CHECK-NEXT: vldrw.u32 q4, [r0, #64]907; CHECK-NEXT: vmov.f64 d13, d15908; CHECK-NEXT: vmov.f64 d3, d1909; CHECK-NEXT: vmov.f64 d10, d4910; CHECK-NEXT: vstrw.32 q1, [r1, #80]911; CHECK-NEXT: vmov.f64 d11, d14912; CHECK-NEXT: vmov.f64 d4, d8913; CHECK-NEXT: vstrw.32 q5, [r1]914; CHECK-NEXT: vmov.f64 d1, d7915; CHECK-NEXT: vstrw.32 q2, [r1, #16]916; CHECK-NEXT: vmov.f64 d8, d13917; CHECK-NEXT: vstrw.32 q0, [r1, #64]918; CHECK-NEXT: vmov.f64 d14, d6919; CHECK-NEXT: vstrw.32 q4, [r1, #32]920; CHECK-NEXT: vmov.f64 d15, d12921; CHECK-NEXT: vstrw.32 q7, [r1, #48]922; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}923; CHECK-NEXT: bx lr924entry:925 %l1 = load <4 x i64>, ptr %src, align 4926 %s2 = getelementptr <4 x i64>, ptr %src, i32 1927 %l2 = load <4 x i64>, ptr %s2, align 4928 %s3 = getelementptr <4 x i64>, ptr %src, i32 2929 %l3 = load <4 x i64>, ptr %s3, align 4930 %t1 = shufflevector <4 x i64> %l1, <4 x i64> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>931 %t2 = shufflevector <4 x i64> %l3, <4 x i64> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>932 %s = shufflevector <8 x i64> %t1, <8 x i64> %t2, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>933 store <12 x i64> %s, ptr %dst934 ret void935}936 937; f32938 939define void @vst3_v2f32(ptr %src, ptr %dst) {940; CHECK-LABEL: vst3_v2f32:941; CHECK: @ %bb.0: @ %entry942; CHECK-NEXT: ldr r2, [r0, #20]943; CHECK-NEXT: vldr s0, [r0]944; CHECK-NEXT: vldr s3, [r0, #4]945; CHECK-NEXT: vldr s1, [r0, #8]946; CHECK-NEXT: vldr s2, [r0, #16]947; CHECK-NEXT: ldr r0, [r0, #12]948; CHECK-NEXT: strd r0, r2, [r1, #16]949; CHECK-NEXT: vstrw.32 q0, [r1]950; CHECK-NEXT: bx lr951entry:952 %l1 = load <2 x float>, ptr %src, align 4953 %s2 = getelementptr <2 x float>, ptr %src, i32 1954 %l2 = load <2 x float>, ptr %s2, align 4955 %s3 = getelementptr <2 x float>, ptr %src, i32 2956 %l3 = load <2 x float>, ptr %s3, align 4957 %t1 = shufflevector <2 x float> %l1, <2 x float> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>958 %t2 = shufflevector <2 x float> %l3, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>959 %s = shufflevector <4 x float> %t1, <4 x float> %t2, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>960 store <6 x float> %s, ptr %dst961 ret void962}963 964define void @vst3_v4f32(ptr %src, ptr %dst) {965; CHECK-LABEL: vst3_v4f32:966; CHECK: @ %bb.0: @ %entry967; CHECK-NEXT: .vsave {d8, d9}968; CHECK-NEXT: vpush {d8, d9}969; CHECK-NEXT: vldrw.u32 q0, [r0, #16]970; CHECK-NEXT: vldrw.u32 q2, [r0]971; CHECK-NEXT: vldrw.u32 q1, [r0, #32]972; CHECK-NEXT: vmov.f32 s12, s1973; CHECK-NEXT: vmov.f32 s13, s5974; CHECK-NEXT: vmov.f32 s18, s4975; CHECK-NEXT: vmov.f32 s4, s6976; CHECK-NEXT: vmov.f32 s14, s10977; CHECK-NEXT: vmov.f32 s15, s2978; CHECK-NEXT: vmov.f32 s16, s8979; CHECK-NEXT: vstrw.32 q3, [r1, #16]980; CHECK-NEXT: vmov.f32 s17, s0981; CHECK-NEXT: vmov.f32 s19, s9982; CHECK-NEXT: vmov.f32 s5, s11983; CHECK-NEXT: vstrw.32 q4, [r1]984; CHECK-NEXT: vmov.f32 s6, s3985; CHECK-NEXT: vstrw.32 q1, [r1, #32]986; CHECK-NEXT: vpop {d8, d9}987; CHECK-NEXT: bx lr988entry:989 %l1 = load <4 x float>, ptr %src, align 4990 %s2 = getelementptr <4 x float>, ptr %src, i32 1991 %l2 = load <4 x float>, ptr %s2, align 4992 %s3 = getelementptr <4 x float>, ptr %src, i32 2993 %l3 = load <4 x float>, ptr %s3, align 4994 %t1 = shufflevector <4 x float> %l1, <4 x float> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>995 %t2 = shufflevector <4 x float> %l3, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>996 %s = shufflevector <8 x float> %t1, <8 x float> %t2, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>997 store <12 x float> %s, ptr %dst998 ret void999}1000 1001define void @vst3_v8f32(ptr %src, ptr %dst) {1002; CHECK-LABEL: vst3_v8f32:1003; CHECK: @ %bb.0: @ %entry1004; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1005; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}1006; CHECK-NEXT: .pad #321007; CHECK-NEXT: sub sp, #321008; CHECK-NEXT: vldrw.u32 q0, [r0, #80]1009; CHECK-NEXT: vldrw.u32 q3, [r0, #48]1010; CHECK-NEXT: vldrw.u32 q2, [r0, #16]1011; CHECK-NEXT: vldrw.u32 q1, [r0]1012; CHECK-NEXT: vstrw.32 q0, [sp, #16] @ 16-byte Spill1013; CHECK-NEXT: vmov.f32 s0, s21014; CHECK-NEXT: vldrw.u32 q6, [sp, #16] @ 16-byte Reload1015; CHECK-NEXT: vmov.f32 s1, s111016; CHECK-NEXT: vmov.f32 s2, s151017; CHECK-NEXT: vldrw.u32 q7, [r0, #64]1018; CHECK-NEXT: vstrw.32 q0, [sp] @ 16-byte Spill1019; CHECK-NEXT: vldrw.u32 q4, [r0, #32]1020; CHECK-NEXT: vmov.f32 s0, s81021; CHECK-NEXT: vmov.f32 s1, s121022; CHECK-NEXT: vmov.f32 s3, s91023; CHECK-NEXT: vmov.f32 s2, s241024; CHECK-NEXT: vstrw.32 q0, [r1, #48]1025; CHECK-NEXT: vldrw.u32 q0, [sp] @ 16-byte Reload1026; CHECK-NEXT: vmov.f32 s20, s41027; CHECK-NEXT: vmov.f32 s23, s51028; CHECK-NEXT: vstrw.32 q0, [r1, #80]1029; CHECK-NEXT: vmov.f32 s8, s131030; CHECK-NEXT: vmov.f32 s11, s141031; CHECK-NEXT: vmov.f32 s9, s251032; CHECK-NEXT: vmov.f32 s13, s71033; CHECK-NEXT: vstrw.32 q2, [r1, #64]1034; CHECK-NEXT: vmov.f32 s21, s161035; CHECK-NEXT: vmov.f32 s22, s281036; CHECK-NEXT: vmov.f32 s12, s301037; CHECK-NEXT: vstrw.32 q5, [r1]1038; CHECK-NEXT: vmov.f32 s14, s191039; CHECK-NEXT: vmov.f32 s15, s311040; CHECK-NEXT: vmov.f32 s4, s171041; CHECK-NEXT: vstrw.32 q3, [r1, #32]1042; CHECK-NEXT: vmov.f32 s7, s181043; CHECK-NEXT: vmov.f32 s5, s291044; CHECK-NEXT: vstrw.32 q1, [r1, #16]1045; CHECK-NEXT: add sp, #321046; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}1047; CHECK-NEXT: bx lr1048entry:1049 %l1 = load <8 x float>, ptr %src, align 41050 %s2 = getelementptr <8 x float>, ptr %src, i32 11051 %l2 = load <8 x float>, ptr %s2, align 41052 %s3 = getelementptr <8 x float>, ptr %src, i32 21053 %l3 = load <8 x float>, ptr %s3, align 41054 %t1 = shufflevector <8 x float> %l1, <8 x float> %l2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>1055 %t2 = shufflevector <8 x float> %l3, <8 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>1056 %s = shufflevector <16 x float> %t1, <16 x float> %t2, <24 x i32> <i32 0, i32 8, i32 16, i32 1, i32 9, i32 17, i32 2, i32 10, i32 18, i32 3, i32 11, i32 19, i32 4, i32 12, i32 20, i32 5, i32 13, i32 21, i32 6, i32 14, i32 22, i32 7, i32 15, i32 23>1057 store <24 x float> %s, ptr %dst1058 ret void1059}1060 1061define void @vst3_v16f32(ptr %src, ptr %dst) {1062; CHECK-LABEL: vst3_v16f32:1063; CHECK: @ %bb.0: @ %entry1064; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1065; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}1066; CHECK-NEXT: .pad #1281067; CHECK-NEXT: sub sp, #1281068; CHECK-NEXT: vldrw.u32 q3, [r0, #176]1069; CHECK-NEXT: vldrw.u32 q2, [r0, #64]1070; CHECK-NEXT: vldrw.u32 q1, [r0]1071; CHECK-NEXT: vldrw.u32 q0, [r0, #128]1072; CHECK-NEXT: vstrw.32 q3, [sp, #112] @ 16-byte Spill1073; CHECK-NEXT: vldrw.u32 q3, [r0, #160]1074; CHECK-NEXT: vmov.f32 s24, s91075; CHECK-NEXT: vldrw.u32 q5, [r0, #144]1076; CHECK-NEXT: vstrw.32 q3, [sp, #96] @ 16-byte Spill1077; CHECK-NEXT: vldrw.u32 q3, [r0, #96]1078; CHECK-NEXT: vmov.f32 s26, s61079; CHECK-NEXT: vldrw.u32 q7, [r0, #112]1080; CHECK-NEXT: vstrw.32 q3, [sp, #32] @ 16-byte Spill1081; CHECK-NEXT: vldrw.u32 q3, [r0, #80]1082; CHECK-NEXT: vmov.f32 s27, s101083; CHECK-NEXT: vldrw.u32 q4, [r0, #48]1084; CHECK-NEXT: vstrw.32 q3, [sp, #48] @ 16-byte Spill1085; CHECK-NEXT: vldrw.u32 q3, [r0, #32]1086; CHECK-NEXT: vmov.f32 s25, s11087; CHECK-NEXT: vstrw.32 q3, [sp, #16] @ 16-byte Spill1088; CHECK-NEXT: vldrw.u32 q3, [r0, #16]1089; CHECK-NEXT: vstrw.32 q6, [r1, #16]1090; CHECK-NEXT: vmov.f32 s24, s21091; CHECK-NEXT: vstrw.32 q3, [sp, #80] @ 16-byte Spill1092; CHECK-NEXT: vmov.f32 s27, s31093; CHECK-NEXT: vmov.f32 s14, s01094; CHECK-NEXT: vldrw.u32 q0, [sp, #112] @ 16-byte Reload1095; CHECK-NEXT: vmov.f32 s12, s41096; CHECK-NEXT: vmov.f32 s15, s51097; CHECK-NEXT: vmov.f32 s13, s81098; CHECK-NEXT: vstrw.32 q3, [sp, #64] @ 16-byte Spill1099; CHECK-NEXT: vmov.f32 s25, s71100; CHECK-NEXT: vmov.f32 s6, s01101; CHECK-NEXT: vmov.f32 s13, s11102; CHECK-NEXT: vmov.f32 s0, s21103; CHECK-NEXT: vmov.f32 s4, s161104; CHECK-NEXT: vmov.f32 s5, s281105; CHECK-NEXT: vmov.f32 s7, s171106; CHECK-NEXT: vmov.f32 s1, s191107; CHECK-NEXT: vstrw.32 q1, [sp] @ 16-byte Spill1108; CHECK-NEXT: vmov.f32 s2, s311109; CHECK-NEXT: vldrw.u32 q1, [sp, #32] @ 16-byte Reload1110; CHECK-NEXT: vmov.f32 s26, s111111; CHECK-NEXT: vldrw.u32 q2, [sp, #16] @ 16-byte Reload1112; CHECK-NEXT: vstrw.32 q0, [sp, #112] @ 16-byte Spill1113; CHECK-NEXT: vldrw.u32 q0, [sp, #96] @ 16-byte Reload1114; CHECK-NEXT: vmov.f32 s15, s301115; CHECK-NEXT: vstrw.32 q6, [r1, #32]1116; CHECK-NEXT: vmov.f32 s17, s11117; CHECK-NEXT: vldrw.u32 q6, [sp, #80] @ 16-byte Reload1118; CHECK-NEXT: vmov.f32 s30, s01119; CHECK-NEXT: vmov.f32 s0, s21120; CHECK-NEXT: vmov.f32 s1, s111121; CHECK-NEXT: vmov.f32 s2, s71122; CHECK-NEXT: vmov.f32 s14, s181123; CHECK-NEXT: vstrw.32 q0, [sp, #96] @ 16-byte Spill1124; CHECK-NEXT: vmov.f32 s18, s101125; CHECK-NEXT: vldrw.u32 q0, [sp, #48] @ 16-byte Reload1126; CHECK-NEXT: vmov.f32 s28, s81127; CHECK-NEXT: vmov.f32 s31, s91128; CHECK-NEXT: vldrw.u32 q2, [sp, #80] @ 16-byte Reload1129; CHECK-NEXT: vmov.f32 s12, s291130; CHECK-NEXT: vmov.f32 s29, s41131; CHECK-NEXT: vstrw.32 q3, [r1, #160]1132; CHECK-NEXT: vmov.f32 s16, s51133; CHECK-NEXT: vstrw.32 q7, [r1, #96]1134; CHECK-NEXT: vmov.f32 s19, s61135; CHECK-NEXT: vmov.f32 s4, s81136; CHECK-NEXT: vstrw.32 q4, [r1, #112]1137; CHECK-NEXT: vmov.f32 s6, s201138; CHECK-NEXT: vmov.f32 s20, s221139; CHECK-NEXT: vmov.f32 s5, s01140; CHECK-NEXT: vmov.f32 s8, s11141; CHECK-NEXT: vmov.f32 s11, s21142; CHECK-NEXT: vmov.f32 s22, s31143; CHECK-NEXT: vldrw.u32 q0, [sp, #96] @ 16-byte Reload1144; CHECK-NEXT: vmov.f32 s7, s91145; CHECK-NEXT: vstrw.32 q0, [r1, #128]1146; CHECK-NEXT: vldrw.u32 q0, [sp] @ 16-byte Reload1147; CHECK-NEXT: vmov.f32 s9, s211148; CHECK-NEXT: vstrw.32 q1, [r1, #48]1149; CHECK-NEXT: vstrw.32 q0, [r1, #144]1150; CHECK-NEXT: vldrw.u32 q0, [sp, #112] @ 16-byte Reload1151; CHECK-NEXT: vmov.f32 s21, s271152; CHECK-NEXT: vstrw.32 q2, [r1, #64]1153; CHECK-NEXT: vstrw.32 q0, [r1, #176]1154; CHECK-NEXT: vldrw.u32 q0, [sp, #64] @ 16-byte Reload1155; CHECK-NEXT: vstrw.32 q5, [r1, #80]1156; CHECK-NEXT: vstrw.32 q0, [r1]1157; CHECK-NEXT: add sp, #1281158; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}1159; CHECK-NEXT: bx lr1160entry:1161 %l1 = load <16 x float>, ptr %src, align 41162 %s2 = getelementptr <16 x float>, ptr %src, i32 11163 %l2 = load <16 x float>, ptr %s2, align 41164 %s3 = getelementptr <16 x float>, ptr %src, i32 21165 %l3 = load <16 x float>, ptr %s3, align 41166 %t1 = shufflevector <16 x float> %l1, <16 x float> %l2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1167 %t2 = shufflevector <16 x float> %l3, <16 x float> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>1168 %s = shufflevector <32 x float> %t1, <32 x float> %t2, <48 x i32> <i32 0, i32 16, i32 32, i32 1, i32 17, i32 33, i32 2, i32 18, i32 34, i32 3, i32 19, i32 35, i32 4, i32 20, i32 36, i32 5, i32 21, i32 37, i32 6, i32 22, i32 38, i32 7, i32 23, i32 39, i32 8, i32 24, i32 40, i32 9, i32 25, i32 41, i32 10, i32 26, i32 42, i32 11, i32 27, i32 43, i32 12, i32 28, i32 44, i32 13, i32 29, i32 45, i32 14, i32 30, i32 46, i32 15, i32 31, i32 47>1169 store <48 x float> %s, ptr %dst1170 ret void1171}1172 1173; f161174 1175define void @vst3_v2f16(ptr %src, ptr %dst) {1176; CHECK-LABEL: vst3_v2f16:1177; CHECK: @ %bb.0: @ %entry1178; CHECK-NEXT: ldrd r2, r3, [r0]1179; CHECK-NEXT: ldr r0, [r0, #8]1180; CHECK-NEXT: vmov.32 q1[0], r21181; CHECK-NEXT: vmov q0, q11182; CHECK-NEXT: vmov.32 q2[0], r01183; CHECK-NEXT: vmov.32 q0[1], r31184; CHECK-NEXT: vmovx.f16 s2, s41185; CHECK-NEXT: vmov.f32 s0, s41186; CHECK-NEXT: vmovx.f16 s4, s81187; CHECK-NEXT: vins.f16 s8, s21188; CHECK-NEXT: vmovx.f16 s2, s11189; CHECK-NEXT: vins.f16 s0, s11190; CHECK-NEXT: vmov.f32 s1, s81191; CHECK-NEXT: vins.f16 s2, s41192; CHECK-NEXT: vmov r3, s21193; CHECK-NEXT: vmov r0, r2, d01194; CHECK-NEXT: stm r1!, {r0, r2, r3}1195; CHECK-NEXT: bx lr1196entry:1197 %l1 = load <2 x half>, ptr %src, align 41198 %s2 = getelementptr <2 x half>, ptr %src, i32 11199 %l2 = load <2 x half>, ptr %s2, align 41200 %s3 = getelementptr <2 x half>, ptr %src, i32 21201 %l3 = load <2 x half>, ptr %s3, align 41202 %t1 = shufflevector <2 x half> %l1, <2 x half> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>1203 %t2 = shufflevector <2 x half> %l3, <2 x half> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>1204 %s = shufflevector <4 x half> %t1, <4 x half> %t2, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>1205 store <6 x half> %s, ptr %dst1206 ret void1207}1208 1209define void @vst3_v4f16(ptr %src, ptr %dst) {1210; CHECK-LABEL: vst3_v4f16:1211; CHECK: @ %bb.0: @ %entry1212; CHECK-NEXT: .save {r4, lr}1213; CHECK-NEXT: push {r4, lr}1214; CHECK-NEXT: ldrd lr, r12, [r0]1215; CHECK-NEXT: ldrd r3, r2, [r0, #8]1216; CHECK-NEXT: ldrd r4, r0, [r0, #16]1217; CHECK-NEXT: vmov q0[2], q0[0], lr, r31218; CHECK-NEXT: vmov.32 q2[0], r41219; CHECK-NEXT: vmov q0[3], q0[1], r12, r21220; CHECK-NEXT: vmov q1, q21221; CHECK-NEXT: vmovx.f16 s9, s31222; CHECK-NEXT: vmov.32 q1[1], r01223; CHECK-NEXT: vmovx.f16 s4, s01224; CHECK-NEXT: vmov.f32 s6, s81225; CHECK-NEXT: vins.f16 s0, s21226; CHECK-NEXT: vins.f16 s6, s41227; CHECK-NEXT: vmovx.f16 s4, s81228; CHECK-NEXT: vmovx.f16 s2, s21229; CHECK-NEXT: vins.f16 s2, s41230; CHECK-NEXT: vmovx.f16 s4, s11231; CHECK-NEXT: vmovx.f16 s8, s51232; CHECK-NEXT: vins.f16 s5, s41233; CHECK-NEXT: vins.f16 s9, s81234; CHECK-NEXT: vmov.f32 s8, s51235; CHECK-NEXT: vins.f16 s1, s31236; CHECK-NEXT: vmov r0, r2, d41237; CHECK-NEXT: vmov q2, q01238; CHECK-NEXT: vmov.f32 s9, s61239; CHECK-NEXT: vmov.f32 s10, s21240; CHECK-NEXT: vmov.f32 s11, s11241; CHECK-NEXT: vstrw.32 q2, [r1]1242; CHECK-NEXT: strd r0, r2, [r1, #16]1243; CHECK-NEXT: pop {r4, pc}1244entry:1245 %l1 = load <4 x half>, ptr %src, align 41246 %s2 = getelementptr <4 x half>, ptr %src, i32 11247 %l2 = load <4 x half>, ptr %s2, align 41248 %s3 = getelementptr <4 x half>, ptr %src, i32 21249 %l3 = load <4 x half>, ptr %s3, align 41250 %t1 = shufflevector <4 x half> %l1, <4 x half> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1251 %t2 = shufflevector <4 x half> %l3, <4 x half> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>1252 %s = shufflevector <8 x half> %t1, <8 x half> %t2, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>1253 store <12 x half> %s, ptr %dst1254 ret void1255}1256 1257define void @vst3_v8f16(ptr %src, ptr %dst) {1258; CHECK-LABEL: vst3_v8f16:1259; CHECK: @ %bb.0: @ %entry1260; CHECK-NEXT: .vsave {d8, d9}1261; CHECK-NEXT: vpush {d8, d9}1262; CHECK-NEXT: vldrw.u32 q3, [r0, #16]1263; CHECK-NEXT: vldrw.u32 q1, [r0]1264; CHECK-NEXT: vmovx.f16 s0, s141265; CHECK-NEXT: vmov.f32 s8, s71266; CHECK-NEXT: vmov r2, s01267; CHECK-NEXT: vins.f16 s8, s151268; CHECK-NEXT: vmov.16 q0[0], r21269; CHECK-NEXT: vmov.f32 s16, s41270; CHECK-NEXT: vmov.f32 s1, s81271; CHECK-NEXT: vmovx.f16 s8, s151272; CHECK-NEXT: vmov r2, s81273; CHECK-NEXT: vldrw.u32 q2, [r0, #32]1274; CHECK-NEXT: vmov.16 q0[6], r21275; CHECK-NEXT: vins.f16 s16, s121276; CHECK-NEXT: vmovx.f16 s2, s101277; CHECK-NEXT: vins.f16 s0, s21278; CHECK-NEXT: vmovx.f16 s2, s71279; CHECK-NEXT: vmovx.f16 s7, s111280; CHECK-NEXT: vins.f16 s11, s21281; CHECK-NEXT: vmovx.f16 s2, s121282; CHECK-NEXT: vins.f16 s3, s71283; CHECK-NEXT: vmov r0, s21284; CHECK-NEXT: vmovx.f16 s2, s41285; CHECK-NEXT: vmovx.f16 s4, s81286; CHECK-NEXT: vmov.16 q4[4], r01287; CHECK-NEXT: vins.f16 s8, s21288; CHECK-NEXT: vmovx.f16 s2, s131289; CHECK-NEXT: vmov.f32 s7, s51290; CHECK-NEXT: vins.f16 s18, s41291; CHECK-NEXT: vmov.f32 s4, s61292; CHECK-NEXT: vins.f16 s7, s131293; CHECK-NEXT: vmov r0, s21294; CHECK-NEXT: vins.f16 s4, s141295; CHECK-NEXT: vmov.16 q3[2], r01296; CHECK-NEXT: vmovx.f16 s2, s51297; CHECK-NEXT: vmovx.f16 s12, s91298; CHECK-NEXT: vins.f16 s9, s21299; CHECK-NEXT: vmovx.f16 s2, s61300; CHECK-NEXT: vins.f16 s13, s121301; CHECK-NEXT: vins.f16 s10, s21302; CHECK-NEXT: vmov.f32 s2, s111303; CHECK-NEXT: vmov.f32 s12, s91304; CHECK-NEXT: vstrw.32 q0, [r1, #32]1305; CHECK-NEXT: vmov.f32 s14, s41306; CHECK-NEXT: vmov.f32 s15, s101307; CHECK-NEXT: vmov.f32 s17, s81308; CHECK-NEXT: vstrw.32 q3, [r1, #16]1309; CHECK-NEXT: vmov.f32 s19, s71310; CHECK-NEXT: vstrw.32 q4, [r1]1311; CHECK-NEXT: vpop {d8, d9}1312; CHECK-NEXT: bx lr1313entry:1314 %l1 = load <8 x half>, ptr %src, align 41315 %s2 = getelementptr <8 x half>, ptr %src, i32 11316 %l2 = load <8 x half>, ptr %s2, align 41317 %s3 = getelementptr <8 x half>, ptr %src, i32 21318 %l3 = load <8 x half>, ptr %s3, align 41319 %t1 = shufflevector <8 x half> %l1, <8 x half> %l2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>1320 %t2 = shufflevector <8 x half> %l3, <8 x half> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>1321 %s = shufflevector <16 x half> %t1, <16 x half> %t2, <24 x i32> <i32 0, i32 8, i32 16, i32 1, i32 9, i32 17, i32 2, i32 10, i32 18, i32 3, i32 11, i32 19, i32 4, i32 12, i32 20, i32 5, i32 13, i32 21, i32 6, i32 14, i32 22, i32 7, i32 15, i32 23>1322 store <24 x half> %s, ptr %dst1323 ret void1324}1325 1326define void @vst3_v16f16(ptr %src, ptr %dst) {1327; CHECK-LABEL: vst3_v16f16:1328; CHECK: @ %bb.0: @ %entry1329; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1330; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}1331; CHECK-NEXT: .pad #721332; CHECK-NEXT: sub sp, #721333; CHECK-NEXT: vldrw.u32 q5, [r0, #16]1334; CHECK-NEXT: vldrw.u32 q1, [r0, #48]1335; CHECK-NEXT: vldrw.u32 q2, [r0, #80]1336; CHECK-NEXT: vldrw.u32 q7, [r0]1337; CHECK-NEXT: vmov.f32 s0, s201338; CHECK-NEXT: vldrw.u32 q6, [r0, #32]1339; CHECK-NEXT: vins.f16 s0, s41340; CHECK-NEXT: vmovx.f16 s2, s81341; CHECK-NEXT: vmov.f32 s12, s01342; CHECK-NEXT: vldrw.u32 q4, [r0, #64]1343; CHECK-NEXT: vmov.f32 s0, s211344; CHECK-NEXT: vstrw.32 q7, [sp, #8] @ 16-byte Spill1345; CHECK-NEXT: vins.f16 s0, s51346; CHECK-NEXT: vstr s0, [sp, #68] @ 4-byte Spill1347; CHECK-NEXT: vmovx.f16 s0, s41348; CHECK-NEXT: vmov r2, s01349; CHECK-NEXT: vmovx.f16 s0, s201350; CHECK-NEXT: vmov.16 q3[4], r21351; CHECK-NEXT: vins.f16 s8, s01352; CHECK-NEXT: vmov.f32 s0, s291353; CHECK-NEXT: vins.f16 s14, s21354; CHECK-NEXT: vins.f16 s0, s251355; CHECK-NEXT: vstrw.32 q3, [sp, #48] @ 16-byte Spill1356; CHECK-NEXT: vmov.f32 s12, s281357; CHECK-NEXT: vstr s0, [sp, #4] @ 4-byte Spill1358; CHECK-NEXT: vmovx.f16 s0, s241359; CHECK-NEXT: vins.f16 s12, s241360; CHECK-NEXT: vmov r2, s01361; CHECK-NEXT: vmovx.f16 s2, s161362; CHECK-NEXT: vmov.16 q3[4], r21363; CHECK-NEXT: vmovx.f16 s0, s281364; CHECK-NEXT: vins.f16 s14, s21365; CHECK-NEXT: vmovx.f16 s2, s261366; CHECK-NEXT: vins.f16 s16, s01367; CHECK-NEXT: vmov.f32 s0, s311368; CHECK-NEXT: vmov r0, s21369; CHECK-NEXT: vstrw.32 q3, [sp, #32] @ 16-byte Spill1370; CHECK-NEXT: vins.f16 s0, s271371; CHECK-NEXT: vmov.16 q3[0], r01372; CHECK-NEXT: vmov.f32 s13, s01373; CHECK-NEXT: vmovx.f16 s0, s271374; CHECK-NEXT: vmov r0, s01375; CHECK-NEXT: vmovx.f16 s0, s181376; CHECK-NEXT: vmov.16 q3[6], r01377; CHECK-NEXT: vmovx.f16 s2, s191378; CHECK-NEXT: vins.f16 s12, s01379; CHECK-NEXT: vmovx.f16 s0, s311380; CHECK-NEXT: vins.f16 s19, s01381; CHECK-NEXT: vmovx.f16 s0, s61382; CHECK-NEXT: vmov.f32 s4, s231383; CHECK-NEXT: vins.f16 s15, s21384; CHECK-NEXT: vmov r0, s01385; CHECK-NEXT: vins.f16 s4, s71386; CHECK-NEXT: vmov.16 q0[0], r01387; CHECK-NEXT: vldrw.u32 q7, [sp, #32] @ 16-byte Reload1388; CHECK-NEXT: vmov.f32 s1, s41389; CHECK-NEXT: vmovx.f16 s4, s71390; CHECK-NEXT: vmov r0, s41391; CHECK-NEXT: vmovx.f16 s4, s111392; CHECK-NEXT: vmov.16 q0[6], r01393; CHECK-NEXT: vldr s31, [sp, #4] @ 4-byte Reload1394; CHECK-NEXT: vmovx.f16 s2, s101395; CHECK-NEXT: vins.f16 s3, s41396; CHECK-NEXT: vins.f16 s0, s21397; CHECK-NEXT: vmovx.f16 s2, s231398; CHECK-NEXT: vins.f16 s11, s21399; CHECK-NEXT: vmov.f32 s2, s221400; CHECK-NEXT: vins.f16 s2, s61401; CHECK-NEXT: vmov.f32 s29, s161402; CHECK-NEXT: vstr s2, [sp, #28] @ 4-byte Spill1403; CHECK-NEXT: vmovx.f16 s2, s51404; CHECK-NEXT: vmov r0, s21405; CHECK-NEXT: vstrw.32 q7, [r1]1406; CHECK-NEXT: vmov.16 q1[2], r01407; CHECK-NEXT: vmov.f32 s2, s111408; CHECK-NEXT: vmovx.f16 s4, s211409; CHECK-NEXT: vmovx.f16 s6, s91410; CHECK-NEXT: vins.f16 s9, s41411; CHECK-NEXT: vmovx.f16 s4, s221412; CHECK-NEXT: vldrw.u32 q5, [sp, #8] @ 16-byte Reload1413; CHECK-NEXT: vins.f16 s10, s41414; CHECK-NEXT: vmovx.f16 s4, s251415; CHECK-NEXT: vins.f16 s5, s61416; CHECK-NEXT: vmov.f32 s11, s221417; CHECK-NEXT: vmovx.f16 s6, s171418; CHECK-NEXT: vmov r0, s41419; CHECK-NEXT: vmovx.f16 s4, s211420; CHECK-NEXT: vins.f16 s11, s261421; CHECK-NEXT: vmov.16 q6[2], r01422; CHECK-NEXT: vins.f16 s17, s41423; CHECK-NEXT: vmovx.f16 s4, s221424; CHECK-NEXT: vldrw.u32 q5, [sp, #48] @ 16-byte Reload1425; CHECK-NEXT: vins.f16 s18, s41426; CHECK-NEXT: vins.f16 s25, s61427; CHECK-NEXT: vldr s23, [sp, #68] @ 4-byte Reload1428; CHECK-NEXT: vldr s6, [sp, #28] @ 4-byte Reload1429; CHECK-NEXT: vmov.f32 s14, s191430; CHECK-NEXT: vmov.f32 s21, s81431; CHECK-NEXT: vstrw.32 q3, [r1, #32]1432; CHECK-NEXT: vmov.f32 s4, s91433; CHECK-NEXT: vstrw.32 q5, [r1, #48]1434; CHECK-NEXT: vmov.f32 s7, s101435; CHECK-NEXT: vstrw.32 q0, [r1, #80]1436; CHECK-NEXT: vmov.f32 s24, s171437; CHECK-NEXT: vstrw.32 q1, [r1, #64]1438; CHECK-NEXT: vmov.f32 s26, s111439; CHECK-NEXT: vmov.f32 s27, s181440; CHECK-NEXT: vstrw.32 q6, [r1, #16]1441; CHECK-NEXT: add sp, #721442; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}1443; CHECK-NEXT: bx lr1444entry:1445 %l1 = load <16 x half>, ptr %src, align 41446 %s2 = getelementptr <16 x half>, ptr %src, i32 11447 %l2 = load <16 x half>, ptr %s2, align 41448 %s3 = getelementptr <16 x half>, ptr %src, i32 21449 %l3 = load <16 x half>, ptr %s3, align 41450 %t1 = shufflevector <16 x half> %l1, <16 x half> %l2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>1451 %t2 = shufflevector <16 x half> %l3, <16 x half> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>1452 %s = shufflevector <32 x half> %t1, <32 x half> %t2, <48 x i32> <i32 0, i32 16, i32 32, i32 1, i32 17, i32 33, i32 2, i32 18, i32 34, i32 3, i32 19, i32 35, i32 4, i32 20, i32 36, i32 5, i32 21, i32 37, i32 6, i32 22, i32 38, i32 7, i32 23, i32 39, i32 8, i32 24, i32 40, i32 9, i32 25, i32 41, i32 10, i32 26, i32 42, i32 11, i32 27, i32 43, i32 12, i32 28, i32 44, i32 13, i32 29, i32 45, i32 14, i32 30, i32 46, i32 15, i32 31, i32 47>1453 store <48 x half> %s, ptr %dst1454 ret void1455}1456 1457; f641458 1459define void @vst3_v2f64(ptr %src, ptr %dst) {1460; CHECK-LABEL: vst3_v2f64:1461; CHECK: @ %bb.0: @ %entry1462; CHECK-NEXT: vldrw.u32 q0, [r0]1463; CHECK-NEXT: vldrw.u32 q1, [r0, #32]1464; CHECK-NEXT: vldrw.u32 q2, [r0, #16]1465; CHECK-NEXT: vmov.f64 d6, d21466; CHECK-NEXT: vmov.f64 d7, d11467; CHECK-NEXT: vmov.f64 d1, d41468; CHECK-NEXT: vstrw.32 q3, [r1, #16]1469; CHECK-NEXT: vmov.f64 d2, d51470; CHECK-NEXT: vstrw.32 q0, [r1]1471; CHECK-NEXT: vstrw.32 q1, [r1, #32]1472; CHECK-NEXT: bx lr1473entry:1474 %l1 = load <2 x double>, ptr %src, align 41475 %s2 = getelementptr <2 x double>, ptr %src, i32 11476 %l2 = load <2 x double>, ptr %s2, align 41477 %s3 = getelementptr <2 x double>, ptr %src, i32 21478 %l3 = load <2 x double>, ptr %s3, align 41479 %t1 = shufflevector <2 x double> %l1, <2 x double> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>1480 %t2 = shufflevector <2 x double> %l3, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>1481 %s = shufflevector <4 x double> %t1, <4 x double> %t2, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>1482 store <6 x double> %s, ptr %dst1483 ret void1484}1485 1486define void @vst3_v4f64(ptr %src, ptr %dst) {1487; CHECK-LABEL: vst3_v4f64:1488; CHECK: @ %bb.0: @ %entry1489; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13, d14, d15}1490; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13, d14, d15}1491; CHECK-NEXT: vldrw.u32 q6, [r0, #48]1492; CHECK-NEXT: vldrw.u32 q7, [r0, #32]1493; CHECK-NEXT: vldrw.u32 q0, [r0, #80]1494; CHECK-NEXT: vldrw.u32 q2, [r0]1495; CHECK-NEXT: vmov.f64 d2, d131496; CHECK-NEXT: vldrw.u32 q3, [r0, #16]1497; CHECK-NEXT: vldrw.u32 q4, [r0, #64]1498; CHECK-NEXT: vmov.f64 d13, d151499; CHECK-NEXT: vmov.f64 d3, d11500; CHECK-NEXT: vmov.f64 d10, d41501; CHECK-NEXT: vstrw.32 q1, [r1, #80]1502; CHECK-NEXT: vmov.f64 d11, d141503; CHECK-NEXT: vmov.f64 d4, d81504; CHECK-NEXT: vstrw.32 q5, [r1]1505; CHECK-NEXT: vmov.f64 d1, d71506; CHECK-NEXT: vstrw.32 q2, [r1, #16]1507; CHECK-NEXT: vmov.f64 d8, d131508; CHECK-NEXT: vstrw.32 q0, [r1, #64]1509; CHECK-NEXT: vmov.f64 d14, d61510; CHECK-NEXT: vstrw.32 q4, [r1, #32]1511; CHECK-NEXT: vmov.f64 d15, d121512; CHECK-NEXT: vstrw.32 q7, [r1, #48]1513; CHECK-NEXT: vpop {d8, d9, d10, d11, d12, d13, d14, d15}1514; CHECK-NEXT: bx lr1515entry:1516 %l1 = load <4 x double>, ptr %src, align 41517 %s2 = getelementptr <4 x double>, ptr %src, i32 11518 %l2 = load <4 x double>, ptr %s2, align 41519 %s3 = getelementptr <4 x double>, ptr %src, i32 21520 %l3 = load <4 x double>, ptr %s3, align 41521 %t1 = shufflevector <4 x double> %l1, <4 x double> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>1522 %t2 = shufflevector <4 x double> %l3, <4 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>1523 %s = shufflevector <8 x double> %t1, <8 x double> %t2, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>1524 store <12 x double> %s, ptr %dst1525 ret void1526}1527