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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp,+fp64 -mve-max-interleave-factor=4 -verify-machineinstrs %s -o - | FileCheck %s3 4; i325 6define ptr @vst4_v4i32(ptr %src, ptr %dst) {7; CHECK-LABEL: vst4_v4i32:8; CHECK: @ %bb.0: @ %entry9; CHECK-NEXT: vldrw.u32 q3, [r0, #48]10; CHECK-NEXT: vldrw.u32 q2, [r0, #32]11; CHECK-NEXT: vldrw.u32 q1, [r0, #16]12; CHECK-NEXT: vldrw.u32 q0, [r0]13; CHECK-NEXT: vst40.32 {q0, q1, q2, q3}, [r1]14; CHECK-NEXT: vst41.32 {q0, q1, q2, q3}, [r1]15; CHECK-NEXT: vst42.32 {q0, q1, q2, q3}, [r1]16; CHECK-NEXT: vst43.32 {q0, q1, q2, q3}, [r1]!17; CHECK-NEXT: mov r0, r118; CHECK-NEXT: bx lr19entry:20 %l1 = load <4 x i32>, ptr %src, align 421 %s2 = getelementptr <4 x i32>, ptr %src, i32 122 %l2 = load <4 x i32>, ptr %s2, align 423 %s3 = getelementptr <4 x i32>, ptr %src, i32 224 %l3 = load <4 x i32>, ptr %s3, align 425 %s4 = getelementptr <4 x i32>, ptr %src, i32 326 %l4 = load <4 x i32>, ptr %s4, align 427 %t1 = shufflevector <4 x i32> %l1, <4 x i32> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>28 %t2 = shufflevector <4 x i32> %l3, <4 x i32> %l4, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>29 %s = shufflevector <8 x i32> %t1, <8 x i32> %t2, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 1, i32 5, i32 9, i32 13, i32 2, i32 6, i32 10, i32 14, i32 3, i32 7, i32 11, i32 15>30 store <16 x i32> %s, ptr %dst31 %ret = getelementptr inbounds <16 x i32>, ptr %dst, i32 132 ret ptr %ret33}34 35; i1636 37define ptr @vst4_v8i16(ptr %src, ptr %dst) {38; CHECK-LABEL: vst4_v8i16:39; CHECK: @ %bb.0: @ %entry40; CHECK-NEXT: vldrw.u32 q3, [r0, #48]41; CHECK-NEXT: vldrw.u32 q2, [r0, #32]42; CHECK-NEXT: vldrw.u32 q1, [r0, #16]43; CHECK-NEXT: vldrw.u32 q0, [r0]44; CHECK-NEXT: vst40.16 {q0, q1, q2, q3}, [r1]45; CHECK-NEXT: vst41.16 {q0, q1, q2, q3}, [r1]46; CHECK-NEXT: vst42.16 {q0, q1, q2, q3}, [r1]47; CHECK-NEXT: vst43.16 {q0, q1, q2, q3}, [r1]!48; CHECK-NEXT: mov r0, r149; CHECK-NEXT: bx lr50entry:51 %l1 = load <8 x i16>, ptr %src, align 452 %s2 = getelementptr <8 x i16>, ptr %src, i32 153 %l2 = load <8 x i16>, ptr %s2, align 454 %s3 = getelementptr <8 x i16>, ptr %src, i32 255 %l3 = load <8 x i16>, ptr %s3, align 456 %s4 = getelementptr <8 x i16>, ptr %src, i32 357 %l4 = load <8 x i16>, ptr %s4, align 458 %t1 = shufflevector <8 x i16> %l1, <8 x i16> %l2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>59 %t2 = shufflevector <8 x i16> %l3, <8 x i16> %l4, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>60 %s = shufflevector <16 x i16> %t1, <16 x i16> %t2, <32 x i32> <i32 0, i32 8, i32 16, i32 24, i32 1, i32 9, i32 17, i32 25, i32 2, i32 10, i32 18, i32 26, i32 3, i32 11, i32 19, i32 27, i32 4, i32 12, i32 20, i32 28, i32 5, i32 13, i32 21, i32 29, i32 6, i32 14, i32 22, i32 30, i32 7, i32 15, i32 23, i32 31>61 store <32 x i16> %s, ptr %dst62 %ret = getelementptr inbounds <32 x i16>, ptr %dst, i32 163 ret ptr %ret64}65 66; i867 68define ptr @vst4_v16i8(ptr %src, ptr %dst) {69; CHECK-LABEL: vst4_v16i8:70; CHECK: @ %bb.0: @ %entry71; CHECK-NEXT: vldrw.u32 q3, [r0, #48]72; CHECK-NEXT: vldrw.u32 q2, [r0, #32]73; CHECK-NEXT: vldrw.u32 q1, [r0, #16]74; CHECK-NEXT: vldrw.u32 q0, [r0]75; CHECK-NEXT: vst40.8 {q0, q1, q2, q3}, [r1]76; CHECK-NEXT: vst41.8 {q0, q1, q2, q3}, [r1]77; CHECK-NEXT: vst42.8 {q0, q1, q2, q3}, [r1]78; CHECK-NEXT: vst43.8 {q0, q1, q2, q3}, [r1]!79; CHECK-NEXT: mov r0, r180; CHECK-NEXT: bx lr81entry:82 %l1 = load <16 x i8>, ptr %src, align 483 %s2 = getelementptr <16 x i8>, ptr %src, i32 184 %l2 = load <16 x i8>, ptr %s2, align 485 %s3 = getelementptr <16 x i8>, ptr %src, i32 286 %l3 = load <16 x i8>, ptr %s3, align 487 %s4 = getelementptr <16 x i8>, ptr %src, i32 388 %l4 = load <16 x i8>, ptr %s4, align 489 %t1 = shufflevector <16 x i8> %l1, <16 x i8> %l2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>90 %t2 = shufflevector <16 x i8> %l3, <16 x i8> %l4, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>91 %s = shufflevector <32 x i8> %t1, <32 x i8> %t2, <64 x i32> <i32 0, i32 16, i32 32, i32 48, i32 1, i32 17, i32 33, i32 49, i32 2, i32 18, i32 34, i32 50, i32 3, i32 19, i32 35, i32 51, i32 4, i32 20, i32 36, i32 52, i32 5, i32 21, i32 37, i32 53, i32 6, i32 22, i32 38, i32 54, i32 7, i32 23, i32 39, i32 55, i32 8, i32 24, i32 40, i32 56, i32 9, i32 25, i32 41, i32 57, i32 10, i32 26, i32 42, i32 58, i32 11, i32 27, i32 43, i32 59, i32 12, i32 28, i32 44, i32 60, i32 13, i32 29, i32 45, i32 61, i32 14, i32 30, i32 46, i32 62, i32 15, i32 31, i32 47, i32 63>92 store <64 x i8> %s, ptr %dst93 %ret = getelementptr inbounds <64 x i8>, ptr %dst, i32 194 ret ptr %ret95}96 97; i6498 99define ptr @vst4_v2i64(ptr %src, ptr %dst) {100; CHECK-LABEL: vst4_v2i64:101; CHECK: @ %bb.0: @ %entry102; CHECK-NEXT: .vsave {d8, d9}103; CHECK-NEXT: vpush {d8, d9}104; CHECK-NEXT: vldrw.u32 q0, [r0, #16]105; CHECK-NEXT: vldrw.u32 q1, [r0]106; CHECK-NEXT: vldrw.u32 q2, [r0, #48]107; CHECK-NEXT: vldrw.u32 q3, [r0, #32]108; CHECK-NEXT: vmov.f64 d8, d2109; CHECK-NEXT: vmov.f64 d9, d0110; CHECK-NEXT: vmov.f64 d0, d3111; CHECK-NEXT: vmov.f64 d3, d4112; CHECK-NEXT: vstrw.32 q0, [r1, #32]113; CHECK-NEXT: vmov.f64 d2, d6114; CHECK-NEXT: vmov.f64 d4, d7115; CHECK-NEXT: vstrw.32 q1, [r1, #16]116; CHECK-NEXT: vstrw.32 q2, [r1, #48]117; CHECK-NEXT: vstrw.32 q4, [r1], #64118; CHECK-NEXT: mov r0, r1119; CHECK-NEXT: vpop {d8, d9}120; CHECK-NEXT: bx lr121entry:122 %l1 = load <2 x i64>, ptr %src, align 4123 %s2 = getelementptr <2 x i64>, ptr %src, i32 1124 %l2 = load <2 x i64>, ptr %s2, align 4125 %s3 = getelementptr <2 x i64>, ptr %src, i32 2126 %l3 = load <2 x i64>, ptr %s3, align 4127 %s4 = getelementptr <2 x i64>, ptr %src, i32 3128 %l4 = load <2 x i64>, ptr %s4, align 4129 %t1 = shufflevector <2 x i64> %l1, <2 x i64> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>130 %t2 = shufflevector <2 x i64> %l3, <2 x i64> %l4, <4 x i32> <i32 0, i32 1, i32 2, i32 3>131 %s = shufflevector <4 x i64> %t1, <4 x i64> %t2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 1, i32 3, i32 5, i32 7>132 store <8 x i64> %s, ptr %dst133 %ret = getelementptr inbounds <8 x i64>, ptr %dst, i32 1134 ret ptr %ret135}136 137; f32138 139define ptr @vst4_v4f32(ptr %src, ptr %dst) {140; CHECK-LABEL: vst4_v4f32:141; CHECK: @ %bb.0: @ %entry142; CHECK-NEXT: vldrw.u32 q3, [r0, #48]143; CHECK-NEXT: vldrw.u32 q2, [r0, #32]144; CHECK-NEXT: vldrw.u32 q1, [r0, #16]145; CHECK-NEXT: vldrw.u32 q0, [r0]146; CHECK-NEXT: vst40.32 {q0, q1, q2, q3}, [r1]147; CHECK-NEXT: vst41.32 {q0, q1, q2, q3}, [r1]148; CHECK-NEXT: vst42.32 {q0, q1, q2, q3}, [r1]149; CHECK-NEXT: vst43.32 {q0, q1, q2, q3}, [r1]!150; CHECK-NEXT: mov r0, r1151; CHECK-NEXT: bx lr152entry:153 %l1 = load <4 x float>, ptr %src, align 4154 %s2 = getelementptr <4 x float>, ptr %src, i32 1155 %l2 = load <4 x float>, ptr %s2, align 4156 %s3 = getelementptr <4 x float>, ptr %src, i32 2157 %l3 = load <4 x float>, ptr %s3, align 4158 %s4 = getelementptr <4 x float>, ptr %src, i32 3159 %l4 = load <4 x float>, ptr %s4, align 4160 %t1 = shufflevector <4 x float> %l1, <4 x float> %l2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>161 %t2 = shufflevector <4 x float> %l3, <4 x float> %l4, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>162 %s = shufflevector <8 x float> %t1, <8 x float> %t2, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 1, i32 5, i32 9, i32 13, i32 2, i32 6, i32 10, i32 14, i32 3, i32 7, i32 11, i32 15>163 store <16 x float> %s, ptr %dst164 %ret = getelementptr inbounds <16 x float>, ptr %dst, i32 1165 ret ptr %ret166}167 168; f16169 170define ptr @vst4_v8f16(ptr %src, ptr %dst) {171; CHECK-LABEL: vst4_v8f16:172; CHECK: @ %bb.0: @ %entry173; CHECK-NEXT: vldrw.u32 q3, [r0, #48]174; CHECK-NEXT: vldrw.u32 q2, [r0, #32]175; CHECK-NEXT: vldrw.u32 q1, [r0, #16]176; CHECK-NEXT: vldrw.u32 q0, [r0]177; CHECK-NEXT: vst40.16 {q0, q1, q2, q3}, [r1]178; CHECK-NEXT: vst41.16 {q0, q1, q2, q3}, [r1]179; CHECK-NEXT: vst42.16 {q0, q1, q2, q3}, [r1]180; CHECK-NEXT: vst43.16 {q0, q1, q2, q3}, [r1]!181; CHECK-NEXT: mov r0, r1182; CHECK-NEXT: bx lr183entry:184 %l1 = load <8 x half>, ptr %src, align 4185 %s2 = getelementptr <8 x half>, ptr %src, i32 1186 %l2 = load <8 x half>, ptr %s2, align 4187 %s3 = getelementptr <8 x half>, ptr %src, i32 2188 %l3 = load <8 x half>, ptr %s3, align 4189 %s4 = getelementptr <8 x half>, ptr %src, i32 3190 %l4 = load <8 x half>, ptr %s4, align 4191 %t1 = shufflevector <8 x half> %l1, <8 x half> %l2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>192 %t2 = shufflevector <8 x half> %l3, <8 x half> %l4, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>193 %s = shufflevector <16 x half> %t1, <16 x half> %t2, <32 x i32> <i32 0, i32 8, i32 16, i32 24, i32 1, i32 9, i32 17, i32 25, i32 2, i32 10, i32 18, i32 26, i32 3, i32 11, i32 19, i32 27, i32 4, i32 12, i32 20, i32 28, i32 5, i32 13, i32 21, i32 29, i32 6, i32 14, i32 22, i32 30, i32 7, i32 15, i32 23, i32 31>194 store <32 x half> %s, ptr %dst195 %ret = getelementptr inbounds <32 x half>, ptr %dst, i32 1196 ret ptr %ret197}198 199; f64200 201define ptr @vst4_v2f64(ptr %src, ptr %dst) {202; CHECK-LABEL: vst4_v2f64:203; CHECK: @ %bb.0: @ %entry204; CHECK-NEXT: .vsave {d8, d9}205; CHECK-NEXT: vpush {d8, d9}206; CHECK-NEXT: vldrw.u32 q0, [r0, #16]207; CHECK-NEXT: vldrw.u32 q1, [r0]208; CHECK-NEXT: vldrw.u32 q2, [r0, #48]209; CHECK-NEXT: vldrw.u32 q3, [r0, #32]210; CHECK-NEXT: vmov.f64 d8, d2211; CHECK-NEXT: vmov.f64 d9, d0212; CHECK-NEXT: vmov.f64 d0, d3213; CHECK-NEXT: vmov.f64 d3, d4214; CHECK-NEXT: vstrw.32 q0, [r1, #32]215; CHECK-NEXT: vmov.f64 d2, d6216; CHECK-NEXT: vmov.f64 d4, d7217; CHECK-NEXT: vstrw.32 q1, [r1, #16]218; CHECK-NEXT: vstrw.32 q2, [r1, #48]219; CHECK-NEXT: vstrw.32 q4, [r1], #64220; CHECK-NEXT: mov r0, r1221; CHECK-NEXT: vpop {d8, d9}222; CHECK-NEXT: bx lr223entry:224 %l1 = load <2 x double>, ptr %src, align 4225 %s2 = getelementptr <2 x double>, ptr %src, i32 1226 %l2 = load <2 x double>, ptr %s2, align 4227 %s3 = getelementptr <2 x double>, ptr %src, i32 2228 %l3 = load <2 x double>, ptr %s3, align 4229 %s4 = getelementptr <2 x double>, ptr %src, i32 3230 %l4 = load <2 x double>, ptr %s4, align 4231 %t1 = shufflevector <2 x double> %l1, <2 x double> %l2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>232 %t2 = shufflevector <2 x double> %l3, <2 x double> %l4, <4 x i32> <i32 0, i32 1, i32 2, i32 3>233 %s = shufflevector <4 x double> %t1, <4 x double> %t2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 1, i32 3, i32 5, i32 7>234 store <8 x double> %s, ptr %dst235 %ret = getelementptr inbounds <8 x double>, ptr %dst, i32 1236 ret ptr %ret237}238