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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s3target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"4target triple = "thumbv8.1m.main-arm-none-eabi"5 6%"struct.std::__va_list" = type { ptr }7 8define hidden i32 @_Z1fiz(i32 %n, ...) local_unnamed_addr #0 {9; CHECK-LABEL: _Z1fiz:10; CHECK: .cfi_sections .debug_frame11; CHECK-NEXT: .cfi_startproc12; CHECK-NEXT: @ %bb.0: @ %entry13; CHECK-NEXT: pac r12, lr, sp14; CHECK-NEXT: .pad #1215; CHECK-NEXT: sub sp, #1216; CHECK-NEXT: .cfi_def_cfa_offset 1217; CHECK-NEXT: .save {r7, ra_auth_code, lr}18; CHECK-NEXT: push.w {r7, r12, lr}19; CHECK-NEXT: .cfi_def_cfa_offset 2420; CHECK-NEXT: .cfi_offset lr, -1621; CHECK-NEXT: .cfi_offset ra_auth_code, -2022; CHECK-NEXT: .cfi_offset r7, -2423; CHECK-NEXT: .pad #424; CHECK-NEXT: sub sp, #425; CHECK-NEXT: .cfi_def_cfa_offset 2826; CHECK-NEXT: add.w r12, sp, #1627; CHECK-NEXT: cmp r0, #128; CHECK-NEXT: stm.w r12, {r1, r2, r3}29; CHECK-NEXT: add r1, sp, #1630; CHECK-NEXT: str r1, [sp]31; CHECK-NEXT: blt .LBB0_332; CHECK-NEXT: @ %bb.1: @ %for.body.lr.ph33; CHECK-NEXT: ldr r1, [sp]34; CHECK-NEXT: dls lr, r035; CHECK-NEXT: movs r0, #036; CHECK-NEXT: adds r1, #437; CHECK-NEXT: .LBB0_2: @ %for.body38; CHECK-NEXT: @ =>This Inner Loop Header: Depth=139; CHECK-NEXT: str r1, [sp]40; CHECK-NEXT: ldr r2, [r1, #-4]41; CHECK-NEXT: adds r1, #442; CHECK-NEXT: add r0, r243; CHECK-NEXT: le lr, .LBB0_244; CHECK-NEXT: b .LBB0_445; CHECK-NEXT: .LBB0_3:46; CHECK-NEXT: movs r0, #047; CHECK-NEXT: .LBB0_4: @ %for.cond.cleanup48; CHECK-NEXT: add sp, #449; CHECK-NEXT: pop.w {r7, r12, lr}50; CHECK-NEXT: add sp, #1251; CHECK-NEXT: aut r12, lr, sp52; CHECK-NEXT: bx lr53entry:54 %ap = alloca %"struct.std::__va_list", align 455 call void @llvm.va_start(ptr nonnull %ap)56 %cmp7 = icmp sgt i32 %n, 057 br i1 %cmp7, label %for.body.lr.ph, label %for.cond.cleanup58 59for.body.lr.ph: ; preds = %entry60 %argp.cur.pre = load ptr, ptr %ap, align 461 br label %for.body62 63for.cond.cleanup: ; preds = %for.body, %entry64 %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]65 call void @llvm.va_end(ptr nonnull %ap)66 ret i32 %s.0.lcssa67 68for.body: ; preds = %for.body.lr.ph, %for.body69 %argp.cur = phi ptr [ %argp.cur.pre, %for.body.lr.ph ], [ %argp.next, %for.body ]70 %i.09 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]71 %s.08 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]72 %argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 473 store ptr %argp.next, ptr %ap, align 474 %0 = load i32, ptr %argp.cur, align 475 %add = add nsw i32 %0, %s.0876 %inc = add nuw nsw i32 %i.09, 177 %exitcond.not = icmp eq i32 %inc, %n78 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body79}80 81declare void @llvm.va_start(ptr) #182declare void @llvm.va_end(ptr) #183 84attributes #0 = { nounwind optsize "sign-return-address"="non-leaf" }85attributes #1 = { nounwind "sign-return-address"="non-leaf" }86 87!llvm.module.flags = !{!0, !1, !2}88 89!0 = !{i32 8, !"branch-target-enforcement", i32 0}90!1 = !{i32 8, !"sign-return-address", i32 1}91!2 = !{i32 8, !"sign-return-address-all", i32 0}92