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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefixes=ALL,V013; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s --check-prefixes=ALL,V014; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s --check-prefixes=ALL,V23,V25; RUN: llc < %s -mtriple=thumbv8 -enable-tail-merge=0 | FileCheck %s --check-prefixes=ALL,V23,V36 7define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {8; ALL-LABEL: t1:9; ALL: @ %bb.0:10; ALL-NEXT: cmp r2, #111; ALL-NEXT: ittee ne12; ALL-NEXT: cmpne r2, #713; ALL-NEXT: addne r0, r114; ALL-NEXT: addeq r0, r115; ALL-NEXT: addeq r0, #116; ALL-NEXT: bx lr17 switch i32 %c, label %cond_next [18 i32 1, label %cond_true19 i32 7, label %cond_true20 ]21 22cond_true:23 %tmp12 = add i32 %a, 124 %tmp1518 = add i32 %tmp12, %b25 ret i32 %tmp151826 27cond_next:28 %tmp15 = add i32 %b, %a29 ret i32 %tmp1530}31 32define i32 @t2(i32 %a, i32 %b) nounwind {33; V01-LABEL: t2:34; V01: @ %bb.0: @ %entry35; V01-NEXT: cmp r0, r136; V01-NEXT: it eq37; V01-NEXT: bxeq lr38; V01-NEXT: LBB1_1: @ %bb39; V01-NEXT: @ =>This Inner Loop Header: Depth=140; V01-NEXT: cmp r0, r141; V01-NEXT: ite gt42; V01-NEXT: subgt r0, r0, r143; V01-NEXT: suble r1, r1, r044; V01-NEXT: cmp r1, r045; V01-NEXT: bne LBB1_146; V01-NEXT: @ %bb.2: @ %bb1747; V01-NEXT: bx lr48;49; V2-LABEL: t2:50; V2: @ %bb.0: @ %entry51; V2-NEXT: cmp r0, r152; V2-NEXT: it eq53; V2-NEXT: bxeq lr54; V2-NEXT: .LBB1_1: @ %bb55; V2-NEXT: @ =>This Inner Loop Header: Depth=156; V2-NEXT: cmp r0, r157; V2-NEXT: ite gt58; V2-NEXT: subgt r0, r0, r159; V2-NEXT: suble r1, r1, r060; V2-NEXT: cmp r1, r061; V2-NEXT: bne .LBB1_162; V2-NEXT: @ %bb.2: @ %bb1763; V2-NEXT: bx lr64;65; V3-LABEL: t2:66; V3: @ %bb.0: @ %entry67; V3-NEXT: cmp r0, r168; V3-NEXT: it eq69; V3-NEXT: bxeq lr70; V3-NEXT: .LBB1_1: @ %bb71; V3-NEXT: @ =>This Inner Loop Header: Depth=172; V3-NEXT: cmp r0, r173; V3-NEXT: ite le74; V3-NEXT: suble r1, r1, r075; V3-NEXT: subgt r0, r0, r176; V3-NEXT: cmp r1, r077; V3-NEXT: bne .LBB1_178; V3-NEXT: @ %bb.2: @ %bb1779; V3-NEXT: bx lr80entry:81 %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]82 br i1 %tmp1434, label %bb17, label %bb.outer83 84bb.outer: ; preds = %cond_false, %entry85 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]86 %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]87 br label %bb88 89bb: ; preds = %cond_true, %bb.outer90 %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]91 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]92 %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]93 %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]94 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]95 br i1 %tmp3, label %cond_true, label %cond_false96 97cond_true: ; preds = %bb98 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]99 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]100 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]101 br i1 %tmp1437, label %bb17, label %bb102 103cond_false: ; preds = %bb104 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]105 %tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1]106 br i1 %tmp14, label %bb17, label %bb.outer107 108bb17: ; preds = %cond_false, %cond_true, %entry109 %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]110 ret i32 %a_addr.026.1111}112 113define i32 @t2_nomerge(i32 %a, i32 %b) nounwind {114; V01-LABEL: t2_nomerge:115; V01: @ %bb.0: @ %entry116; V01-NEXT: cmp r0, r1117; V01-NEXT: it eq118; V01-NEXT: bxeq lr119; V01-NEXT: LBB2_1: @ %bb120; V01-NEXT: @ =>This Inner Loop Header: Depth=1121; V01-NEXT: cmp r0, r1122; V01-NEXT: ble LBB2_3123; V01-NEXT: @ %bb.2: @ %cond_true124; V01-NEXT: @ in Loop: Header=BB2_1 Depth=1125; V01-NEXT: subs r0, r0, r1126; V01-NEXT: cmp r1, r0127; V01-NEXT: bne LBB2_1128; V01-NEXT: b LBB2_4129; V01-NEXT: LBB2_3: @ %cond_false130; V01-NEXT: @ in Loop: Header=BB2_1 Depth=1131; V01-NEXT: subs r1, r1, r0132; V01-NEXT: cmp r0, #0133; V01-NEXT: bne LBB2_1134; V01-NEXT: LBB2_4: @ %bb17135; V01-NEXT: bx lr136;137; V2-LABEL: t2_nomerge:138; V2: @ %bb.0: @ %entry139; V2-NEXT: cmp r0, r1140; V2-NEXT: it eq141; V2-NEXT: bxeq lr142; V2-NEXT: .LBB2_1: @ %bb143; V2-NEXT: @ =>This Inner Loop Header: Depth=1144; V2-NEXT: cmp r0, r1145; V2-NEXT: ble .LBB2_3146; V2-NEXT: @ %bb.2: @ %cond_true147; V2-NEXT: @ in Loop: Header=BB2_1 Depth=1148; V2-NEXT: subs r0, r0, r1149; V2-NEXT: cmp r1, r0150; V2-NEXT: bne .LBB2_1151; V2-NEXT: b .LBB2_4152; V2-NEXT: .LBB2_3: @ %cond_false153; V2-NEXT: @ in Loop: Header=BB2_1 Depth=1154; V2-NEXT: subs r1, r1, r0155; V2-NEXT: cmp r0, #0156; V2-NEXT: bne .LBB2_1157; V2-NEXT: .LBB2_4: @ %bb17158; V2-NEXT: bx lr159;160; V3-LABEL: t2_nomerge:161; V3: @ %bb.0: @ %entry162; V3-NEXT: cmp r0, r1163; V3-NEXT: beq .LBB2_4164; V3-NEXT: b .LBB2_2165; V3-NEXT: .LBB2_1: @ %cond_true166; V3-NEXT: @ in Loop: Header=BB2_2 Depth=1167; V3-NEXT: subs r0, r0, r1168; V3-NEXT: cmp r1, r0169; V3-NEXT: it eq170; V3-NEXT: bxeq lr171; V3-NEXT: .LBB2_2: @ %bb172; V3-NEXT: @ =>This Inner Loop Header: Depth=1173; V3-NEXT: cmp r0, r1174; V3-NEXT: bgt .LBB2_1175; V3-NEXT: @ %bb.3: @ %cond_false176; V3-NEXT: @ in Loop: Header=BB2_2 Depth=1177; V3-NEXT: subs r1, r1, r0178; V3-NEXT: cmp r0, #0179; V3-NEXT: bne .LBB2_2180; V3-NEXT: .LBB2_4: @ %bb17181; V3-NEXT: bx lr182entry:183 %tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]184 br i1 %tmp1434, label %bb17, label %bb.outer185 186bb.outer: ; preds = %cond_false, %entry187 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]188 %a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]189 br label %bb190 191bb: ; preds = %cond_true, %bb.outer192 %indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]193 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]194 %tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]195 %a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]196 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]197 br i1 %tmp3, label %cond_true, label %cond_false198 199cond_true: ; preds = %bb200 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]201 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]202 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]203 br i1 %tmp1437, label %bb17, label %bb204 205cond_false: ; preds = %bb206 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]207 %tmp14 = icmp eq i32 %b_addr.021.0.ph, %tmp10 ; <i1> [#uses=1]208 br i1 %tmp14, label %bb17, label %bb.outer209 210bb17: ; preds = %cond_false, %cond_true, %entry211 %a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]212 ret i32 %a_addr.026.1213}214 215@x = external global ptr ; <ptr> [#uses=1]216 217define void @foo(i32 %a) nounwind {218; V01-LABEL: foo:219; V01: @ %bb.0: @ %entry220; V01-NEXT: movw r1, :lower16:(L_x$non_lazy_ptr-(LPC3_0+4))221; V01-NEXT: movt r1, :upper16:(L_x$non_lazy_ptr-(LPC3_0+4))222; V01-NEXT: LPC3_0:223; V01-NEXT: add r1, pc224; V01-NEXT: ldr r1, [r1]225; V01-NEXT: ldr r1, [r1]226; V01-NEXT: str r0, [r1]227; V01-NEXT: bx lr228;229; V23-LABEL: foo:230; V23: @ %bb.0: @ %entry231; V23-NEXT: movw r1, :lower16:x232; V23-NEXT: movt r1, :upper16:x233; V23-NEXT: ldr r1, [r1]234; V23-NEXT: str r0, [r1]235; V23-NEXT: bx lr236entry:237 %tmp = load ptr, ptr @x ; <ptr> [#uses=1]238 store i32 %a, ptr %tmp239 ret void240}241 242define void @t3(i32 %a, i32 %b) nounwind {243; V01-LABEL: t3:244; V01: @ %bb.0: @ %entry245; V01-NEXT: cmp r0, #10246; V01-NEXT: it le247; V01-NEXT: bxle lr248; V01-NEXT: LBB4_1: @ %cond_true249; V01-NEXT: str lr, [sp, #-4]!250; V01-NEXT: mov r0, r1251; V01-NEXT: bl _foo252; V01-NEXT: ldr lr, [sp], #4253; V01-NEXT: bx lr254;255; V23-LABEL: t3:256; V23: @ %bb.0: @ %entry257; V23-NEXT: cmp r0, #10258; V23-NEXT: it le259; V23-NEXT: bxle lr260; V23-NEXT: .LBB4_1: @ %cond_true261; V23-NEXT: push {r7, lr}262; V23-NEXT: mov r0, r1263; V23-NEXT: bl foo264; V23-NEXT: pop.w {r7, lr}265; V23-NEXT: bx lr266entry:267 %tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]268 br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock269 270cond_true: ; preds = %entry271 call void @foo( i32 %b )272 ret void273 274UnifiedReturnBlock: ; preds = %entry275 ret void276}277