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1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s2 3; Test #<const>4 5; var 2.1 - 0x00ab00ab6define i32 @t2_const_var2_1_ok_1(i32 %lhs) {7;CHECK-LABEL: t2_const_var2_1_ok_1:8;CHECK: add.w r0, r0, #112068279 %ret = add i32 %lhs, 11206827 ; 0x00ab00ab10 ret i32 %ret11}12 13define i32 @t2_const_var2_1_ok_2(i32 %lhs) {14;CHECK-LABEL: t2_const_var2_1_ok_2:15;CHECK: add.w r0, r0, #1120665616;CHECK: adds r0, #18717 %ret = add i32 %lhs, 11206843 ; 0x00ab00bb18 ret i32 %ret19}20 21define i32 @t2_const_var2_1_ok_3(i32 %lhs) {22;CHECK-LABEL: t2_const_var2_1_ok_3:23;CHECK: add.w r0, r0, #1120682724;CHECK: add.w r0, r0, #1677721625 %ret = add i32 %lhs, 27984043 ; 0x01ab00ab26 ret i32 %ret27}28 29define i32 @t2_const_var2_1_ok_4(i32 %lhs) {30;CHECK-LABEL: t2_const_var2_1_ok_4:31;CHECK: add.w r0, r0, #1677747232;CHECK: add.w r0, r0, #1120682733 %ret = add i32 %lhs, 27984299 ; 0x01ab01ab34 ret i32 %ret35}36 37define i32 @t2_const_var2_1_fail_1(i32 %lhs) {38;CHECK-LABEL: t2_const_var2_1_fail_1:39;CHECK: movw r1, #4377740;CHECK: movt r1, #42741;CHECK: add r0, r142 %ret = add i32 %lhs, 28027649 ; 0x01abab0143 ret i32 %ret44}45 46; var 2.2 - 0xab00ab0047define i32 @t2_const_var2_2_ok_1(i32 %lhs) {48;CHECK-LABEL: t2_const_var2_2_ok_1:49;CHECK: add.w r0, r0, #-142601958450 %ret = add i32 %lhs, 2868947712 ; 0xab00ab0051 ret i32 %ret52}53 54define i32 @t2_const_var2_2_ok_2(i32 %lhs) {55;CHECK-LABEL: t2_const_var2_2_ok_2:56;CHECK: add.w r0, r0, #286890393657;CHECK: add.w r0, r0, #4761658 %ret = add i32 %lhs, 2868951552 ; 0xab00ba0059 ret i32 %ret60}61 62define i32 @t2_const_var2_2_ok_3(i32 %lhs) {63;CHECK-LABEL: t2_const_var2_2_ok_3:64;CHECK: add.w r0, r0, #286894771265;CHECK: adds r0, #1666 %ret = add i32 %lhs, 2868947728 ; 0xab00ab1067 ret i32 %ret68}69 70define i32 @t2_const_var2_2_ok_4(i32 %lhs) {71;CHECK-LABEL: t2_const_var2_2_ok_4:72;CHECK: add.w r0, r0, #286894771273;CHECK: add.w r0, r0, #104859274 %ret = add i32 %lhs, 2869996304 ; 0xab10ab1075 ret i32 %ret76}77 78define i32 @t2_const_var2_2_fail_1(i32 %lhs) {79;CHECK-LABEL: t2_const_var2_2_fail_1:80;CHECK: movw r1, #4379281;CHECK: movt r1, #426782;CHECK: add r0, r183 %ret = add i32 %lhs, 279685904 ; 0x10abab1084 ret i32 %ret85}86 87; var 2.3 - 0xabababab88define i32 @t2_const_var2_3_ok_1(i32 %lhs) {89;CHECK-LABEL: t2_const_var2_3_ok_1:90;CHECK: add.w r0, r0, #-141481275791 %ret = add i32 %lhs, 2880154539 ; 0xabababab92 ret i32 %ret93}94 95define i32 @t2_const_var2_3_fail_1(i32 %lhs) {96;CHECK-LABEL: t2_const_var2_3_fail_1:97;CHECK: movw r1, #4396298;CHECK: movt r1, #4394799;CHECK: add r0, r1100 %ret = add i32 %lhs, 2880154554 ; 0xabababba101 ret i32 %ret102}103 104define i32 @t2_const_var2_3_fail_2(i32 %lhs) {105;CHECK-LABEL: t2_const_var2_3_fail_2:106;CHECK: movw r1, #47787107;CHECK: movt r1, #43947108;CHECK: add r0, r1109 %ret = add i32 %lhs, 2880158379 ; 0xababbaab110 ret i32 %ret111}112 113define i32 @t2_const_var2_3_fail_3(i32 %lhs) {114;CHECK-LABEL: t2_const_var2_3_fail_3:115;CHECK: movw r1, #43947116;CHECK: movt r1, #43962117;CHECK: add r0, r1118 %ret = add i32 %lhs, 2881137579 ; 0xabbaabab119 ret i32 %ret120}121 122define i32 @t2_const_var2_3_fail_4(i32 %lhs) {123;CHECK-LABEL: t2_const_var2_3_fail_4:124;CHECK: movw r1, #43947125;CHECK: movt r1, #47787126;CHECK: add r0, r1127 %ret = add i32 %lhs, 3131812779 ; 0xbaababab128 ret i32 %ret129}130 131; var 3 - 0x0F000000132define i32 @t2_const_var3_1_ok_1(i32 %lhs) {133;CHECK-LABEL: t2_const_var3_1_ok_1:134;CHECK: add.w r0, r0, #251658240135 %ret = add i32 %lhs, 251658240 ; 0x0F000000136 ret i32 %ret137}138 139define i32 @t2_const_var3_2_ok_1(i32 %lhs) {140;CHECK-LABEL: t2_const_var3_2_ok_1:141;CHECK: add.w r0, r0, #3948544142 %ret = add i32 %lhs, 3948544 ; 0b00000000001111000100000000000000143 ret i32 %ret144}145 146define i32 @t2_const_var3_2_ok_2(i32 %lhs) {147;CHECK-LABEL: t2_const_var3_2_ok_2:148;CHECK: add.w r0, r0, #2097152149;CHECK: add.w r0, r0, #1843200150 %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000151 ret i32 %ret152}153 154define i32 @t2_const_var3_3_ok_1(i32 %lhs) {155;CHECK-LABEL: t2_const_var3_3_ok_1:156;CHECK: add.w r0, r0, #258157 %ret = add i32 %lhs, 258 ; 0b00000000000000000000000100000010158 ret i32 %ret159}160 161define i32 @t2_const_var3_4_ok_1(i32 %lhs) {162;CHECK-LABEL: t2_const_var3_4_ok_1:163;CHECK: add.w r0, r0, #-268435456164 %ret = add i32 %lhs, 4026531840 ; 0xF0000000165 ret i32 %ret166}167 168define i32 @t2MOVTi16_ok_1(i32 %a) {169; CHECK-LABEL: t2MOVTi16_ok_1:170; CHECK: movt r0, #1234171 %1 = and i32 %a, 65535172 %2 = shl i32 1234, 16173 %3 = or i32 %1, %2174 175 ret i32 %3176}177 178define i32 @t2MOVTi16_test_1(i32 %a) {179; CHECK-LABEL: t2MOVTi16_test_1:180; CHECK: movt r0, #1234181 %1 = shl i32 255, 8182 %2 = shl i32 1234, 8183 %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3184 %4 = shl i32 %2, 8 ; This gives us (1234 << 16) in %4185 %5 = and i32 %a, %3186 %6 = or i32 %4, %5187 188 ret i32 %6189}190 191define i32 @t2MOVTi16_test_2(i32 %a) {192; CHECK-LABEL: t2MOVTi16_test_2:193; CHECK: movt r0, #1234194 %1 = shl i32 255, 8195 %2 = shl i32 1234, 8196 %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3197 %4 = shl i32 %2, 6198 %5 = and i32 %a, %3199 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6200 %7 = or i32 %5, %6201 202 ret i32 %7203}204 205define i32 @t2MOVTi16_test_3(i32 %a) {206; CHECK-LABEL: t2MOVTi16_test_3:207; CHECK: movt r0, #1234208 %1 = shl i32 255, 8209 %2 = shl i32 1234, 8210 %3 = or i32 %1, 255 ; This gives us 0xFFFF in %3211 %4 = shl i32 %2, 6212 %5 = and i32 %a, %3213 %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6214 %7 = lshr i32 %6, 6215 %8 = shl i32 %7, 6216 %9 = or i32 %5, %8217 218 ret i32 %8219}220 221; 171 = 0x000000ab222define i32 @f1(i32 %a) {223; CHECK-LABEL: f1:224; CHECK: movs r0, #171225 %tmp = add i32 0, 171226 ret i32 %tmp227}228 229; 1179666 = 0x00120012230define i32 @f2(i32 %a) {231; CHECK-LABEL: f2:232; CHECK: mov.w r0, #1179666233 %tmp = add i32 0, 1179666234 ret i32 %tmp235}236 237; 872428544 = 0x34003400238define i32 @f3(i32 %a) {239; CHECK-LABEL: f3:240; CHECK: mov.w r0, #872428544241 %tmp = add i32 0, 872428544242 ret i32 %tmp243}244 245; 1448498774 = 0x56565656246define i32 @f4(i32 %a) {247; CHECK-LABEL: f4:248; CHECK: mov.w r0, #1448498774249 %tmp = add i32 0, 1448498774250 ret i32 %tmp251}252 253; 66846720 = 0x03fc0000254define i32 @f5(i32 %a) {255; CHECK-LABEL: f5:256; CHECK: mov.w r0, #66846720257 %tmp = add i32 0, 66846720258 ret i32 %tmp259}260 261define i32 @f6(i32 %a) {262;CHECK-LABEL: f6:263;CHECK: movw r0, #65535264 %tmp = add i32 0, 65535265 ret i32 %tmp266}267