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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=thumbv7m-none-eabi -o - | FileCheck %s3 4; 0xff00ff00 = 42782553605; 0x00ff00ff = 167119356define i32 @rev16(i32 %a) {7; CHECK-LABEL: rev16:8; CHECK: @ %bb.0:9; CHECK-NEXT: rev16 r0, r010; CHECK-NEXT: bx lr11 %l8 = shl i32 %a, 812 %r8 = lshr i32 %a, 813 %mask_l8 = and i32 %l8, 427825536014 %mask_r8 = and i32 %r8, 1671193515 %tmp = or i32 %mask_l8, %mask_r816 ret i32 %tmp17}18 19define i32 @not_rev16(i32 %a) {20; CHECK-LABEL: not_rev16:21; CHECK: @ %bb.0:22; CHECK-NEXT: mov.w r1, #6528023; CHECK-NEXT: and.w r1, r1, r0, lsr #824; CHECK-NEXT: and r0, r0, #6528025; CHECK-NEXT: orr.w r0, r1, r0, lsl #826; CHECK-NEXT: bx lr27 %l8 = shl i32 %a, 828 %r8 = lshr i32 %a, 829 %mask_r8 = and i32 %r8, 427825536030 %mask_l8 = and i32 %l8, 1671193531 %tmp = or i32 %mask_r8, %mask_l832 ret i32 %tmp33}34 35define i32 @extra_maskop_uses2(i32 %a) {36; CHECK-LABEL: extra_maskop_uses2:37; CHECK: @ %bb.0:38; CHECK-NEXT: mov.w r1, #-1671193639; CHECK-NEXT: mov.w r2, #1671193540; CHECK-NEXT: and.w r1, r1, r0, lsl #841; CHECK-NEXT: and.w r0, r2, r0, lsr #842; CHECK-NEXT: adds r2, r0, r143; CHECK-NEXT: muls r0, r1, r044; CHECK-NEXT: muls r0, r2, r045; CHECK-NEXT: bx lr46 %l8 = shl i32 %a, 847 %r8 = lshr i32 %a, 848 %mask_l8 = and i32 %l8, 427825536049 %mask_r8 = and i32 %r8, 1671193550 %or = or i32 %mask_r8, %mask_l851 %mul = mul i32 %mask_r8, %mask_l8 ; another use of the mask ops52 %r = mul i32 %mul, %or ; and use that result53 ret i32 %r54}55 56 57define i32 @bswap_ror_commuted(i32 %a) {58; CHECK-LABEL: bswap_ror_commuted:59; CHECK: @ %bb.0:60; CHECK-NEXT: rev16 r0, r061; CHECK-NEXT: bx lr62 %l8 = shl i32 %a, 863 %r8 = lshr i32 %a, 864 %mask_l8 = and i32 %l8, 427825536065 %mask_r8 = and i32 %r8, 1671193566 %tmp = or i32 %mask_r8, %mask_l867 ret i32 %tmp68}69 70define i32 @different_shift_amount(i32 %a) {71; CHECK-LABEL: different_shift_amount:72; CHECK: @ %bb.0:73; CHECK-NEXT: mov.w r1, #1671193574; CHECK-NEXT: movw r2, #6502475; CHECK-NEXT: and.w r1, r1, r0, lsr #876; CHECK-NEXT: movt r2, #6528077; CHECK-NEXT: and.w r0, r2, r0, lsl #978; CHECK-NEXT: add r0, r179; CHECK-NEXT: bx lr80 %l8 = shl i32 %a, 981 %r8 = lshr i32 %a, 882 %mask_l8 = and i32 %l8, 427825536083 %mask_r8 = and i32 %r8, 1671193584 %tmp = or i32 %mask_l8, %mask_r885 ret i32 %tmp86}87 88define i32 @different_constant(i32 %a) {89; CHECK-LABEL: different_constant:90; CHECK: @ %bb.0:91; CHECK-NEXT: mov.w r1, #1671193592; CHECK-NEXT: and.w r0, r1, r0, lsr #893; CHECK-NEXT: bx lr94 %l8 = shl i32 %a, 895 %r8 = lshr i32 %a, 896 %mask_l8 = and i32 %l8, 4297 %mask_r8 = and i32 %r8, 1671193598 %tmp = or i32 %mask_l8, %mask_r899 ret i32 %tmp100}101 102define i32 @different_op(i32 %a) {103; CHECK-LABEL: different_op:104; CHECK: @ %bb.0:105; CHECK-NEXT: mov.w r1, #16711935106; CHECK-NEXT: movw r2, #256107; CHECK-NEXT: and.w r1, r1, r0, lsr #8108; CHECK-NEXT: movt r2, #255109; CHECK-NEXT: add.w r0, r2, r0, lsl #8110; CHECK-NEXT: orrs r0, r1111; CHECK-NEXT: bx lr112 %l8 = shl i32 %a, 8113 %r8 = lshr i32 %a, 8114 %mask_l8 = sub i32 %l8, 4278255360115 %mask_r8 = and i32 %r8, 16711935116 %tmp = or i32 %mask_l8, %mask_r8117 ret i32 %tmp118}119 120define i32 @different_vars(i32 %a, i32 %b) {121; CHECK-LABEL: different_vars:122; CHECK: @ %bb.0:123; CHECK-NEXT: mov.w r2, #16711935124; CHECK-NEXT: and.w r1, r2, r1, lsr #8125; CHECK-NEXT: mov.w r2, #-16711936126; CHECK-NEXT: and.w r0, r2, r0, lsl #8127; CHECK-NEXT: add r0, r1128; CHECK-NEXT: bx lr129 %l8 = shl i32 %a, 8130 %r8 = lshr i32 %b, 8131 %mask_l8 = and i32 %l8, 4278255360132 %mask_r8 = and i32 %r8, 16711935133 %tmp = or i32 %mask_l8, %mask_r8134 ret i32 %tmp135}136 137 138; FIXME: this rev16 pattern is not matching139 140; 0xff000000 = 4278190080141; 0x00ff0000 = 16711680142; 0x0000ff00 = 65280143; 0x000000ff = 255144define i32 @f2(i32 %a) {145; CHECK-LABEL: f2:146; CHECK: @ %bb.0:147; CHECK-NEXT: mov.w r1, #16711680148; CHECK-NEXT: and r2, r0, #16711680149; CHECK-NEXT: and.w r1, r1, r0, lsr #8150; CHECK-NEXT: orr.w r1, r1, r2, lsl #8151; CHECK-NEXT: ubfx r2, r0, #8, #8152; CHECK-NEXT: bfi r2, r0, #8, #8153; CHECK-NEXT: adds r0, r2, r1154; CHECK-NEXT: bx lr155 %l8 = shl i32 %a, 8156 %r8 = lshr i32 %a, 8157 %masklo_l8 = and i32 %l8, 65280158 %maskhi_l8 = and i32 %l8, 4278190080159 %masklo_r8 = and i32 %r8, 255160 %maskhi_r8 = and i32 %r8, 16711680161 %tmp1 = or i32 %masklo_l8, %masklo_r8162 %tmp2 = or i32 %maskhi_l8, %maskhi_r8163 %tmp = or i32 %tmp1, %tmp2164 ret i32 %tmp165}166