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1; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s --check-prefix=CHECK-NO-DSP2; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m4 %s -o - | FileCheck %s --check-prefix=CHECK-DSP3; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-DSP4; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP5; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefix=CHECK-DSP6 7define i32 @test1(i16 zeroext %z) nounwind {8; CHECK-LABEL: test1:9; CHECK-DSP: sxth10; CHECK-NO-DSP: sxth11 %r = sext i16 %z to i3212 ret i32 %r13}14 15define i32 @test2(i8 zeroext %z) nounwind {16; CHECK-LABEL: test2:17; CHECK-DSP: sxtb18; CHECK-NO-DSP: sxtb19 %r = sext i8 %z to i3220 ret i32 %r21}22 23define i32 @test3(i16 signext %z) nounwind {24; CHECK-LABEL: test3:25; CHECK-DSP: uxth26; CHECK-NO-DSP: uxth27 %r = zext i16 %z to i3228 ret i32 %r29}30 31define i32 @test4(i8 signext %z) nounwind {32; CHECK-LABEL: test4:33; CHECK-DSP: uxtb34; CHECK-NO-DSP: uxtb35 %r = zext i8 %z to i3236 ret i32 %r37}38 39define i32 @test5(i32 %a, i8 %b) {40; CHECK-LABEL: test5:41; CHECK-DSP: sxtab r0, r0, r142; CHECK-NO-DSP-NOT: sxtab43 %sext = sext i8 %b to i3244 %add = add i32 %a, %sext45 ret i32 %add46}47 48define i32 @test6(i32 %a, i32 %b) {49; CHECK-LABEL: test6:50; CHECK-DSP: sxtab r0, r0, r151; CHECK-NO-DSP-NOT: sxtab52 %shl = shl i32 %b, 2453 %ashr = ashr i32 %shl, 2454 %add = add i32 %a, %ashr55 ret i32 %add56}57 58define i32 @test7(i32 %a, i16 %b) {59; CHECK-LABEL: test7:60; CHECK-DSP: sxtah r0, r0, r161; CHECK-NO-DSPNOT: sxtah62 %sext = sext i16 %b to i3263 %add = add i32 %a, %sext64 ret i32 %add65}66 67define i32 @test8(i32 %a, i32 %b) {68; CHECK-LABEL: test8:69; CHECK-DSP: sxtah r0, r0, r170; CHECK-NO-DSP-NOT: sxtah71 %shl = shl i32 %b, 1672 %ashr = ashr i32 %shl, 1673 %add = add i32 %a, %ashr74 ret i32 %add75}76 77define i32 @test9(i32 %a, i8 %b) {78; CHECK-LABEL: test9:79; CHECK-DSP: uxtab r0, r0, r180; CHECK-NO-DSP-NOT: uxtab81 %zext = zext i8 %b to i3282 %add = add i32 %a, %zext83 ret i32 %add84}85 86define i32 @test10(i32 %a, i32 %b) {87;CHECK-LABEL: test10:88;CHECK-DSP: uxtab r0, r0, r189;CHECK-NO-DSP-NOT: uxtab90 %and = and i32 %b, 25591 %add = add i32 %a, %and92 ret i32 %add93}94 95define i32 @test11(i32 %a, i16 %b) {96; CHECK-LABEL: test11:97; CHECK-DSP: uxtah r0, r0, r198; CHECK-NO-DSP-NOT: uxtah99 %zext = zext i16 %b to i32100 %add = add i32 %a, %zext101 ret i32 %add102}103 104define i32 @test12(i32 %a, i32 %b) {105;CHECK-LABEL: test12:106;CHECK-DSP: uxtah r0, r0, r1107;CHECK-NO-DSP-NOT: uxtah108 %and = and i32 %b, 65535109 %add = add i32 %a, %and110 ret i32 %add111}112 113