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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-DSP3; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NO-DSP4; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-DSP5; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-NO-DSP6; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefixes=CHECK,CHECK-DSP7 8define i32 @test0(i8 %A) {9; CHECK-LABEL: test0:10; CHECK: @ %bb.0:11; CHECK-NEXT: sxtb r0, r012; CHECK-NEXT: bx lr13 %B = sext i8 %A to i3214 ret i32 %B15}16 17define signext i8 @test1(i32 %A) {18; CHECK-LABEL: test1:19; CHECK: @ %bb.0:20; CHECK-NEXT: sbfx r0, r0, #8, #821; CHECK-NEXT: bx lr22 %B = lshr i32 %A, 823 %C = shl i32 %A, 2424 %D = or i32 %B, %C25 %E = trunc i32 %D to i826 ret i8 %E27}28 29define signext i32 @test2(i32 %A, i32 %X) {30; CHECK-DSP-LABEL: test2:31; CHECK-DSP: @ %bb.0:32; CHECK-DSP-NEXT: sxtab r0, r1, r0, ror #833; CHECK-DSP-NEXT: bx lr34;35; CHECK-NO-DSP-LABEL: test2:36; CHECK-NO-DSP: @ %bb.0:37; CHECK-NO-DSP-NEXT: sbfx r0, r0, #8, #838; CHECK-NO-DSP-NEXT: add r0, r139; CHECK-NO-DSP-NEXT: bx lr40 %B = lshr i32 %A, 841 %C = shl i32 %A, 2442 %D = or i32 %B, %C43 %E = trunc i32 %D to i844 %F = sext i8 %E to i3245 %G = add i32 %F, %X46 ret i32 %G47}48 49define i32 @test3(i32 %A, i32 %X) {50; CHECK-DSP-LABEL: test3:51; CHECK-DSP: @ %bb.0:52; CHECK-DSP-NEXT: sxtah r0, r0, r1, ror #853; CHECK-DSP-NEXT: bx lr54;55; CHECK-NO-DSP-LABEL: test3:56; CHECK-NO-DSP: @ %bb.0:57; CHECK-NO-DSP-NEXT: sbfx r1, r1, #8, #1658; CHECK-NO-DSP-NEXT: add r0, r159; CHECK-NO-DSP-NEXT: bx lr60 %X.hi = lshr i32 %X, 861 %X.trunc = trunc i32 %X.hi to i1662 %addend = sext i16 %X.trunc to i3263 %sum = add i32 %A, %addend64 ret i32 %sum65}66 67define signext i32 @test4(i32 %A, i32 %X) {68; CHECK-DSP-LABEL: test4:69; CHECK-DSP: @ %bb.0:70; CHECK-DSP-NEXT: sxtab r0, r1, r0, ror #1671; CHECK-DSP-NEXT: bx lr72;73; CHECK-NO-DSP-LABEL: test4:74; CHECK-NO-DSP: @ %bb.0:75; CHECK-NO-DSP-NEXT: sbfx r0, r0, #16, #876; CHECK-NO-DSP-NEXT: add r0, r177; CHECK-NO-DSP-NEXT: bx lr78 %B = lshr i32 %A, 1679 %C = shl i32 %A, 1680 %D = or i32 %B, %C81 %E = trunc i32 %D to i882 %F = sext i8 %E to i3283 %G = add i32 %F, %X84 ret i32 %G85}86 87define signext i32 @test5(i32 %A, i32 %X) {88; CHECK-DSP-LABEL: test5:89; CHECK-DSP: @ %bb.0:90; CHECK-DSP-NEXT: sxtah r0, r1, r0, ror #2491; CHECK-DSP-NEXT: bx lr92;93; CHECK-NO-DSP-LABEL: test5:94; CHECK-NO-DSP: @ %bb.0:95; CHECK-NO-DSP-NEXT: sxth.w r0, r0, ror #2496; CHECK-NO-DSP-NEXT: add r0, r197; CHECK-NO-DSP-NEXT: bx lr98 %B = lshr i32 %A, 2499 %C = shl i32 %A, 8100 %D = or i32 %B, %C101 %E = trunc i32 %D to i16102 %F = sext i16 %E to i32103 %G = add i32 %F, %X104 ret i32 %G105}106