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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s3 4; These tests would be improved by 'movs r0, #0' being rematerialized below the5; tst as 'mov.w r0, #0'.6 7define i32 @f2(i32 %a, i32 %b) {8; CHECK-LABEL: f2:9; CHECK: @ %bb.0:10; CHECK-NEXT: movs r2, #2411; CHECK-NEXT: eors r0, r112; CHECK-NEXT: it eq13; CHECK-NEXT: moveq r2, #4214; CHECK-NEXT: mov r0, r215; CHECK-NEXT: bx lr16 %tmp = xor i32 %a, %b17 %tmp1 = icmp eq i32 %tmp, 018 %ret = select i1 %tmp1, i32 42, i32 2419 ret i32 %ret20}21 22define i32 @f4(i32 %a, i32 %b) {23; CHECK-LABEL: f4:24; CHECK: @ %bb.0:25; CHECK-NEXT: movs r2, #2426; CHECK-NEXT: eors r0, r127; CHECK-NEXT: it eq28; CHECK-NEXT: moveq r2, #4229; CHECK-NEXT: mov r0, r230; CHECK-NEXT: bx lr31 %tmp = xor i32 %a, %b32 %tmp1 = icmp eq i32 0, %tmp33 %ret = select i1 %tmp1, i32 42, i32 2434 ret i32 %ret35}36 37define i32 @f6(i32 %a, i32 %b) {38; CHECK-LABEL: f6:39; CHECK: @ %bb.0:40; CHECK-NEXT: movs r2, #2441; CHECK-NEXT: teq.w r0, r1, lsl #542; CHECK-NEXT: it eq43; CHECK-NEXT: moveq r2, #4244; CHECK-NEXT: mov r0, r245; CHECK-NEXT: bx lr46 %tmp = shl i32 %b, 547 %tmp1 = xor i32 %a, %tmp48 %tmp2 = icmp eq i32 %tmp1, 049 %ret = select i1 %tmp2, i32 42, i32 2450 ret i32 %ret51}52 53define i32 @f7(i32 %a, i32 %b) {54; CHECK-LABEL: f7:55; CHECK: @ %bb.0:56; CHECK-NEXT: movs r2, #2457; CHECK-NEXT: teq.w r0, r1, lsr #658; CHECK-NEXT: it eq59; CHECK-NEXT: moveq r2, #4260; CHECK-NEXT: mov r0, r261; CHECK-NEXT: bx lr62 %tmp = lshr i32 %b, 663 %tmp1 = xor i32 %a, %tmp64 %tmp2 = icmp eq i32 %tmp1, 065 %ret = select i1 %tmp2, i32 42, i32 2466 ret i32 %ret67}68 69define i32 @f8(i32 %a, i32 %b) {70; CHECK-LABEL: f8:71; CHECK: @ %bb.0:72; CHECK-NEXT: movs r2, #2473; CHECK-NEXT: teq.w r0, r1, asr #774; CHECK-NEXT: it eq75; CHECK-NEXT: moveq r2, #4276; CHECK-NEXT: mov r0, r277; CHECK-NEXT: bx lr78 %tmp = ashr i32 %b, 779 %tmp1 = xor i32 %a, %tmp80 %tmp2 = icmp eq i32 %tmp1, 081 %ret = select i1 %tmp2, i32 42, i32 2482 ret i32 %ret83}84 85define i32 @f9(i32 %a, i32 %b) {86; CHECK-LABEL: f9:87; CHECK: @ %bb.0:88; CHECK-NEXT: movs r1, #2489; CHECK-NEXT: teq.w r0, r0, ror #890; CHECK-NEXT: it eq91; CHECK-NEXT: moveq r1, #4292; CHECK-NEXT: mov r0, r193; CHECK-NEXT: bx lr94 %l8 = shl i32 %a, 2495 %r8 = lshr i32 %a, 896 %tmp = or i32 %l8, %r897 %tmp1 = xor i32 %a, %tmp98 %tmp2 = icmp eq i32 %tmp1, 099 %ret = select i1 %tmp2, i32 42, i32 24100 ret i32 %ret101}102