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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefix=CHECK-DSP3; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP4; RUN: llc -mtriple=thumbv7em-eabi %s -o - | FileCheck %s -check-prefix=CHECK-DSP5; RUN: llc -mtriple=thumbv8m.main-none-eabi %s -o - | FileCheck %s -check-prefix=CHECK-NO-DSP6; RUN: llc -mtriple=thumbv8m.main-none-eabi -mattr=+dsp %s -o - | FileCheck %s -check-prefix=CHECK-DSP7 8define i32 @test1(i32 %x) {9; CHECK-DSP-LABEL: test1:10; CHECK-DSP: @ %bb.0:11; CHECK-DSP-NEXT: uxtb16 r0, r012; CHECK-DSP-NEXT: bx lr13;14; CHECK-NO-DSP-LABEL: test1:15; CHECK-NO-DSP: @ %bb.0:16; CHECK-NO-DSP-NEXT: bic r0, r0, #-1671193617; CHECK-NO-DSP-NEXT: bx lr18 %tmp1 = and i32 %x, 16711935 ; <i32> [#uses=1]19 ret i32 %tmp120}21 22; PR750323define i32 @test2(i32 %x) {24; CHECK-DSP-LABEL: test2:25; CHECK-DSP: @ %bb.0:26; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #827; CHECK-DSP-NEXT: bx lr28;29; CHECK-NO-DSP-LABEL: test2:30; CHECK-NO-DSP: @ %bb.0:31; CHECK-NO-DSP-NEXT: mov.w r1, #1671193532; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #833; CHECK-NO-DSP-NEXT: bx lr34 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]35 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]36 ret i32 %tmp237}38 39define i32 @test3(i32 %x) {40; CHECK-DSP-LABEL: test3:41; CHECK-DSP: @ %bb.0:42; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #843; CHECK-DSP-NEXT: bx lr44;45; CHECK-NO-DSP-LABEL: test3:46; CHECK-NO-DSP: @ %bb.0:47; CHECK-NO-DSP-NEXT: mov.w r1, #1671193548; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #849; CHECK-NO-DSP-NEXT: bx lr50 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]51 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]52 ret i32 %tmp253}54 55define i32 @test4(i32 %x) {56; CHECK-DSP-LABEL: test4:57; CHECK-DSP: @ %bb.0:58; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #859; CHECK-DSP-NEXT: bx lr60;61; CHECK-NO-DSP-LABEL: test4:62; CHECK-NO-DSP: @ %bb.0:63; CHECK-NO-DSP-NEXT: mov.w r1, #1671193564; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #865; CHECK-NO-DSP-NEXT: bx lr66 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]67 %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]68 ret i32 %tmp669}70 71define i32 @test5(i32 %x) {72; CHECK-DSP-LABEL: test5:73; CHECK-DSP: @ %bb.0:74; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #875; CHECK-DSP-NEXT: bx lr76;77; CHECK-NO-DSP-LABEL: test5:78; CHECK-NO-DSP: @ %bb.0:79; CHECK-NO-DSP-NEXT: mov.w r1, #1671193580; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #881; CHECK-NO-DSP-NEXT: bx lr82 %tmp1 = lshr i32 %x, 8 ; <i32> [#uses=1]83 %tmp2 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]84 ret i32 %tmp285}86 87define i32 @test6(i32 %x) {88; CHECK-DSP-LABEL: test6:89; CHECK-DSP: @ %bb.0:90; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #1691; CHECK-DSP-NEXT: bx lr92;93; CHECK-NO-DSP-LABEL: test6:94; CHECK-NO-DSP: @ %bb.0:95; CHECK-NO-DSP-NEXT: mov.w r1, #1671193596; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #1697; CHECK-NO-DSP-NEXT: bx lr98 %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]99 %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]100 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]101 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]102 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]103 ret i32 %tmp6104}105 106define i32 @test7(i32 %x) {107; CHECK-DSP-LABEL: test7:108; CHECK-DSP: @ %bb.0:109; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #16110; CHECK-DSP-NEXT: bx lr111;112; CHECK-NO-DSP-LABEL: test7:113; CHECK-NO-DSP: @ %bb.0:114; CHECK-NO-DSP-NEXT: mov.w r1, #16711935115; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #16116; CHECK-NO-DSP-NEXT: bx lr117 %tmp1 = lshr i32 %x, 16 ; <i32> [#uses=1]118 %tmp2 = and i32 %tmp1, 255 ; <i32> [#uses=1]119 %tmp4 = shl i32 %x, 16 ; <i32> [#uses=1]120 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]121 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]122 ret i32 %tmp6123}124 125define i32 @test8(i32 %x) {126; CHECK-DSP-LABEL: test8:127; CHECK-DSP: @ %bb.0:128; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #24129; CHECK-DSP-NEXT: bx lr130;131; CHECK-NO-DSP-LABEL: test8:132; CHECK-NO-DSP: @ %bb.0:133; CHECK-NO-DSP-NEXT: mov.w r1, #16711935134; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #24135; CHECK-NO-DSP-NEXT: bx lr136 %tmp1 = shl i32 %x, 8 ; <i32> [#uses=1]137 %tmp2 = and i32 %tmp1, 16711680 ; <i32> [#uses=1]138 %tmp5 = lshr i32 %x, 24 ; <i32> [#uses=1]139 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]140 ret i32 %tmp6141}142 143define i32 @test9(i32 %x) {144; CHECK-DSP-LABEL: test9:145; CHECK-DSP: @ %bb.0:146; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #24147; CHECK-DSP-NEXT: bx lr148;149; CHECK-NO-DSP-LABEL: test9:150; CHECK-NO-DSP: @ %bb.0:151; CHECK-NO-DSP-NEXT: mov.w r1, #16711935152; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, ror #24153; CHECK-NO-DSP-NEXT: bx lr154 %tmp1 = lshr i32 %x, 24 ; <i32> [#uses=1]155 %tmp4 = shl i32 %x, 8 ; <i32> [#uses=1]156 %tmp5 = and i32 %tmp4, 16711680 ; <i32> [#uses=1]157 %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1]158 ret i32 %tmp6159}160 161; FIXME: Failed to match uxtb16162define i32 @test10(i32 %p0) {163; CHECK-DSP-LABEL: test10:164; CHECK-DSP: @ %bb.0:165; CHECK-DSP-NEXT: mov.w r1, #16253176166; CHECK-DSP-NEXT: mov.w r2, #458759167; CHECK-DSP-NEXT: and.w r1, r1, r0, lsr #7168; CHECK-DSP-NEXT: and.w r0, r2, r0, lsr #12169; CHECK-DSP-NEXT: add r0, r1170; CHECK-DSP-NEXT: bx lr171;172; CHECK-NO-DSP-LABEL: test10:173; CHECK-NO-DSP: @ %bb.0:174; CHECK-NO-DSP-NEXT: mov.w r1, #16253176175; CHECK-NO-DSP-NEXT: mov.w r2, #458759176; CHECK-NO-DSP-NEXT: and.w r1, r1, r0, lsr #7177; CHECK-NO-DSP-NEXT: and.w r0, r2, r0, lsr #12178; CHECK-NO-DSP-NEXT: add r0, r1179; CHECK-NO-DSP-NEXT: bx lr180 %tmp1 = lshr i32 %p0, 7181 %tmp2 = and i32 %tmp1, 16253176182 %tmp4 = lshr i32 %p0, 12183 %tmp5 = and i32 %tmp4, 458759184 %tmp7 = or i32 %tmp5, %tmp2185 ret i32 %tmp7186}187 188define i32 @test11(i32 %p0) {189; CHECK-DSP-LABEL: test11:190; CHECK-DSP: @ %bb.0:191; CHECK-DSP-NEXT: and r0, r0, #3192; CHECK-DSP-NEXT: mov.w r1, #65537193; CHECK-DSP-NEXT: lsl.w r0, r1, r0194; CHECK-DSP-NEXT: lsrs r0, r0, #1195; CHECK-DSP-NEXT: uxtb16 r0, r0196; CHECK-DSP-NEXT: bx lr197;198; CHECK-NO-DSP-LABEL: test11:199; CHECK-NO-DSP: @ %bb.0:200; CHECK-NO-DSP-NEXT: and r0, r0, #3201; CHECK-NO-DSP-NEXT: mov.w r1, #65537202; CHECK-NO-DSP-NEXT: lsl.w r0, r1, r0203; CHECK-NO-DSP-NEXT: mov.w r1, #458759204; CHECK-NO-DSP-NEXT: and.w r0, r1, r0, lsr #1205; CHECK-NO-DSP-NEXT: bx lr206 %p = and i32 %p0, 3207 %a = shl i32 65537, %p208 %b = lshr i32 %a, 1209 %tmp7 = and i32 %b, 458759210 ret i32 %tmp7211}212 213