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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s3 4declare <512 x float> @llvm.vp.fdiv.v512f32(<512 x float>, <512 x float>, <512 x i1>, i32)5 6define fastcc <512 x float> @test_vp_fdiv_v512f32_vv(<512 x float> %i0, <512 x float> %i1, <512 x i1> %m, i32 %n) {7; CHECK-LABEL: test_vp_fdiv_v512f32_vv:8; CHECK: # %bb.0:9; CHECK-NEXT: and %s1, %s0, (32)010; CHECK-NEXT: srl %s1, %s1, 111; CHECK-NEXT: lvl %s112; CHECK-NEXT: vshf %v2, %v1, %v1, 413; CHECK-NEXT: vshf %v3, %v0, %v0, 414; CHECK-NEXT: vfdiv.s %v2, %v3, %v2, %vm315; CHECK-NEXT: adds.w.sx %s0, 1, %s016; CHECK-NEXT: and %s0, %s0, (32)017; CHECK-NEXT: srl %s0, %s0, 118; CHECK-NEXT: lvl %s019; CHECK-NEXT: vfdiv.s %v0, %v0, %v1, %vm220; CHECK-NEXT: vshf %v0, %v2, %v0, 821; CHECK-NEXT: b.l.t (, %s10)22 %r0 = call <512 x float> @llvm.vp.fdiv.v512f32(<512 x float> %i0, <512 x float> %i1, <512 x i1> %m, i32 %n)23 ret <512 x float> %r024}25 26define fastcc <512 x float> @test_vp_fdiv_v512f32_rv(float %s0, <512 x float> %i1, <512 x i1> %m, i32 %n) {27; CHECK-LABEL: test_vp_fdiv_v512f32_rv:28; CHECK: # %bb.0:29; CHECK-NEXT: and %s2, %s0, (32)130; CHECK-NEXT: srl %s0, %s0, 3231; CHECK-NEXT: or %s0, %s0, %s232; CHECK-NEXT: lea %s2, 25633; CHECK-NEXT: lvl %s234; CHECK-NEXT: vbrd %v1, %s035; CHECK-NEXT: adds.w.sx %s0, 1, %s136; CHECK-NEXT: and %s0, %s0, (32)037; CHECK-NEXT: srl %s0, %s0, 138; CHECK-NEXT: lvl %s039; CHECK-NEXT: vfdiv.s %v2, %v1, %v0, %vm240; CHECK-NEXT: and %s1, %s1, (32)041; CHECK-NEXT: srl %s1, %s1, 142; CHECK-NEXT: lvl %s143; CHECK-NEXT: vshf %v1, %v1, %v1, 444; CHECK-NEXT: vshf %v0, %v0, %v0, 445; CHECK-NEXT: vfdiv.s %v0, %v1, %v0, %vm346; CHECK-NEXT: lvl %s047; CHECK-NEXT: vshf %v0, %v0, %v2, 848; CHECK-NEXT: b.l.t (, %s10)49 %xins = insertelement <512 x float> undef, float %s0, i32 050 %i0 = shufflevector <512 x float> %xins, <512 x float> undef, <512 x i32> zeroinitializer51 %r0 = call <512 x float> @llvm.vp.fdiv.v512f32(<512 x float> %i0, <512 x float> %i1, <512 x i1> %m, i32 %n)52 ret <512 x float> %r053}54 55define fastcc <512 x float> @test_vp_fdiv_v512f32_vr(<512 x float> %i0, float %s1, <512 x i1> %m, i32 %n) {56; CHECK-LABEL: test_vp_fdiv_v512f32_vr:57; CHECK: # %bb.0:58; CHECK-NEXT: and %s2, %s0, (32)159; CHECK-NEXT: srl %s0, %s0, 3260; CHECK-NEXT: or %s0, %s0, %s261; CHECK-NEXT: lea %s2, 25662; CHECK-NEXT: lvl %s263; CHECK-NEXT: vbrd %v1, %s064; CHECK-NEXT: adds.w.sx %s0, 1, %s165; CHECK-NEXT: and %s0, %s0, (32)066; CHECK-NEXT: srl %s0, %s0, 167; CHECK-NEXT: lvl %s068; CHECK-NEXT: vfdiv.s %v2, %v0, %v1, %vm269; CHECK-NEXT: and %s1, %s1, (32)070; CHECK-NEXT: srl %s1, %s1, 171; CHECK-NEXT: lvl %s172; CHECK-NEXT: vshf %v1, %v1, %v1, 473; CHECK-NEXT: vshf %v0, %v0, %v0, 474; CHECK-NEXT: vfdiv.s %v0, %v0, %v1, %vm375; CHECK-NEXT: lvl %s076; CHECK-NEXT: vshf %v0, %v0, %v2, 877; CHECK-NEXT: b.l.t (, %s10)78 %yins = insertelement <512 x float> undef, float %s1, i32 079 %i1 = shufflevector <512 x float> %yins, <512 x float> undef, <512 x i32> zeroinitializer80 %r0 = call <512 x float> @llvm.vp.fdiv.v512f32(<512 x float> %i0, <512 x float> %i1, <512 x i1> %m, i32 %n)81 ret <512 x float> %r082}83