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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s3 4declare <512 x i32> @llvm.vp.mul.v512i32(<512 x i32>, <512 x i32>, <512 x i1>, i32)5 6define fastcc <512 x i32> @test_vp_v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n) {7; CHECK-LABEL: test_vp_v512i32:8; CHECK: # %bb.0:9; CHECK-NEXT: adds.w.sx %s1, 1, %s010; CHECK-NEXT: and %s1, %s1, (32)011; CHECK-NEXT: srl %s1, %s1, 112; CHECK-NEXT: lvl %s113; CHECK-NEXT: vshf %v2, %v1, %v1, 014; CHECK-NEXT: vshf %v3, %v0, %v0, 015; CHECK-NEXT: vmuls.w.sx %v2, %v3, %v2, %vm216; CHECK-NEXT: and %s0, %s0, (32)017; CHECK-NEXT: srl %s0, %s0, 118; CHECK-NEXT: lvl %s019; CHECK-NEXT: vmuls.w.sx %v0, %v0, %v1, %vm320; CHECK-NEXT: lvl %s121; CHECK-NEXT: vshf %v0, %v0, %v2, 1322; CHECK-NEXT: b.l.t (, %s10)23 %r0 = call <512 x i32> @llvm.vp.mul.v512i32(<512 x i32> %i0, <512 x i32> %i1, <512 x i1> %m, i32 %n)24 ret <512 x i32> %r025}26