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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc < %s -mtriple=ve | FileCheck %s3 4;;; Test atomic swap for all types and all memory order5;;;6;;; Note:7;;; - We test i1/i8/i16/i32/i64/i128/u8/u16/u32/u64/u128.8;;; - We test relaxed, acquire, and seq_cst.9;;; - We test only exchange with variables since VE doesn't have exchange10;;; instructions with immediate values.11;;; - We test against an object, a stack object, and a global variable.12 13%"struct.std::__1::atomic" = type { %"struct.std::__1::__atomic_base" }14%"struct.std::__1::__atomic_base" = type { %"struct.std::__1::__cxx_atomic_impl" }15%"struct.std::__1::__cxx_atomic_impl" = type { %"struct.std::__1::__cxx_atomic_base_impl" }16%"struct.std::__1::__cxx_atomic_base_impl" = type { i8 }17%"struct.std::__1::atomic.0" = type { %"struct.std::__1::__atomic_base.1" }18%"struct.std::__1::__atomic_base.1" = type { %"struct.std::__1::__atomic_base.2" }19%"struct.std::__1::__atomic_base.2" = type { %"struct.std::__1::__cxx_atomic_impl.3" }20%"struct.std::__1::__cxx_atomic_impl.3" = type { %"struct.std::__1::__cxx_atomic_base_impl.4" }21%"struct.std::__1::__cxx_atomic_base_impl.4" = type { i8 }22%"struct.std::__1::atomic.5" = type { %"struct.std::__1::__atomic_base.6" }23%"struct.std::__1::__atomic_base.6" = type { %"struct.std::__1::__atomic_base.7" }24%"struct.std::__1::__atomic_base.7" = type { %"struct.std::__1::__cxx_atomic_impl.8" }25%"struct.std::__1::__cxx_atomic_impl.8" = type { %"struct.std::__1::__cxx_atomic_base_impl.9" }26%"struct.std::__1::__cxx_atomic_base_impl.9" = type { i8 }27%"struct.std::__1::atomic.10" = type { %"struct.std::__1::__atomic_base.11" }28%"struct.std::__1::__atomic_base.11" = type { %"struct.std::__1::__atomic_base.12" }29%"struct.std::__1::__atomic_base.12" = type { %"struct.std::__1::__cxx_atomic_impl.13" }30%"struct.std::__1::__cxx_atomic_impl.13" = type { %"struct.std::__1::__cxx_atomic_base_impl.14" }31%"struct.std::__1::__cxx_atomic_base_impl.14" = type { i16 }32%"struct.std::__1::atomic.15" = type { %"struct.std::__1::__atomic_base.16" }33%"struct.std::__1::__atomic_base.16" = type { %"struct.std::__1::__atomic_base.17" }34%"struct.std::__1::__atomic_base.17" = type { %"struct.std::__1::__cxx_atomic_impl.18" }35%"struct.std::__1::__cxx_atomic_impl.18" = type { %"struct.std::__1::__cxx_atomic_base_impl.19" }36%"struct.std::__1::__cxx_atomic_base_impl.19" = type { i16 }37%"struct.std::__1::atomic.20" = type { %"struct.std::__1::__atomic_base.21" }38%"struct.std::__1::__atomic_base.21" = type { %"struct.std::__1::__atomic_base.22" }39%"struct.std::__1::__atomic_base.22" = type { %"struct.std::__1::__cxx_atomic_impl.23" }40%"struct.std::__1::__cxx_atomic_impl.23" = type { %"struct.std::__1::__cxx_atomic_base_impl.24" }41%"struct.std::__1::__cxx_atomic_base_impl.24" = type { i32 }42%"struct.std::__1::atomic.25" = type { %"struct.std::__1::__atomic_base.26" }43%"struct.std::__1::__atomic_base.26" = type { %"struct.std::__1::__atomic_base.27" }44%"struct.std::__1::__atomic_base.27" = type { %"struct.std::__1::__cxx_atomic_impl.28" }45%"struct.std::__1::__cxx_atomic_impl.28" = type { %"struct.std::__1::__cxx_atomic_base_impl.29" }46%"struct.std::__1::__cxx_atomic_base_impl.29" = type { i32 }47%"struct.std::__1::atomic.30" = type { %"struct.std::__1::__atomic_base.31" }48%"struct.std::__1::__atomic_base.31" = type { %"struct.std::__1::__atomic_base.32" }49%"struct.std::__1::__atomic_base.32" = type { %"struct.std::__1::__cxx_atomic_impl.33" }50%"struct.std::__1::__cxx_atomic_impl.33" = type { %"struct.std::__1::__cxx_atomic_base_impl.34" }51%"struct.std::__1::__cxx_atomic_base_impl.34" = type { i64 }52%"struct.std::__1::atomic.35" = type { %"struct.std::__1::__atomic_base.36" }53%"struct.std::__1::__atomic_base.36" = type { %"struct.std::__1::__atomic_base.37" }54%"struct.std::__1::__atomic_base.37" = type { %"struct.std::__1::__cxx_atomic_impl.38" }55%"struct.std::__1::__cxx_atomic_impl.38" = type { %"struct.std::__1::__cxx_atomic_base_impl.39" }56%"struct.std::__1::__cxx_atomic_base_impl.39" = type { i64 }57%"struct.std::__1::atomic.40" = type { %"struct.std::__1::__atomic_base.41" }58%"struct.std::__1::__atomic_base.41" = type { %"struct.std::__1::__atomic_base.42" }59%"struct.std::__1::__atomic_base.42" = type { %"struct.std::__1::__cxx_atomic_impl.43" }60%"struct.std::__1::__cxx_atomic_impl.43" = type { %"struct.std::__1::__cxx_atomic_base_impl.44" }61%"struct.std::__1::__cxx_atomic_base_impl.44" = type { i128 }62%"struct.std::__1::atomic.45" = type { %"struct.std::__1::__atomic_base.46" }63%"struct.std::__1::__atomic_base.46" = type { %"struct.std::__1::__atomic_base.47" }64%"struct.std::__1::__atomic_base.47" = type { %"struct.std::__1::__cxx_atomic_impl.48" }65%"struct.std::__1::__cxx_atomic_impl.48" = type { %"struct.std::__1::__cxx_atomic_base_impl.49" }66%"struct.std::__1::__cxx_atomic_base_impl.49" = type { i128 }67 68@gv_i1 = global %"struct.std::__1::atomic" zeroinitializer, align 469@gv_i8 = global %"struct.std::__1::atomic.0" zeroinitializer, align 470@gv_u8 = global %"struct.std::__1::atomic.5" zeroinitializer, align 471@gv_i16 = global %"struct.std::__1::atomic.10" zeroinitializer, align 472@gv_u16 = global %"struct.std::__1::atomic.15" zeroinitializer, align 473@gv_i32 = global %"struct.std::__1::atomic.20" zeroinitializer, align 474@gv_u32 = global %"struct.std::__1::atomic.25" zeroinitializer, align 475@gv_i64 = global %"struct.std::__1::atomic.30" zeroinitializer, align 876@gv_u64 = global %"struct.std::__1::atomic.35" zeroinitializer, align 877@gv_i128 = global %"struct.std::__1::atomic.40" zeroinitializer, align 1678@gv_u128 = global %"struct.std::__1::atomic.45" zeroinitializer, align 1679 80; Function Attrs: nofree norecurse nounwind mustprogress81define zeroext i1 @_Z22atomic_swap_relaxed_i1RNSt3__16atomicIbEEb(ptr nocapture nonnull align 1 dereferenceable(1) %0, i1 zeroext %1) {82; CHECK-LABEL: _Z22atomic_swap_relaxed_i1RNSt3__16atomicIbEEb:83; CHECK: # %bb.0:84; CHECK-NEXT: and %s2, 3, %s085; CHECK-NEXT: sla.w.sx %s3, %s2, 386; CHECK-NEXT: sla.w.sx %s1, %s1, %s387; CHECK-NEXT: and %s0, -4, %s088; CHECK-NEXT: sla.w.sx %s2, (63)0, %s289; CHECK-NEXT: ts1am.w %s1, (%s0), %s290; CHECK-NEXT: and %s0, %s1, (32)091; CHECK-NEXT: srl %s0, %s0, %s392; CHECK-NEXT: and %s0, 1, %s093; CHECK-NEXT: b.l.t (, %s10)94 %3 = zext i1 %1 to i895 %4 = atomicrmw xchg ptr %0, i8 %3 monotonic96 %5 = and i8 %4, 197 %6 = icmp ne i8 %5, 098 ret i1 %699}100 101; Function Attrs: nofree norecurse nounwind mustprogress102define signext i8 @_Z22atomic_swap_relaxed_i8RNSt3__16atomicIcEEc(ptr nocapture nonnull align 1 dereferenceable(1) %0, i8 signext %1) {103; CHECK-LABEL: _Z22atomic_swap_relaxed_i8RNSt3__16atomicIcEEc:104; CHECK: # %bb.0:105; CHECK-NEXT: and %s2, 3, %s0106; CHECK-NEXT: sla.w.sx %s3, %s2, 3107; CHECK-NEXT: sla.w.sx %s1, %s1, %s3108; CHECK-NEXT: and %s0, -4, %s0109; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2110; CHECK-NEXT: ts1am.w %s1, (%s0), %s2111; CHECK-NEXT: and %s0, %s1, (32)0112; CHECK-NEXT: srl %s0, %s0, %s3113; CHECK-NEXT: sll %s0, %s0, 56114; CHECK-NEXT: sra.l %s0, %s0, 56115; CHECK-NEXT: b.l.t (, %s10)116 %3 = atomicrmw xchg ptr %0, i8 %1 monotonic117 ret i8 %3118}119 120; Function Attrs: nofree norecurse nounwind mustprogress121define zeroext i8 @_Z22atomic_swap_relaxed_u8RNSt3__16atomicIhEEh(ptr nocapture nonnull align 1 dereferenceable(1) %0, i8 zeroext %1) {122; CHECK-LABEL: _Z22atomic_swap_relaxed_u8RNSt3__16atomicIhEEh:123; CHECK: # %bb.0:124; CHECK-NEXT: and %s2, 3, %s0125; CHECK-NEXT: sla.w.sx %s3, %s2, 3126; CHECK-NEXT: sla.w.sx %s1, %s1, %s3127; CHECK-NEXT: and %s0, -4, %s0128; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2129; CHECK-NEXT: ts1am.w %s1, (%s0), %s2130; CHECK-NEXT: and %s0, %s1, (32)0131; CHECK-NEXT: srl %s0, %s0, %s3132; CHECK-NEXT: and %s0, %s0, (56)0133; CHECK-NEXT: b.l.t (, %s10)134 %3 = atomicrmw xchg ptr %0, i8 %1 monotonic135 ret i8 %3136}137 138; Function Attrs: nofree norecurse nounwind mustprogress139define signext i16 @_Z23atomic_swap_relaxed_i16RNSt3__16atomicIsEEs(ptr nocapture nonnull align 2 dereferenceable(2) %0, i16 signext %1) {140; CHECK-LABEL: _Z23atomic_swap_relaxed_i16RNSt3__16atomicIsEEs:141; CHECK: # %bb.0:142; CHECK-NEXT: and %s2, 3, %s0143; CHECK-NEXT: sla.w.sx %s3, %s2, 3144; CHECK-NEXT: sla.w.sx %s1, %s1, %s3145; CHECK-NEXT: and %s0, -4, %s0146; CHECK-NEXT: sla.w.sx %s2, (62)0, %s2147; CHECK-NEXT: ts1am.w %s1, (%s0), %s2148; CHECK-NEXT: and %s0, %s1, (32)0149; CHECK-NEXT: srl %s0, %s0, %s3150; CHECK-NEXT: sll %s0, %s0, 48151; CHECK-NEXT: sra.l %s0, %s0, 48152; CHECK-NEXT: b.l.t (, %s10)153 %3 = atomicrmw xchg ptr %0, i16 %1 monotonic154 ret i16 %3155}156 157; Function Attrs: nofree norecurse nounwind mustprogress158define zeroext i16 @_Z23atomic_swap_relaxed_u16RNSt3__16atomicItEEt(ptr nocapture nonnull align 2 dereferenceable(2) %0, i16 zeroext %1) {159; CHECK-LABEL: _Z23atomic_swap_relaxed_u16RNSt3__16atomicItEEt:160; CHECK: # %bb.0:161; CHECK-NEXT: and %s2, 3, %s0162; CHECK-NEXT: sla.w.sx %s3, %s2, 3163; CHECK-NEXT: sla.w.sx %s1, %s1, %s3164; CHECK-NEXT: and %s0, -4, %s0165; CHECK-NEXT: sla.w.sx %s2, (62)0, %s2166; CHECK-NEXT: ts1am.w %s1, (%s0), %s2167; CHECK-NEXT: and %s0, %s1, (32)0168; CHECK-NEXT: srl %s0, %s0, %s3169; CHECK-NEXT: and %s0, %s0, (48)0170; CHECK-NEXT: b.l.t (, %s10)171 %3 = atomicrmw xchg ptr %0, i16 %1 monotonic172 ret i16 %3173}174 175; Function Attrs: nofree norecurse nounwind mustprogress176define signext i32 @_Z23atomic_swap_relaxed_i32RNSt3__16atomicIiEEi(ptr nocapture nonnull align 4 dereferenceable(4) %0, i32 signext %1) {177; CHECK-LABEL: _Z23atomic_swap_relaxed_i32RNSt3__16atomicIiEEi:178; CHECK: # %bb.0:179; CHECK-NEXT: ts1am.w %s1, (%s0), 15180; CHECK-NEXT: adds.w.sx %s0, %s1, (0)1181; CHECK-NEXT: b.l.t (, %s10)182 %3 = atomicrmw xchg ptr %0, i32 %1 monotonic183 ret i32 %3184}185 186; Function Attrs: nofree norecurse nounwind mustprogress187define zeroext i32 @_Z23atomic_swap_relaxed_u32RNSt3__16atomicIjEEj(ptr nocapture nonnull align 4 dereferenceable(4) %0, i32 zeroext %1) {188; CHECK-LABEL: _Z23atomic_swap_relaxed_u32RNSt3__16atomicIjEEj:189; CHECK: # %bb.0:190; CHECK-NEXT: ts1am.w %s1, (%s0), 15191; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1192; CHECK-NEXT: b.l.t (, %s10)193 %3 = atomicrmw xchg ptr %0, i32 %1 monotonic194 ret i32 %3195}196 197; Function Attrs: nofree norecurse nounwind mustprogress198define i64 @_Z23atomic_swap_relaxed_i64RNSt3__16atomicIlEEl(ptr nocapture nonnull align 8 dereferenceable(8) %0, i64 %1) {199; CHECK-LABEL: _Z23atomic_swap_relaxed_i64RNSt3__16atomicIlEEl:200; CHECK: # %bb.0:201; CHECK-NEXT: lea %s2, 255202; CHECK-NEXT: ts1am.l %s1, (%s0), %s2203; CHECK-NEXT: or %s0, 0, %s1204; CHECK-NEXT: b.l.t (, %s10)205 %3 = atomicrmw xchg ptr %0, i64 %1 monotonic206 ret i64 %3207}208 209; Function Attrs: nofree norecurse nounwind mustprogress210define i64 @_Z23atomic_swap_relaxed_u64RNSt3__16atomicImEEm(ptr nocapture nonnull align 8 dereferenceable(8) %0, i64 %1) {211; CHECK-LABEL: _Z23atomic_swap_relaxed_u64RNSt3__16atomicImEEm:212; CHECK: # %bb.0:213; CHECK-NEXT: lea %s2, 255214; CHECK-NEXT: ts1am.l %s1, (%s0), %s2215; CHECK-NEXT: or %s0, 0, %s1216; CHECK-NEXT: b.l.t (, %s10)217 %3 = atomicrmw xchg ptr %0, i64 %1 monotonic218 ret i64 %3219}220 221; Function Attrs: nounwind mustprogress222define i128 @_Z24atomic_swap_relaxed_i128RNSt3__16atomicInEEn(ptr nonnull align 16 dereferenceable(16) %0, i128 %1) {223; CHECK-LABEL: _Z24atomic_swap_relaxed_i128RNSt3__16atomicInEEn:224; CHECK: # %bb.0:225; CHECK-NEXT: st %s9, (, %s11)226; CHECK-NEXT: st %s10, 8(, %s11)227; CHECK-NEXT: or %s9, 0, %s11228; CHECK-NEXT: lea %s11, -272(, %s11)229; CHECK-NEXT: brge.l.t %s11, %s8, .LBB9_2230; CHECK-NEXT: # %bb.1:231; CHECK-NEXT: ld %s61, 24(, %s14)232; CHECK-NEXT: or %s62, 0, %s0233; CHECK-NEXT: lea %s63, 315234; CHECK-NEXT: shm.l %s63, (%s61)235; CHECK-NEXT: shm.l %s8, 8(%s61)236; CHECK-NEXT: shm.l %s11, 16(%s61)237; CHECK-NEXT: monc238; CHECK-NEXT: or %s0, 0, %s62239; CHECK-NEXT: .LBB9_2:240; CHECK-NEXT: or %s5, 0, %s0241; CHECK-NEXT: st %s2, 264(, %s11)242; CHECK-NEXT: st %s1, 256(, %s11)243; CHECK-NEXT: lea %s0, __atomic_exchange@lo244; CHECK-NEXT: and %s0, %s0, (32)0245; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)246; CHECK-NEXT: lea %s2, 256(, %s11)247; CHECK-NEXT: lea %s3, 240(, %s11)248; CHECK-NEXT: or %s0, 16, (0)1249; CHECK-NEXT: or %s4, 0, (0)1250; CHECK-NEXT: or %s1, 0, %s5251; CHECK-NEXT: bsic %s10, (, %s12)252; CHECK-NEXT: ld %s1, 248(, %s11)253; CHECK-NEXT: ld %s0, 240(, %s11)254; CHECK-NEXT: or %s11, 0, %s9255; CHECK-NEXT: ld %s10, 8(, %s11)256; CHECK-NEXT: ld %s9, (, %s11)257; CHECK-NEXT: b.l.t (, %s10)258 %3 = alloca i128, align 16259 %4 = alloca i128, align 16260 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)261 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)262 store i128 %1, ptr %3, align 16, !tbaa !2263 call void @__atomic_exchange(i64 16, ptr nonnull %0, ptr nonnull %3, ptr nonnull %4, i32 signext 0)264 %5 = load i128, ptr %4, align 16, !tbaa !2265 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)266 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)267 ret i128 %5268}269 270; Function Attrs: nounwind mustprogress271define i128 @_Z24atomic_swap_relaxed_u128RNSt3__16atomicIoEEo(ptr nonnull align 16 dereferenceable(16) %0, i128 %1) {272; CHECK-LABEL: _Z24atomic_swap_relaxed_u128RNSt3__16atomicIoEEo:273; CHECK: # %bb.0:274; CHECK-NEXT: st %s9, (, %s11)275; CHECK-NEXT: st %s10, 8(, %s11)276; CHECK-NEXT: or %s9, 0, %s11277; CHECK-NEXT: lea %s11, -272(, %s11)278; CHECK-NEXT: brge.l.t %s11, %s8, .LBB10_2279; CHECK-NEXT: # %bb.1:280; CHECK-NEXT: ld %s61, 24(, %s14)281; CHECK-NEXT: or %s62, 0, %s0282; CHECK-NEXT: lea %s63, 315283; CHECK-NEXT: shm.l %s63, (%s61)284; CHECK-NEXT: shm.l %s8, 8(%s61)285; CHECK-NEXT: shm.l %s11, 16(%s61)286; CHECK-NEXT: monc287; CHECK-NEXT: or %s0, 0, %s62288; CHECK-NEXT: .LBB10_2:289; CHECK-NEXT: or %s5, 0, %s0290; CHECK-NEXT: st %s2, 264(, %s11)291; CHECK-NEXT: st %s1, 256(, %s11)292; CHECK-NEXT: lea %s0, __atomic_exchange@lo293; CHECK-NEXT: and %s0, %s0, (32)0294; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)295; CHECK-NEXT: lea %s2, 256(, %s11)296; CHECK-NEXT: lea %s3, 240(, %s11)297; CHECK-NEXT: or %s0, 16, (0)1298; CHECK-NEXT: or %s4, 0, (0)1299; CHECK-NEXT: or %s1, 0, %s5300; CHECK-NEXT: bsic %s10, (, %s12)301; CHECK-NEXT: ld %s1, 248(, %s11)302; CHECK-NEXT: ld %s0, 240(, %s11)303; CHECK-NEXT: or %s11, 0, %s9304; CHECK-NEXT: ld %s10, 8(, %s11)305; CHECK-NEXT: ld %s9, (, %s11)306; CHECK-NEXT: b.l.t (, %s10)307 %3 = alloca i128, align 16308 %4 = alloca i128, align 16309 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)310 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)311 store i128 %1, ptr %3, align 16, !tbaa !2312 call void @__atomic_exchange(i64 16, ptr nonnull %0, ptr nonnull %3, ptr nonnull %4, i32 signext 0)313 %5 = load i128, ptr %4, align 16, !tbaa !2314 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)315 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)316 ret i128 %5317}318 319; Function Attrs: nofree norecurse nounwind mustprogress320define zeroext i1 @_Z22atomic_swap_acquire_i1RNSt3__16atomicIbEEb(ptr nocapture nonnull align 1 dereferenceable(1) %0, i1 zeroext %1) {321; CHECK-LABEL: _Z22atomic_swap_acquire_i1RNSt3__16atomicIbEEb:322; CHECK: # %bb.0:323; CHECK-NEXT: and %s2, 3, %s0324; CHECK-NEXT: sla.w.sx %s3, %s2, 3325; CHECK-NEXT: sla.w.sx %s1, %s1, %s3326; CHECK-NEXT: and %s0, -4, %s0327; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2328; CHECK-NEXT: ts1am.w %s1, (%s0), %s2329; CHECK-NEXT: and %s0, %s1, (32)0330; CHECK-NEXT: srl %s0, %s0, %s3331; CHECK-NEXT: and %s0, 1, %s0332; CHECK-NEXT: fencem 2333; CHECK-NEXT: b.l.t (, %s10)334 %3 = zext i1 %1 to i8335 %4 = atomicrmw xchg ptr %0, i8 %3 acquire336 %5 = and i8 %4, 1337 %6 = icmp ne i8 %5, 0338 ret i1 %6339}340 341; Function Attrs: nofree norecurse nounwind mustprogress342define signext i8 @_Z22atomic_swap_acquire_i8RNSt3__16atomicIcEEc(ptr nocapture nonnull align 1 dereferenceable(1) %0, i8 signext %1) {343; CHECK-LABEL: _Z22atomic_swap_acquire_i8RNSt3__16atomicIcEEc:344; CHECK: # %bb.0:345; CHECK-NEXT: and %s2, 3, %s0346; CHECK-NEXT: sla.w.sx %s3, %s2, 3347; CHECK-NEXT: sla.w.sx %s1, %s1, %s3348; CHECK-NEXT: and %s0, -4, %s0349; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2350; CHECK-NEXT: ts1am.w %s1, (%s0), %s2351; CHECK-NEXT: and %s0, %s1, (32)0352; CHECK-NEXT: srl %s0, %s0, %s3353; CHECK-NEXT: sll %s0, %s0, 56354; CHECK-NEXT: sra.l %s0, %s0, 56355; CHECK-NEXT: fencem 2356; CHECK-NEXT: b.l.t (, %s10)357 %3 = atomicrmw xchg ptr %0, i8 %1 acquire358 ret i8 %3359}360 361; Function Attrs: nofree norecurse nounwind mustprogress362define zeroext i8 @_Z22atomic_swap_acquire_u8RNSt3__16atomicIhEEh(ptr nocapture nonnull align 1 dereferenceable(1) %0, i8 zeroext %1) {363; CHECK-LABEL: _Z22atomic_swap_acquire_u8RNSt3__16atomicIhEEh:364; CHECK: # %bb.0:365; CHECK-NEXT: and %s2, 3, %s0366; CHECK-NEXT: sla.w.sx %s3, %s2, 3367; CHECK-NEXT: sla.w.sx %s1, %s1, %s3368; CHECK-NEXT: and %s0, -4, %s0369; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2370; CHECK-NEXT: ts1am.w %s1, (%s0), %s2371; CHECK-NEXT: and %s0, %s1, (32)0372; CHECK-NEXT: srl %s0, %s0, %s3373; CHECK-NEXT: and %s0, %s0, (56)0374; CHECK-NEXT: fencem 2375; CHECK-NEXT: b.l.t (, %s10)376 %3 = atomicrmw xchg ptr %0, i8 %1 acquire377 ret i8 %3378}379 380; Function Attrs: nofree norecurse nounwind mustprogress381define signext i16 @_Z23atomic_swap_acquire_i16RNSt3__16atomicIsEEs(ptr nocapture nonnull align 2 dereferenceable(2) %0, i16 signext %1) {382; CHECK-LABEL: _Z23atomic_swap_acquire_i16RNSt3__16atomicIsEEs:383; CHECK: # %bb.0:384; CHECK-NEXT: and %s2, 3, %s0385; CHECK-NEXT: sla.w.sx %s3, %s2, 3386; CHECK-NEXT: sla.w.sx %s1, %s1, %s3387; CHECK-NEXT: and %s0, -4, %s0388; CHECK-NEXT: sla.w.sx %s2, (62)0, %s2389; CHECK-NEXT: ts1am.w %s1, (%s0), %s2390; CHECK-NEXT: and %s0, %s1, (32)0391; CHECK-NEXT: srl %s0, %s0, %s3392; CHECK-NEXT: sll %s0, %s0, 48393; CHECK-NEXT: sra.l %s0, %s0, 48394; CHECK-NEXT: fencem 2395; CHECK-NEXT: b.l.t (, %s10)396 %3 = atomicrmw xchg ptr %0, i16 %1 acquire397 ret i16 %3398}399 400; Function Attrs: nofree norecurse nounwind mustprogress401define zeroext i16 @_Z23atomic_swap_acquire_u16RNSt3__16atomicItEEt(ptr nocapture nonnull align 2 dereferenceable(2) %0, i16 zeroext %1) {402; CHECK-LABEL: _Z23atomic_swap_acquire_u16RNSt3__16atomicItEEt:403; CHECK: # %bb.0:404; CHECK-NEXT: and %s2, 3, %s0405; CHECK-NEXT: sla.w.sx %s3, %s2, 3406; CHECK-NEXT: sla.w.sx %s1, %s1, %s3407; CHECK-NEXT: and %s0, -4, %s0408; CHECK-NEXT: sla.w.sx %s2, (62)0, %s2409; CHECK-NEXT: ts1am.w %s1, (%s0), %s2410; CHECK-NEXT: and %s0, %s1, (32)0411; CHECK-NEXT: srl %s0, %s0, %s3412; CHECK-NEXT: and %s0, %s0, (48)0413; CHECK-NEXT: fencem 2414; CHECK-NEXT: b.l.t (, %s10)415 %3 = atomicrmw xchg ptr %0, i16 %1 acquire416 ret i16 %3417}418 419; Function Attrs: nofree norecurse nounwind mustprogress420define signext i32 @_Z23atomic_swap_acquire_i32RNSt3__16atomicIiEEi(ptr nocapture nonnull align 4 dereferenceable(4) %0, i32 signext %1) {421; CHECK-LABEL: _Z23atomic_swap_acquire_i32RNSt3__16atomicIiEEi:422; CHECK: # %bb.0:423; CHECK-NEXT: ts1am.w %s1, (%s0), 15424; CHECK-NEXT: adds.w.sx %s0, %s1, (0)1425; CHECK-NEXT: fencem 2426; CHECK-NEXT: b.l.t (, %s10)427 %3 = atomicrmw xchg ptr %0, i32 %1 acquire428 ret i32 %3429}430 431; Function Attrs: nofree norecurse nounwind mustprogress432define zeroext i32 @_Z23atomic_swap_acquire_u32RNSt3__16atomicIjEEj(ptr nocapture nonnull align 4 dereferenceable(4) %0, i32 zeroext %1) {433; CHECK-LABEL: _Z23atomic_swap_acquire_u32RNSt3__16atomicIjEEj:434; CHECK: # %bb.0:435; CHECK-NEXT: ts1am.w %s1, (%s0), 15436; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1437; CHECK-NEXT: fencem 2438; CHECK-NEXT: b.l.t (, %s10)439 %3 = atomicrmw xchg ptr %0, i32 %1 acquire440 ret i32 %3441}442 443; Function Attrs: nofree norecurse nounwind mustprogress444define i64 @_Z23atomic_swap_acquire_i64RNSt3__16atomicIlEEl(ptr nocapture nonnull align 8 dereferenceable(8) %0, i64 %1) {445; CHECK-LABEL: _Z23atomic_swap_acquire_i64RNSt3__16atomicIlEEl:446; CHECK: # %bb.0:447; CHECK-NEXT: lea %s2, 255448; CHECK-NEXT: ts1am.l %s1, (%s0), %s2449; CHECK-NEXT: fencem 2450; CHECK-NEXT: or %s0, 0, %s1451; CHECK-NEXT: b.l.t (, %s10)452 %3 = atomicrmw xchg ptr %0, i64 %1 acquire453 ret i64 %3454}455 456; Function Attrs: nofree norecurse nounwind mustprogress457define i64 @_Z23atomic_swap_acquire_u64RNSt3__16atomicImEEm(ptr nocapture nonnull align 8 dereferenceable(8) %0, i64 %1) {458; CHECK-LABEL: _Z23atomic_swap_acquire_u64RNSt3__16atomicImEEm:459; CHECK: # %bb.0:460; CHECK-NEXT: lea %s2, 255461; CHECK-NEXT: ts1am.l %s1, (%s0), %s2462; CHECK-NEXT: fencem 2463; CHECK-NEXT: or %s0, 0, %s1464; CHECK-NEXT: b.l.t (, %s10)465 %3 = atomicrmw xchg ptr %0, i64 %1 acquire466 ret i64 %3467}468 469; Function Attrs: nounwind mustprogress470define i128 @_Z24atomic_swap_acquire_i128RNSt3__16atomicInEEn(ptr nonnull align 16 dereferenceable(16) %0, i128 %1) {471; CHECK-LABEL: _Z24atomic_swap_acquire_i128RNSt3__16atomicInEEn:472; CHECK: # %bb.0:473; CHECK-NEXT: st %s9, (, %s11)474; CHECK-NEXT: st %s10, 8(, %s11)475; CHECK-NEXT: or %s9, 0, %s11476; CHECK-NEXT: lea %s11, -272(, %s11)477; CHECK-NEXT: brge.l.t %s11, %s8, .LBB20_2478; CHECK-NEXT: # %bb.1:479; CHECK-NEXT: ld %s61, 24(, %s14)480; CHECK-NEXT: or %s62, 0, %s0481; CHECK-NEXT: lea %s63, 315482; CHECK-NEXT: shm.l %s63, (%s61)483; CHECK-NEXT: shm.l %s8, 8(%s61)484; CHECK-NEXT: shm.l %s11, 16(%s61)485; CHECK-NEXT: monc486; CHECK-NEXT: or %s0, 0, %s62487; CHECK-NEXT: .LBB20_2:488; CHECK-NEXT: or %s5, 0, %s0489; CHECK-NEXT: st %s2, 264(, %s11)490; CHECK-NEXT: st %s1, 256(, %s11)491; CHECK-NEXT: lea %s0, __atomic_exchange@lo492; CHECK-NEXT: and %s0, %s0, (32)0493; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)494; CHECK-NEXT: lea %s2, 256(, %s11)495; CHECK-NEXT: lea %s3, 240(, %s11)496; CHECK-NEXT: or %s0, 16, (0)1497; CHECK-NEXT: or %s4, 2, (0)1498; CHECK-NEXT: or %s1, 0, %s5499; CHECK-NEXT: bsic %s10, (, %s12)500; CHECK-NEXT: ld %s1, 248(, %s11)501; CHECK-NEXT: ld %s0, 240(, %s11)502; CHECK-NEXT: or %s11, 0, %s9503; CHECK-NEXT: ld %s10, 8(, %s11)504; CHECK-NEXT: ld %s9, (, %s11)505; CHECK-NEXT: b.l.t (, %s10)506 %3 = alloca i128, align 16507 %4 = alloca i128, align 16508 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)509 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)510 store i128 %1, ptr %3, align 16, !tbaa !2511 call void @__atomic_exchange(i64 16, ptr nonnull %0, ptr nonnull %3, ptr nonnull %4, i32 signext 2)512 %5 = load i128, ptr %4, align 16, !tbaa !2513 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)514 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)515 ret i128 %5516}517 518; Function Attrs: nounwind mustprogress519define i128 @_Z24atomic_swap_acquire_u128RNSt3__16atomicIoEEo(ptr nonnull align 16 dereferenceable(16) %0, i128 %1) {520; CHECK-LABEL: _Z24atomic_swap_acquire_u128RNSt3__16atomicIoEEo:521; CHECK: # %bb.0:522; CHECK-NEXT: st %s9, (, %s11)523; CHECK-NEXT: st %s10, 8(, %s11)524; CHECK-NEXT: or %s9, 0, %s11525; CHECK-NEXT: lea %s11, -272(, %s11)526; CHECK-NEXT: brge.l.t %s11, %s8, .LBB21_2527; CHECK-NEXT: # %bb.1:528; CHECK-NEXT: ld %s61, 24(, %s14)529; CHECK-NEXT: or %s62, 0, %s0530; CHECK-NEXT: lea %s63, 315531; CHECK-NEXT: shm.l %s63, (%s61)532; CHECK-NEXT: shm.l %s8, 8(%s61)533; CHECK-NEXT: shm.l %s11, 16(%s61)534; CHECK-NEXT: monc535; CHECK-NEXT: or %s0, 0, %s62536; CHECK-NEXT: .LBB21_2:537; CHECK-NEXT: or %s5, 0, %s0538; CHECK-NEXT: st %s2, 264(, %s11)539; CHECK-NEXT: st %s1, 256(, %s11)540; CHECK-NEXT: lea %s0, __atomic_exchange@lo541; CHECK-NEXT: and %s0, %s0, (32)0542; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)543; CHECK-NEXT: lea %s2, 256(, %s11)544; CHECK-NEXT: lea %s3, 240(, %s11)545; CHECK-NEXT: or %s0, 16, (0)1546; CHECK-NEXT: or %s4, 2, (0)1547; CHECK-NEXT: or %s1, 0, %s5548; CHECK-NEXT: bsic %s10, (, %s12)549; CHECK-NEXT: ld %s1, 248(, %s11)550; CHECK-NEXT: ld %s0, 240(, %s11)551; CHECK-NEXT: or %s11, 0, %s9552; CHECK-NEXT: ld %s10, 8(, %s11)553; CHECK-NEXT: ld %s9, (, %s11)554; CHECK-NEXT: b.l.t (, %s10)555 %3 = alloca i128, align 16556 %4 = alloca i128, align 16557 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)558 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)559 store i128 %1, ptr %3, align 16, !tbaa !2560 call void @__atomic_exchange(i64 16, ptr nonnull %0, ptr nonnull %3, ptr nonnull %4, i32 signext 2)561 %5 = load i128, ptr %4, align 16, !tbaa !2562 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)563 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)564 ret i128 %5565}566 567; Function Attrs: nofree norecurse nounwind mustprogress568define zeroext i1 @_Z22atomic_swap_seq_cst_i1RNSt3__16atomicIbEEb(ptr nocapture nonnull align 1 dereferenceable(1) %0, i1 zeroext %1) {569; CHECK-LABEL: _Z22atomic_swap_seq_cst_i1RNSt3__16atomicIbEEb:570; CHECK: # %bb.0:571; CHECK-NEXT: fencem 3572; CHECK-NEXT: and %s2, 3, %s0573; CHECK-NEXT: sla.w.sx %s3, %s2, 3574; CHECK-NEXT: sla.w.sx %s1, %s1, %s3575; CHECK-NEXT: and %s0, -4, %s0576; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2577; CHECK-NEXT: ts1am.w %s1, (%s0), %s2578; CHECK-NEXT: and %s0, %s1, (32)0579; CHECK-NEXT: srl %s0, %s0, %s3580; CHECK-NEXT: and %s0, 1, %s0581; CHECK-NEXT: fencem 3582; CHECK-NEXT: b.l.t (, %s10)583 %3 = zext i1 %1 to i8584 %4 = atomicrmw xchg ptr %0, i8 %3 seq_cst585 %5 = and i8 %4, 1586 %6 = icmp ne i8 %5, 0587 ret i1 %6588}589 590; Function Attrs: nofree norecurse nounwind mustprogress591define signext i8 @_Z22atomic_swap_seq_cst_i8RNSt3__16atomicIcEEc(ptr nocapture nonnull align 1 dereferenceable(1) %0, i8 signext %1) {592; CHECK-LABEL: _Z22atomic_swap_seq_cst_i8RNSt3__16atomicIcEEc:593; CHECK: # %bb.0:594; CHECK-NEXT: fencem 3595; CHECK-NEXT: and %s2, 3, %s0596; CHECK-NEXT: sla.w.sx %s3, %s2, 3597; CHECK-NEXT: sla.w.sx %s1, %s1, %s3598; CHECK-NEXT: and %s0, -4, %s0599; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2600; CHECK-NEXT: ts1am.w %s1, (%s0), %s2601; CHECK-NEXT: and %s0, %s1, (32)0602; CHECK-NEXT: srl %s0, %s0, %s3603; CHECK-NEXT: sll %s0, %s0, 56604; CHECK-NEXT: sra.l %s0, %s0, 56605; CHECK-NEXT: fencem 3606; CHECK-NEXT: b.l.t (, %s10)607 %3 = atomicrmw xchg ptr %0, i8 %1 seq_cst608 ret i8 %3609}610 611; Function Attrs: nofree norecurse nounwind mustprogress612define zeroext i8 @_Z22atomic_swap_seq_cst_u8RNSt3__16atomicIhEEh(ptr nocapture nonnull align 1 dereferenceable(1) %0, i8 zeroext %1) {613; CHECK-LABEL: _Z22atomic_swap_seq_cst_u8RNSt3__16atomicIhEEh:614; CHECK: # %bb.0:615; CHECK-NEXT: fencem 3616; CHECK-NEXT: and %s2, 3, %s0617; CHECK-NEXT: sla.w.sx %s3, %s2, 3618; CHECK-NEXT: sla.w.sx %s1, %s1, %s3619; CHECK-NEXT: and %s0, -4, %s0620; CHECK-NEXT: sla.w.sx %s2, (63)0, %s2621; CHECK-NEXT: ts1am.w %s1, (%s0), %s2622; CHECK-NEXT: and %s0, %s1, (32)0623; CHECK-NEXT: srl %s0, %s0, %s3624; CHECK-NEXT: and %s0, %s0, (56)0625; CHECK-NEXT: fencem 3626; CHECK-NEXT: b.l.t (, %s10)627 %3 = atomicrmw xchg ptr %0, i8 %1 seq_cst628 ret i8 %3629}630 631; Function Attrs: nofree norecurse nounwind mustprogress632define signext i16 @_Z23atomic_swap_seq_cst_i16RNSt3__16atomicIsEEs(ptr nocapture nonnull align 2 dereferenceable(2) %0, i16 signext %1) {633; CHECK-LABEL: _Z23atomic_swap_seq_cst_i16RNSt3__16atomicIsEEs:634; CHECK: # %bb.0:635; CHECK-NEXT: fencem 3636; CHECK-NEXT: and %s2, 3, %s0637; CHECK-NEXT: sla.w.sx %s3, %s2, 3638; CHECK-NEXT: sla.w.sx %s1, %s1, %s3639; CHECK-NEXT: and %s0, -4, %s0640; CHECK-NEXT: sla.w.sx %s2, (62)0, %s2641; CHECK-NEXT: ts1am.w %s1, (%s0), %s2642; CHECK-NEXT: and %s0, %s1, (32)0643; CHECK-NEXT: srl %s0, %s0, %s3644; CHECK-NEXT: sll %s0, %s0, 48645; CHECK-NEXT: sra.l %s0, %s0, 48646; CHECK-NEXT: fencem 3647; CHECK-NEXT: b.l.t (, %s10)648 %3 = atomicrmw xchg ptr %0, i16 %1 seq_cst649 ret i16 %3650}651 652; Function Attrs: nofree norecurse nounwind mustprogress653define zeroext i16 @_Z23atomic_swap_seq_cst_u16RNSt3__16atomicItEEt(ptr nocapture nonnull align 2 dereferenceable(2) %0, i16 zeroext %1) {654; CHECK-LABEL: _Z23atomic_swap_seq_cst_u16RNSt3__16atomicItEEt:655; CHECK: # %bb.0:656; CHECK-NEXT: fencem 3657; CHECK-NEXT: and %s2, 3, %s0658; CHECK-NEXT: sla.w.sx %s3, %s2, 3659; CHECK-NEXT: sla.w.sx %s1, %s1, %s3660; CHECK-NEXT: and %s0, -4, %s0661; CHECK-NEXT: sla.w.sx %s2, (62)0, %s2662; CHECK-NEXT: ts1am.w %s1, (%s0), %s2663; CHECK-NEXT: and %s0, %s1, (32)0664; CHECK-NEXT: srl %s0, %s0, %s3665; CHECK-NEXT: and %s0, %s0, (48)0666; CHECK-NEXT: fencem 3667; CHECK-NEXT: b.l.t (, %s10)668 %3 = atomicrmw xchg ptr %0, i16 %1 seq_cst669 ret i16 %3670}671 672; Function Attrs: nofree norecurse nounwind mustprogress673define signext i32 @_Z23atomic_swap_seq_cst_i32RNSt3__16atomicIiEEi(ptr nocapture nonnull align 4 dereferenceable(4) %0, i32 signext %1) {674; CHECK-LABEL: _Z23atomic_swap_seq_cst_i32RNSt3__16atomicIiEEi:675; CHECK: # %bb.0:676; CHECK-NEXT: fencem 3677; CHECK-NEXT: ts1am.w %s1, (%s0), 15678; CHECK-NEXT: adds.w.sx %s0, %s1, (0)1679; CHECK-NEXT: fencem 3680; CHECK-NEXT: b.l.t (, %s10)681 %3 = atomicrmw xchg ptr %0, i32 %1 seq_cst682 ret i32 %3683}684 685; Function Attrs: nofree norecurse nounwind mustprogress686define zeroext i32 @_Z23atomic_swap_seq_cst_u32RNSt3__16atomicIjEEj(ptr nocapture nonnull align 4 dereferenceable(4) %0, i32 zeroext %1) {687; CHECK-LABEL: _Z23atomic_swap_seq_cst_u32RNSt3__16atomicIjEEj:688; CHECK: # %bb.0:689; CHECK-NEXT: fencem 3690; CHECK-NEXT: ts1am.w %s1, (%s0), 15691; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1692; CHECK-NEXT: fencem 3693; CHECK-NEXT: b.l.t (, %s10)694 %3 = atomicrmw xchg ptr %0, i32 %1 seq_cst695 ret i32 %3696}697 698; Function Attrs: nofree norecurse nounwind mustprogress699define i64 @_Z23atomic_swap_seq_cst_i64RNSt3__16atomicIlEEl(ptr nocapture nonnull align 8 dereferenceable(8) %0, i64 %1) {700; CHECK-LABEL: _Z23atomic_swap_seq_cst_i64RNSt3__16atomicIlEEl:701; CHECK: # %bb.0:702; CHECK-NEXT: fencem 3703; CHECK-NEXT: lea %s2, 255704; CHECK-NEXT: ts1am.l %s1, (%s0), %s2705; CHECK-NEXT: fencem 3706; CHECK-NEXT: or %s0, 0, %s1707; CHECK-NEXT: b.l.t (, %s10)708 %3 = atomicrmw xchg ptr %0, i64 %1 seq_cst709 ret i64 %3710}711 712; Function Attrs: nofree norecurse nounwind mustprogress713define i64 @_Z23atomic_swap_seq_cst_u64RNSt3__16atomicImEEm(ptr nocapture nonnull align 8 dereferenceable(8) %0, i64 %1) {714; CHECK-LABEL: _Z23atomic_swap_seq_cst_u64RNSt3__16atomicImEEm:715; CHECK: # %bb.0:716; CHECK-NEXT: fencem 3717; CHECK-NEXT: lea %s2, 255718; CHECK-NEXT: ts1am.l %s1, (%s0), %s2719; CHECK-NEXT: fencem 3720; CHECK-NEXT: or %s0, 0, %s1721; CHECK-NEXT: b.l.t (, %s10)722 %3 = atomicrmw xchg ptr %0, i64 %1 seq_cst723 ret i64 %3724}725 726; Function Attrs: nounwind mustprogress727define i128 @_Z24atomic_swap_seq_cst_i128RNSt3__16atomicInEEn(ptr nonnull align 16 dereferenceable(16) %0, i128 %1) {728; CHECK-LABEL: _Z24atomic_swap_seq_cst_i128RNSt3__16atomicInEEn:729; CHECK: # %bb.0:730; CHECK-NEXT: st %s9, (, %s11)731; CHECK-NEXT: st %s10, 8(, %s11)732; CHECK-NEXT: or %s9, 0, %s11733; CHECK-NEXT: lea %s11, -272(, %s11)734; CHECK-NEXT: brge.l.t %s11, %s8, .LBB31_2735; CHECK-NEXT: # %bb.1:736; CHECK-NEXT: ld %s61, 24(, %s14)737; CHECK-NEXT: or %s62, 0, %s0738; CHECK-NEXT: lea %s63, 315739; CHECK-NEXT: shm.l %s63, (%s61)740; CHECK-NEXT: shm.l %s8, 8(%s61)741; CHECK-NEXT: shm.l %s11, 16(%s61)742; CHECK-NEXT: monc743; CHECK-NEXT: or %s0, 0, %s62744; CHECK-NEXT: .LBB31_2:745; CHECK-NEXT: or %s5, 0, %s0746; CHECK-NEXT: st %s2, 264(, %s11)747; CHECK-NEXT: st %s1, 256(, %s11)748; CHECK-NEXT: lea %s0, __atomic_exchange@lo749; CHECK-NEXT: and %s0, %s0, (32)0750; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)751; CHECK-NEXT: lea %s2, 256(, %s11)752; CHECK-NEXT: lea %s3, 240(, %s11)753; CHECK-NEXT: or %s0, 16, (0)1754; CHECK-NEXT: or %s4, 5, (0)1755; CHECK-NEXT: or %s1, 0, %s5756; CHECK-NEXT: bsic %s10, (, %s12)757; CHECK-NEXT: ld %s1, 248(, %s11)758; CHECK-NEXT: ld %s0, 240(, %s11)759; CHECK-NEXT: or %s11, 0, %s9760; CHECK-NEXT: ld %s10, 8(, %s11)761; CHECK-NEXT: ld %s9, (, %s11)762; CHECK-NEXT: b.l.t (, %s10)763 %3 = alloca i128, align 16764 %4 = alloca i128, align 16765 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)766 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)767 store i128 %1, ptr %3, align 16, !tbaa !2768 call void @__atomic_exchange(i64 16, ptr nonnull %0, ptr nonnull %3, ptr nonnull %4, i32 signext 5)769 %5 = load i128, ptr %4, align 16, !tbaa !2770 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)771 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)772 ret i128 %5773}774 775; Function Attrs: nounwind mustprogress776define i128 @_Z24atomic_swap_seq_cst_u128RNSt3__16atomicIoEEo(ptr nonnull align 16 dereferenceable(16) %0, i128 %1) {777; CHECK-LABEL: _Z24atomic_swap_seq_cst_u128RNSt3__16atomicIoEEo:778; CHECK: # %bb.0:779; CHECK-NEXT: st %s9, (, %s11)780; CHECK-NEXT: st %s10, 8(, %s11)781; CHECK-NEXT: or %s9, 0, %s11782; CHECK-NEXT: lea %s11, -272(, %s11)783; CHECK-NEXT: brge.l.t %s11, %s8, .LBB32_2784; CHECK-NEXT: # %bb.1:785; CHECK-NEXT: ld %s61, 24(, %s14)786; CHECK-NEXT: or %s62, 0, %s0787; CHECK-NEXT: lea %s63, 315788; CHECK-NEXT: shm.l %s63, (%s61)789; CHECK-NEXT: shm.l %s8, 8(%s61)790; CHECK-NEXT: shm.l %s11, 16(%s61)791; CHECK-NEXT: monc792; CHECK-NEXT: or %s0, 0, %s62793; CHECK-NEXT: .LBB32_2:794; CHECK-NEXT: or %s5, 0, %s0795; CHECK-NEXT: st %s2, 264(, %s11)796; CHECK-NEXT: st %s1, 256(, %s11)797; CHECK-NEXT: lea %s0, __atomic_exchange@lo798; CHECK-NEXT: and %s0, %s0, (32)0799; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)800; CHECK-NEXT: lea %s2, 256(, %s11)801; CHECK-NEXT: lea %s3, 240(, %s11)802; CHECK-NEXT: or %s0, 16, (0)1803; CHECK-NEXT: or %s4, 5, (0)1804; CHECK-NEXT: or %s1, 0, %s5805; CHECK-NEXT: bsic %s10, (, %s12)806; CHECK-NEXT: ld %s1, 248(, %s11)807; CHECK-NEXT: ld %s0, 240(, %s11)808; CHECK-NEXT: or %s11, 0, %s9809; CHECK-NEXT: ld %s10, 8(, %s11)810; CHECK-NEXT: ld %s9, (, %s11)811; CHECK-NEXT: b.l.t (, %s10)812 %3 = alloca i128, align 16813 %4 = alloca i128, align 16814 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)815 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)816 store i128 %1, ptr %3, align 16, !tbaa !2817 call void @__atomic_exchange(i64 16, ptr nonnull %0, ptr nonnull %3, ptr nonnull %4, i32 signext 5)818 %5 = load i128, ptr %4, align 16, !tbaa !2819 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)820 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)821 ret i128 %5822}823 824; Function Attrs: nofree nounwind mustprogress825define zeroext i1 @_Z26atomic_swap_relaxed_stk_i1b(i1 zeroext %0) {826; CHECK-LABEL: _Z26atomic_swap_relaxed_stk_i1b:827; CHECK: # %bb.0:828; CHECK-NEXT: adds.l %s11, -16, %s11829; CHECK-NEXT: brge.l.t %s11, %s8, .LBB33_2830; CHECK-NEXT: # %bb.1:831; CHECK-NEXT: ld %s61, 24(, %s14)832; CHECK-NEXT: or %s62, 0, %s0833; CHECK-NEXT: lea %s63, 315834; CHECK-NEXT: shm.l %s63, (%s61)835; CHECK-NEXT: shm.l %s8, 8(%s61)836; CHECK-NEXT: shm.l %s11, 16(%s61)837; CHECK-NEXT: monc838; CHECK-NEXT: or %s0, 0, %s62839; CHECK-NEXT: .LBB33_2:840; CHECK-NEXT: and %s0, %s0, (32)0841; CHECK-NEXT: or %s1, 1, (0)1842; CHECK-NEXT: lea %s2, 8(, %s11)843; CHECK-NEXT: ts1am.w %s0, (%s2), %s1844; CHECK-NEXT: and %s0, 1, %s0845; CHECK-NEXT: adds.l %s11, 16, %s11846; CHECK-NEXT: b.l.t (, %s10)847 %2 = alloca %"struct.std::__1::atomic", align 8848 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2)849 %3 = zext i1 %0 to i8850 %4 = atomicrmw volatile xchg ptr %2, i8 %3 monotonic851 %5 = and i8 %4, 1852 %6 = icmp ne i8 %5, 0853 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2)854 ret i1 %6855}856 857; Function Attrs: argmemonly nofree nosync nounwind willreturn858declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)859 860; Function Attrs: argmemonly nofree nosync nounwind willreturn861declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)862 863; Function Attrs: nofree nounwind mustprogress864define signext i8 @_Z26atomic_swap_relaxed_stk_i8c(i8 signext %0) {865; CHECK-LABEL: _Z26atomic_swap_relaxed_stk_i8c:866; CHECK: # %bb.0:867; CHECK-NEXT: adds.l %s11, -16, %s11868; CHECK-NEXT: brge.l.t %s11, %s8, .LBB34_2869; CHECK-NEXT: # %bb.1:870; CHECK-NEXT: ld %s61, 24(, %s14)871; CHECK-NEXT: or %s62, 0, %s0872; CHECK-NEXT: lea %s63, 315873; CHECK-NEXT: shm.l %s63, (%s61)874; CHECK-NEXT: shm.l %s8, 8(%s61)875; CHECK-NEXT: shm.l %s11, 16(%s61)876; CHECK-NEXT: monc877; CHECK-NEXT: or %s0, 0, %s62878; CHECK-NEXT: .LBB34_2:879; CHECK-NEXT: and %s0, %s0, (32)0880; CHECK-NEXT: or %s1, 1, (0)1881; CHECK-NEXT: lea %s2, 8(, %s11)882; CHECK-NEXT: ts1am.w %s0, (%s2), %s1883; CHECK-NEXT: sll %s0, %s0, 56884; CHECK-NEXT: sra.l %s0, %s0, 56885; CHECK-NEXT: adds.l %s11, 16, %s11886; CHECK-NEXT: b.l.t (, %s10)887 %2 = alloca %"struct.std::__1::atomic.0", align 8888 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2)889 %3 = atomicrmw volatile xchg ptr %2, i8 %0 monotonic890 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2)891 ret i8 %3892}893 894; Function Attrs: nofree nounwind mustprogress895define zeroext i8 @_Z26atomic_swap_relaxed_stk_u8h(i8 zeroext %0) {896; CHECK-LABEL: _Z26atomic_swap_relaxed_stk_u8h:897; CHECK: # %bb.0:898; CHECK-NEXT: adds.l %s11, -16, %s11899; CHECK-NEXT: brge.l.t %s11, %s8, .LBB35_2900; CHECK-NEXT: # %bb.1:901; CHECK-NEXT: ld %s61, 24(, %s14)902; CHECK-NEXT: or %s62, 0, %s0903; CHECK-NEXT: lea %s63, 315904; CHECK-NEXT: shm.l %s63, (%s61)905; CHECK-NEXT: shm.l %s8, 8(%s61)906; CHECK-NEXT: shm.l %s11, 16(%s61)907; CHECK-NEXT: monc908; CHECK-NEXT: or %s0, 0, %s62909; CHECK-NEXT: .LBB35_2:910; CHECK-NEXT: and %s0, %s0, (32)0911; CHECK-NEXT: or %s1, 1, (0)1912; CHECK-NEXT: lea %s2, 8(, %s11)913; CHECK-NEXT: ts1am.w %s0, (%s2), %s1914; CHECK-NEXT: and %s0, %s0, (56)0915; CHECK-NEXT: adds.l %s11, 16, %s11916; CHECK-NEXT: b.l.t (, %s10)917 %2 = alloca %"struct.std::__1::atomic.5", align 8918 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %2)919 %3 = atomicrmw volatile xchg ptr %2, i8 %0 monotonic920 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %2)921 ret i8 %3922}923 924; Function Attrs: nofree nounwind mustprogress925define signext i16 @_Z27atomic_swap_relaxed_stk_i16s(i16 signext %0) {926; CHECK-LABEL: _Z27atomic_swap_relaxed_stk_i16s:927; CHECK: # %bb.0:928; CHECK-NEXT: adds.l %s11, -16, %s11929; CHECK-NEXT: brge.l.t %s11, %s8, .LBB36_2930; CHECK-NEXT: # %bb.1:931; CHECK-NEXT: ld %s61, 24(, %s14)932; CHECK-NEXT: or %s62, 0, %s0933; CHECK-NEXT: lea %s63, 315934; CHECK-NEXT: shm.l %s63, (%s61)935; CHECK-NEXT: shm.l %s8, 8(%s61)936; CHECK-NEXT: shm.l %s11, 16(%s61)937; CHECK-NEXT: monc938; CHECK-NEXT: or %s0, 0, %s62939; CHECK-NEXT: .LBB36_2:940; CHECK-NEXT: and %s0, %s0, (32)0941; CHECK-NEXT: or %s1, 3, (0)1942; CHECK-NEXT: lea %s2, 8(, %s11)943; CHECK-NEXT: ts1am.w %s0, (%s2), %s1944; CHECK-NEXT: sll %s0, %s0, 48945; CHECK-NEXT: sra.l %s0, %s0, 48946; CHECK-NEXT: adds.l %s11, 16, %s11947; CHECK-NEXT: b.l.t (, %s10)948 %2 = alloca %"struct.std::__1::atomic.10", align 8949 call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %2)950 %3 = atomicrmw volatile xchg ptr %2, i16 %0 monotonic951 call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %2)952 ret i16 %3953}954 955; Function Attrs: nofree nounwind mustprogress956define zeroext i16 @_Z27atomic_swap_relaxed_stk_u16t(i16 zeroext %0) {957; CHECK-LABEL: _Z27atomic_swap_relaxed_stk_u16t:958; CHECK: # %bb.0:959; CHECK-NEXT: adds.l %s11, -16, %s11960; CHECK-NEXT: brge.l.t %s11, %s8, .LBB37_2961; CHECK-NEXT: # %bb.1:962; CHECK-NEXT: ld %s61, 24(, %s14)963; CHECK-NEXT: or %s62, 0, %s0964; CHECK-NEXT: lea %s63, 315965; CHECK-NEXT: shm.l %s63, (%s61)966; CHECK-NEXT: shm.l %s8, 8(%s61)967; CHECK-NEXT: shm.l %s11, 16(%s61)968; CHECK-NEXT: monc969; CHECK-NEXT: or %s0, 0, %s62970; CHECK-NEXT: .LBB37_2:971; CHECK-NEXT: and %s0, %s0, (32)0972; CHECK-NEXT: or %s1, 3, (0)1973; CHECK-NEXT: lea %s2, 8(, %s11)974; CHECK-NEXT: ts1am.w %s0, (%s2), %s1975; CHECK-NEXT: and %s0, %s0, (48)0976; CHECK-NEXT: adds.l %s11, 16, %s11977; CHECK-NEXT: b.l.t (, %s10)978 %2 = alloca %"struct.std::__1::atomic.15", align 8979 call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %2)980 %3 = atomicrmw volatile xchg ptr %2, i16 %0 monotonic981 call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %2)982 ret i16 %3983}984 985; Function Attrs: nofree nounwind mustprogress986define signext i32 @_Z27atomic_swap_relaxed_stk_i32i(i32 signext %0) {987; CHECK-LABEL: _Z27atomic_swap_relaxed_stk_i32i:988; CHECK: # %bb.0:989; CHECK-NEXT: adds.l %s11, -16, %s11990; CHECK-NEXT: brge.l.t %s11, %s8, .LBB38_2991; CHECK-NEXT: # %bb.1:992; CHECK-NEXT: ld %s61, 24(, %s14)993; CHECK-NEXT: or %s62, 0, %s0994; CHECK-NEXT: lea %s63, 315995; CHECK-NEXT: shm.l %s63, (%s61)996; CHECK-NEXT: shm.l %s8, 8(%s61)997; CHECK-NEXT: shm.l %s11, 16(%s61)998; CHECK-NEXT: monc999; CHECK-NEXT: or %s0, 0, %s621000; CHECK-NEXT: .LBB38_2:1001; CHECK-NEXT: ts1am.w %s0, 8(%s11), 151002; CHECK-NEXT: adds.w.sx %s0, %s0, (0)11003; CHECK-NEXT: adds.l %s11, 16, %s111004; CHECK-NEXT: b.l.t (, %s10)1005 %2 = alloca %"struct.std::__1::atomic.20", align 81006 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)1007 %3 = atomicrmw volatile xchg ptr %2, i32 %0 monotonic1008 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)1009 ret i32 %31010}1011 1012; Function Attrs: nofree nounwind mustprogress1013define zeroext i32 @_Z27atomic_swap_relaxed_stk_u32j(i32 zeroext %0) {1014; CHECK-LABEL: _Z27atomic_swap_relaxed_stk_u32j:1015; CHECK: # %bb.0:1016; CHECK-NEXT: adds.l %s11, -16, %s111017; CHECK-NEXT: brge.l.t %s11, %s8, .LBB39_21018; CHECK-NEXT: # %bb.1:1019; CHECK-NEXT: ld %s61, 24(, %s14)1020; CHECK-NEXT: or %s62, 0, %s01021; CHECK-NEXT: lea %s63, 3151022; CHECK-NEXT: shm.l %s63, (%s61)1023; CHECK-NEXT: shm.l %s8, 8(%s61)1024; CHECK-NEXT: shm.l %s11, 16(%s61)1025; CHECK-NEXT: monc1026; CHECK-NEXT: or %s0, 0, %s621027; CHECK-NEXT: .LBB39_2:1028; CHECK-NEXT: ts1am.w %s0, 8(%s11), 151029; CHECK-NEXT: adds.w.zx %s0, %s0, (0)11030; CHECK-NEXT: adds.l %s11, 16, %s111031; CHECK-NEXT: b.l.t (, %s10)1032 %2 = alloca %"struct.std::__1::atomic.25", align 81033 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2)1034 %3 = atomicrmw volatile xchg ptr %2, i32 %0 monotonic1035 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2)1036 ret i32 %31037}1038 1039; Function Attrs: nofree nounwind mustprogress1040define i64 @_Z27atomic_swap_relaxed_stk_i64l(i64 %0) {1041; CHECK-LABEL: _Z27atomic_swap_relaxed_stk_i64l:1042; CHECK: # %bb.0:1043; CHECK-NEXT: adds.l %s11, -16, %s111044; CHECK-NEXT: brge.l.t %s11, %s8, .LBB40_21045; CHECK-NEXT: # %bb.1:1046; CHECK-NEXT: ld %s61, 24(, %s14)1047; CHECK-NEXT: or %s62, 0, %s01048; CHECK-NEXT: lea %s63, 3151049; CHECK-NEXT: shm.l %s63, (%s61)1050; CHECK-NEXT: shm.l %s8, 8(%s61)1051; CHECK-NEXT: shm.l %s11, 16(%s61)1052; CHECK-NEXT: monc1053; CHECK-NEXT: or %s0, 0, %s621054; CHECK-NEXT: .LBB40_2:1055; CHECK-NEXT: lea %s1, 2551056; CHECK-NEXT: ts1am.l %s0, 8(%s11), %s11057; CHECK-NEXT: adds.l %s11, 16, %s111058; CHECK-NEXT: b.l.t (, %s10)1059 %2 = alloca %"struct.std::__1::atomic.30", align 81060 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2)1061 %3 = atomicrmw volatile xchg ptr %2, i64 %0 monotonic1062 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)1063 ret i64 %31064}1065 1066; Function Attrs: nofree nounwind mustprogress1067define i64 @_Z27atomic_swap_relaxed_stk_u64m(i64 %0) {1068; CHECK-LABEL: _Z27atomic_swap_relaxed_stk_u64m:1069; CHECK: # %bb.0:1070; CHECK-NEXT: adds.l %s11, -16, %s111071; CHECK-NEXT: brge.l.t %s11, %s8, .LBB41_21072; CHECK-NEXT: # %bb.1:1073; CHECK-NEXT: ld %s61, 24(, %s14)1074; CHECK-NEXT: or %s62, 0, %s01075; CHECK-NEXT: lea %s63, 3151076; CHECK-NEXT: shm.l %s63, (%s61)1077; CHECK-NEXT: shm.l %s8, 8(%s61)1078; CHECK-NEXT: shm.l %s11, 16(%s61)1079; CHECK-NEXT: monc1080; CHECK-NEXT: or %s0, 0, %s621081; CHECK-NEXT: .LBB41_2:1082; CHECK-NEXT: lea %s1, 2551083; CHECK-NEXT: ts1am.l %s0, 8(%s11), %s11084; CHECK-NEXT: adds.l %s11, 16, %s111085; CHECK-NEXT: b.l.t (, %s10)1086 %2 = alloca %"struct.std::__1::atomic.35", align 81087 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2)1088 %3 = atomicrmw volatile xchg ptr %2, i64 %0 monotonic1089 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)1090 ret i64 %31091}1092 1093; Function Attrs: nounwind mustprogress1094define i128 @_Z28atomic_swap_relaxed_stk_i128n(i128 %0) {1095; CHECK-LABEL: _Z28atomic_swap_relaxed_stk_i128n:1096; CHECK: # %bb.0:1097; CHECK-NEXT: st %s9, (, %s11)1098; CHECK-NEXT: st %s10, 8(, %s11)1099; CHECK-NEXT: or %s9, 0, %s111100; CHECK-NEXT: lea %s11, -288(, %s11)1101; CHECK-NEXT: brge.l.t %s11, %s8, .LBB42_21102; CHECK-NEXT: # %bb.1:1103; CHECK-NEXT: ld %s61, 24(, %s14)1104; CHECK-NEXT: or %s62, 0, %s01105; CHECK-NEXT: lea %s63, 3151106; CHECK-NEXT: shm.l %s63, (%s61)1107; CHECK-NEXT: shm.l %s8, 8(%s61)1108; CHECK-NEXT: shm.l %s11, 16(%s61)1109; CHECK-NEXT: monc1110; CHECK-NEXT: or %s0, 0, %s621111; CHECK-NEXT: .LBB42_2:1112; CHECK-NEXT: st %s1, 280(, %s11)1113; CHECK-NEXT: st %s0, 272(, %s11)1114; CHECK-NEXT: lea %s0, __atomic_exchange@lo1115; CHECK-NEXT: and %s0, %s0, (32)01116; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)1117; CHECK-NEXT: lea %s1, 240(, %s11)1118; CHECK-NEXT: lea %s2, 272(, %s11)1119; CHECK-NEXT: lea %s3, 256(, %s11)1120; CHECK-NEXT: or %s0, 16, (0)11121; CHECK-NEXT: or %s4, 0, (0)11122; CHECK-NEXT: bsic %s10, (, %s12)1123; CHECK-NEXT: ld %s1, 264(, %s11)1124; CHECK-NEXT: ld %s0, 256(, %s11)1125; CHECK-NEXT: or %s11, 0, %s91126; CHECK-NEXT: ld %s10, 8(, %s11)1127; CHECK-NEXT: ld %s9, (, %s11)1128; CHECK-NEXT: b.l.t (, %s10)1129 %2 = alloca i128, align 161130 %3 = alloca i128, align 161131 %4 = alloca %"struct.std::__1::atomic.40", align 161132 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)1133 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2)1134 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)1135 store i128 %0, ptr %2, align 16, !tbaa !21136 call void @__atomic_exchange(i64 16, ptr nonnull %4, ptr nonnull %2, ptr nonnull %3, i32 signext 0)1137 %5 = load i128, ptr %3, align 16, !tbaa !21138 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2)1139 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)1140 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)1141 ret i128 %51142}1143 1144; Function Attrs: nounwind mustprogress1145define i128 @_Z28atomic_swap_relaxed_stk_u128o(i128 %0) {1146; CHECK-LABEL: _Z28atomic_swap_relaxed_stk_u128o:1147; CHECK: # %bb.0:1148; CHECK-NEXT: st %s9, (, %s11)1149; CHECK-NEXT: st %s10, 8(, %s11)1150; CHECK-NEXT: or %s9, 0, %s111151; CHECK-NEXT: lea %s11, -288(, %s11)1152; CHECK-NEXT: brge.l.t %s11, %s8, .LBB43_21153; CHECK-NEXT: # %bb.1:1154; CHECK-NEXT: ld %s61, 24(, %s14)1155; CHECK-NEXT: or %s62, 0, %s01156; CHECK-NEXT: lea %s63, 3151157; CHECK-NEXT: shm.l %s63, (%s61)1158; CHECK-NEXT: shm.l %s8, 8(%s61)1159; CHECK-NEXT: shm.l %s11, 16(%s61)1160; CHECK-NEXT: monc1161; CHECK-NEXT: or %s0, 0, %s621162; CHECK-NEXT: .LBB43_2:1163; CHECK-NEXT: st %s1, 280(, %s11)1164; CHECK-NEXT: st %s0, 272(, %s11)1165; CHECK-NEXT: lea %s0, __atomic_exchange@lo1166; CHECK-NEXT: and %s0, %s0, (32)01167; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)1168; CHECK-NEXT: lea %s1, 240(, %s11)1169; CHECK-NEXT: lea %s2, 272(, %s11)1170; CHECK-NEXT: lea %s3, 256(, %s11)1171; CHECK-NEXT: or %s0, 16, (0)11172; CHECK-NEXT: or %s4, 0, (0)11173; CHECK-NEXT: bsic %s10, (, %s12)1174; CHECK-NEXT: ld %s1, 264(, %s11)1175; CHECK-NEXT: ld %s0, 256(, %s11)1176; CHECK-NEXT: or %s11, 0, %s91177; CHECK-NEXT: ld %s10, 8(, %s11)1178; CHECK-NEXT: ld %s9, (, %s11)1179; CHECK-NEXT: b.l.t (, %s10)1180 %2 = alloca i128, align 161181 %3 = alloca i128, align 161182 %4 = alloca %"struct.std::__1::atomic.45", align 161183 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)1184 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2)1185 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)1186 store i128 %0, ptr %2, align 16, !tbaa !21187 call void @__atomic_exchange(i64 16, ptr nonnull %4, ptr nonnull %2, ptr nonnull %3, i32 signext 0)1188 %5 = load i128, ptr %3, align 16, !tbaa !21189 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2)1190 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)1191 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)1192 ret i128 %51193}1194 1195; Function Attrs: nofree norecurse nounwind mustprogress1196define zeroext i1 @_Z25atomic_swap_relaxed_gv_i1b(i1 zeroext %0) {1197; CHECK-LABEL: _Z25atomic_swap_relaxed_gv_i1b:1198; CHECK: # %bb.0:1199; CHECK-NEXT: lea %s1, gv_i1@lo1200; CHECK-NEXT: and %s1, %s1, (32)01201; CHECK-NEXT: lea.sl %s1, gv_i1@hi(, %s1)1202; CHECK-NEXT: and %s2, 3, %s11203; CHECK-NEXT: sla.w.sx %s3, %s2, 31204; CHECK-NEXT: sla.w.sx %s0, %s0, %s31205; CHECK-NEXT: and %s1, -4, %s11206; CHECK-NEXT: sla.w.sx %s2, (63)0, %s21207; CHECK-NEXT: ts1am.w %s0, (%s1), %s21208; CHECK-NEXT: and %s0, %s0, (32)01209; CHECK-NEXT: srl %s0, %s0, %s31210; CHECK-NEXT: and %s0, 1, %s01211; CHECK-NEXT: b.l.t (, %s10)1212 %2 = zext i1 %0 to i81213 %3 = atomicrmw xchg ptr @gv_i1, i8 %2 monotonic1214 %4 = and i8 %3, 11215 %5 = icmp ne i8 %4, 01216 ret i1 %51217}1218 1219; Function Attrs: nofree norecurse nounwind mustprogress1220define signext i8 @_Z25atomic_swap_relaxed_gv_i8c(i8 signext %0) {1221; CHECK-LABEL: _Z25atomic_swap_relaxed_gv_i8c:1222; CHECK: # %bb.0:1223; CHECK-NEXT: lea %s1, gv_i8@lo1224; CHECK-NEXT: and %s1, %s1, (32)01225; CHECK-NEXT: lea.sl %s1, gv_i8@hi(, %s1)1226; CHECK-NEXT: and %s2, 3, %s11227; CHECK-NEXT: sla.w.sx %s3, %s2, 31228; CHECK-NEXT: sla.w.sx %s0, %s0, %s31229; CHECK-NEXT: and %s1, -4, %s11230; CHECK-NEXT: sla.w.sx %s2, (63)0, %s21231; CHECK-NEXT: ts1am.w %s0, (%s1), %s21232; CHECK-NEXT: and %s0, %s0, (32)01233; CHECK-NEXT: srl %s0, %s0, %s31234; CHECK-NEXT: sll %s0, %s0, 561235; CHECK-NEXT: sra.l %s0, %s0, 561236; CHECK-NEXT: b.l.t (, %s10)1237 %2 = atomicrmw xchg ptr @gv_i8, i8 %0 monotonic1238 ret i8 %21239}1240 1241; Function Attrs: nofree norecurse nounwind mustprogress1242define zeroext i8 @_Z25atomic_swap_relaxed_gv_u8h(i8 zeroext %0) {1243; CHECK-LABEL: _Z25atomic_swap_relaxed_gv_u8h:1244; CHECK: # %bb.0:1245; CHECK-NEXT: lea %s1, gv_u8@lo1246; CHECK-NEXT: and %s1, %s1, (32)01247; CHECK-NEXT: lea.sl %s1, gv_u8@hi(, %s1)1248; CHECK-NEXT: and %s2, 3, %s11249; CHECK-NEXT: sla.w.sx %s3, %s2, 31250; CHECK-NEXT: sla.w.sx %s0, %s0, %s31251; CHECK-NEXT: and %s1, -4, %s11252; CHECK-NEXT: sla.w.sx %s2, (63)0, %s21253; CHECK-NEXT: ts1am.w %s0, (%s1), %s21254; CHECK-NEXT: and %s0, %s0, (32)01255; CHECK-NEXT: srl %s0, %s0, %s31256; CHECK-NEXT: and %s0, %s0, (56)01257; CHECK-NEXT: b.l.t (, %s10)1258 %2 = atomicrmw xchg ptr @gv_u8, i8 %0 monotonic1259 ret i8 %21260}1261 1262; Function Attrs: nofree norecurse nounwind mustprogress1263define signext i16 @_Z26atomic_swap_relaxed_gv_i16s(i16 signext %0) {1264; CHECK-LABEL: _Z26atomic_swap_relaxed_gv_i16s:1265; CHECK: # %bb.0:1266; CHECK-NEXT: lea %s1, gv_i16@lo1267; CHECK-NEXT: and %s1, %s1, (32)01268; CHECK-NEXT: lea.sl %s1, gv_i16@hi(, %s1)1269; CHECK-NEXT: and %s2, 3, %s11270; CHECK-NEXT: sla.w.sx %s3, %s2, 31271; CHECK-NEXT: sla.w.sx %s0, %s0, %s31272; CHECK-NEXT: and %s1, -4, %s11273; CHECK-NEXT: sla.w.sx %s2, (62)0, %s21274; CHECK-NEXT: ts1am.w %s0, (%s1), %s21275; CHECK-NEXT: and %s0, %s0, (32)01276; CHECK-NEXT: srl %s0, %s0, %s31277; CHECK-NEXT: sll %s0, %s0, 481278; CHECK-NEXT: sra.l %s0, %s0, 481279; CHECK-NEXT: b.l.t (, %s10)1280 %2 = atomicrmw xchg ptr @gv_i16, i16 %0 monotonic1281 ret i16 %21282}1283 1284; Function Attrs: nofree norecurse nounwind mustprogress1285define zeroext i16 @_Z26atomic_swap_relaxed_gv_u16t(i16 zeroext %0) {1286; CHECK-LABEL: _Z26atomic_swap_relaxed_gv_u16t:1287; CHECK: # %bb.0:1288; CHECK-NEXT: lea %s1, gv_u16@lo1289; CHECK-NEXT: and %s1, %s1, (32)01290; CHECK-NEXT: lea.sl %s1, gv_u16@hi(, %s1)1291; CHECK-NEXT: and %s2, 3, %s11292; CHECK-NEXT: sla.w.sx %s3, %s2, 31293; CHECK-NEXT: sla.w.sx %s0, %s0, %s31294; CHECK-NEXT: and %s1, -4, %s11295; CHECK-NEXT: sla.w.sx %s2, (62)0, %s21296; CHECK-NEXT: ts1am.w %s0, (%s1), %s21297; CHECK-NEXT: and %s0, %s0, (32)01298; CHECK-NEXT: srl %s0, %s0, %s31299; CHECK-NEXT: and %s0, %s0, (48)01300; CHECK-NEXT: b.l.t (, %s10)1301 %2 = atomicrmw xchg ptr @gv_u16, i16 %0 monotonic1302 ret i16 %21303}1304 1305; Function Attrs: nofree norecurse nounwind mustprogress1306define signext i32 @_Z26atomic_swap_relaxed_gv_i32i(i32 signext %0) {1307; CHECK-LABEL: _Z26atomic_swap_relaxed_gv_i32i:1308; CHECK: # %bb.0:1309; CHECK-NEXT: lea %s1, gv_i32@lo1310; CHECK-NEXT: and %s1, %s1, (32)01311; CHECK-NEXT: lea.sl %s1, gv_i32@hi(, %s1)1312; CHECK-NEXT: ts1am.w %s0, (%s1), 151313; CHECK-NEXT: adds.w.sx %s0, %s0, (0)11314; CHECK-NEXT: b.l.t (, %s10)1315 %2 = atomicrmw xchg ptr @gv_i32, i32 %0 monotonic1316 ret i32 %21317}1318 1319; Function Attrs: nofree norecurse nounwind mustprogress1320define zeroext i32 @_Z26atomic_swap_relaxed_gv_u32j(i32 zeroext %0) {1321; CHECK-LABEL: _Z26atomic_swap_relaxed_gv_u32j:1322; CHECK: # %bb.0:1323; CHECK-NEXT: lea %s1, gv_u32@lo1324; CHECK-NEXT: and %s1, %s1, (32)01325; CHECK-NEXT: lea.sl %s1, gv_u32@hi(, %s1)1326; CHECK-NEXT: ts1am.w %s0, (%s1), 151327; CHECK-NEXT: adds.w.zx %s0, %s0, (0)11328; CHECK-NEXT: b.l.t (, %s10)1329 %2 = atomicrmw xchg ptr @gv_u32, i32 %0 monotonic1330 ret i32 %21331}1332 1333; Function Attrs: nofree norecurse nounwind mustprogress1334define i64 @_Z26atomic_swap_relaxed_gv_i64l(i64 %0) {1335; CHECK-LABEL: _Z26atomic_swap_relaxed_gv_i64l:1336; CHECK: # %bb.0:1337; CHECK-NEXT: lea %s1, gv_i64@lo1338; CHECK-NEXT: and %s1, %s1, (32)01339; CHECK-NEXT: lea.sl %s1, gv_i64@hi(, %s1)1340; CHECK-NEXT: lea %s2, 2551341; CHECK-NEXT: ts1am.l %s0, (%s1), %s21342; CHECK-NEXT: b.l.t (, %s10)1343 %2 = atomicrmw xchg ptr @gv_i64, i64 %0 monotonic1344 ret i64 %21345}1346 1347; Function Attrs: nofree norecurse nounwind mustprogress1348define i64 @_Z26atomic_swap_relaxed_gv_u64m(i64 %0) {1349; CHECK-LABEL: _Z26atomic_swap_relaxed_gv_u64m:1350; CHECK: # %bb.0:1351; CHECK-NEXT: lea %s1, gv_u64@lo1352; CHECK-NEXT: and %s1, %s1, (32)01353; CHECK-NEXT: lea.sl %s1, gv_u64@hi(, %s1)1354; CHECK-NEXT: lea %s2, 2551355; CHECK-NEXT: ts1am.l %s0, (%s1), %s21356; CHECK-NEXT: b.l.t (, %s10)1357 %2 = atomicrmw xchg ptr @gv_u64, i64 %0 monotonic1358 ret i64 %21359}1360 1361; Function Attrs: nounwind mustprogress1362define i128 @_Z27atomic_swap_relaxed_gv_i128n(i128 %0) {1363; CHECK-LABEL: _Z27atomic_swap_relaxed_gv_i128n:1364; CHECK: # %bb.0:1365; CHECK-NEXT: st %s9, (, %s11)1366; CHECK-NEXT: st %s10, 8(, %s11)1367; CHECK-NEXT: or %s9, 0, %s111368; CHECK-NEXT: lea %s11, -272(, %s11)1369; CHECK-NEXT: brge.l.t %s11, %s8, .LBB53_21370; CHECK-NEXT: # %bb.1:1371; CHECK-NEXT: ld %s61, 24(, %s14)1372; CHECK-NEXT: or %s62, 0, %s01373; CHECK-NEXT: lea %s63, 3151374; CHECK-NEXT: shm.l %s63, (%s61)1375; CHECK-NEXT: shm.l %s8, 8(%s61)1376; CHECK-NEXT: shm.l %s11, 16(%s61)1377; CHECK-NEXT: monc1378; CHECK-NEXT: or %s0, 0, %s621379; CHECK-NEXT: .LBB53_2:1380; CHECK-NEXT: st %s1, 264(, %s11)1381; CHECK-NEXT: st %s0, 256(, %s11)1382; CHECK-NEXT: lea %s0, __atomic_exchange@lo1383; CHECK-NEXT: and %s0, %s0, (32)01384; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)1385; CHECK-NEXT: lea %s0, gv_i128@lo1386; CHECK-NEXT: and %s0, %s0, (32)01387; CHECK-NEXT: lea.sl %s1, gv_i128@hi(, %s0)1388; CHECK-NEXT: lea %s2, 256(, %s11)1389; CHECK-NEXT: lea %s3, 240(, %s11)1390; CHECK-NEXT: or %s0, 16, (0)11391; CHECK-NEXT: or %s4, 0, (0)11392; CHECK-NEXT: bsic %s10, (, %s12)1393; CHECK-NEXT: ld %s1, 248(, %s11)1394; CHECK-NEXT: ld %s0, 240(, %s11)1395; CHECK-NEXT: or %s11, 0, %s91396; CHECK-NEXT: ld %s10, 8(, %s11)1397; CHECK-NEXT: ld %s9, (, %s11)1398; CHECK-NEXT: b.l.t (, %s10)1399 %2 = alloca i128, align 161400 %3 = alloca i128, align 161401 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2)1402 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)1403 store i128 %0, ptr %2, align 16, !tbaa !21404 call void @__atomic_exchange(i64 16, ptr nonnull @gv_i128, ptr nonnull %2, ptr nonnull %3, i32 signext 0)1405 %4 = load i128, ptr %3, align 16, !tbaa !21406 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2)1407 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)1408 ret i128 %41409}1410 1411; Function Attrs: nounwind mustprogress1412define i128 @_Z27atomic_swap_relaxed_gv_u128o(i128 %0) {1413; CHECK-LABEL: _Z27atomic_swap_relaxed_gv_u128o:1414; CHECK: # %bb.0:1415; CHECK-NEXT: st %s9, (, %s11)1416; CHECK-NEXT: st %s10, 8(, %s11)1417; CHECK-NEXT: or %s9, 0, %s111418; CHECK-NEXT: lea %s11, -272(, %s11)1419; CHECK-NEXT: brge.l.t %s11, %s8, .LBB54_21420; CHECK-NEXT: # %bb.1:1421; CHECK-NEXT: ld %s61, 24(, %s14)1422; CHECK-NEXT: or %s62, 0, %s01423; CHECK-NEXT: lea %s63, 3151424; CHECK-NEXT: shm.l %s63, (%s61)1425; CHECK-NEXT: shm.l %s8, 8(%s61)1426; CHECK-NEXT: shm.l %s11, 16(%s61)1427; CHECK-NEXT: monc1428; CHECK-NEXT: or %s0, 0, %s621429; CHECK-NEXT: .LBB54_2:1430; CHECK-NEXT: st %s1, 264(, %s11)1431; CHECK-NEXT: st %s0, 256(, %s11)1432; CHECK-NEXT: lea %s0, __atomic_exchange@lo1433; CHECK-NEXT: and %s0, %s0, (32)01434; CHECK-NEXT: lea.sl %s12, __atomic_exchange@hi(, %s0)1435; CHECK-NEXT: lea %s0, gv_u128@lo1436; CHECK-NEXT: and %s0, %s0, (32)01437; CHECK-NEXT: lea.sl %s1, gv_u128@hi(, %s0)1438; CHECK-NEXT: lea %s2, 256(, %s11)1439; CHECK-NEXT: lea %s3, 240(, %s11)1440; CHECK-NEXT: or %s0, 16, (0)11441; CHECK-NEXT: or %s4, 0, (0)11442; CHECK-NEXT: bsic %s10, (, %s12)1443; CHECK-NEXT: ld %s1, 248(, %s11)1444; CHECK-NEXT: ld %s0, 240(, %s11)1445; CHECK-NEXT: or %s11, 0, %s91446; CHECK-NEXT: ld %s10, 8(, %s11)1447; CHECK-NEXT: ld %s9, (, %s11)1448; CHECK-NEXT: b.l.t (, %s10)1449 %2 = alloca i128, align 161450 %3 = alloca i128, align 161451 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2)1452 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)1453 store i128 %0, ptr %2, align 16, !tbaa !21454 call void @__atomic_exchange(i64 16, ptr nonnull @gv_u128, ptr nonnull %2, ptr nonnull %3, i32 signext 0)1455 %4 = load i128, ptr %3, align 16, !tbaa !21456 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2)1457 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)1458 ret i128 %41459}1460 1461; Function Attrs: nounwind willreturn1462declare void @__atomic_exchange(i64, ptr, ptr, ptr, i32)1463 1464!2 = !{!3, !3, i64 0}1465!3 = !{!"__int128", !4, i64 0}1466!4 = !{!"omnipotent char", !5, i64 0}1467!5 = !{!"Simple C++ TBAA"}1468