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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=ve-unknown-unknown < %s | FileCheck %s3 4define i8 @atomicrmw_usub_cond_i8(ptr %ptr, i8 %val) {5; CHECK-LABEL: atomicrmw_usub_cond_i8:6; CHECK: # %bb.0:7; CHECK-NEXT: and %s1, %s1, (32)08; CHECK-NEXT: fencem 39; CHECK-NEXT: and %s2, -4, %s010; CHECK-NEXT: and %s0, 3, %s011; CHECK-NEXT: sla.w.sx %s0, %s0, 312; CHECK-NEXT: sla.w.sx %s3, (56)0, %s013; CHECK-NEXT: ldl.sx %s5, (, %s2)14; CHECK-NEXT: xor %s3, -1, %s315; CHECK-NEXT: and %s3, %s3, (32)016; CHECK-NEXT: and %s4, %s1, (56)017; CHECK-NEXT: .LBB0_1: # %atomicrmw.start18; CHECK-NEXT: # =>This Inner Loop Header: Depth=119; CHECK-NEXT: or %s6, 0, %s520; CHECK-NEXT: and %s5, %s6, (32)021; CHECK-NEXT: srl %s5, %s5, %s022; CHECK-NEXT: and %s7, %s5, (56)023; CHECK-NEXT: subs.w.sx %s34, %s5, %s124; CHECK-NEXT: cmpu.w %s7, %s7, %s425; CHECK-NEXT: cmov.w.ge %s5, %s34, %s726; CHECK-NEXT: and %s5, %s5, (56)027; CHECK-NEXT: sla.w.sx %s5, %s5, %s028; CHECK-NEXT: and %s7, %s6, %s329; CHECK-NEXT: or %s5, %s7, %s530; CHECK-NEXT: cas.w %s5, (%s2), %s631; CHECK-NEXT: brne.w %s5, %s6, .LBB0_132; CHECK-NEXT: # %bb.2: # %atomicrmw.end33; CHECK-NEXT: and %s1, %s5, (32)034; CHECK-NEXT: srl %s0, %s1, %s035; CHECK-NEXT: fencem 336; CHECK-NEXT: b.l.t (, %s10)37 %result = atomicrmw usub_cond ptr %ptr, i8 %val seq_cst38 ret i8 %result39}40 41define i16 @atomicrmw_usub_cond_i16(ptr %ptr, i16 %val) {42; CHECK-LABEL: atomicrmw_usub_cond_i16:43; CHECK: # %bb.0:44; CHECK-NEXT: and %s1, %s1, (32)045; CHECK-NEXT: fencem 346; CHECK-NEXT: and %s2, -4, %s047; CHECK-NEXT: and %s0, 3, %s048; CHECK-NEXT: sla.w.sx %s0, %s0, 349; CHECK-NEXT: sla.w.sx %s3, (48)0, %s050; CHECK-NEXT: ldl.sx %s5, (, %s2)51; CHECK-NEXT: xor %s3, -1, %s352; CHECK-NEXT: and %s3, %s3, (32)053; CHECK-NEXT: and %s4, %s1, (48)054; CHECK-NEXT: .LBB1_1: # %atomicrmw.start55; CHECK-NEXT: # =>This Inner Loop Header: Depth=156; CHECK-NEXT: or %s6, 0, %s557; CHECK-NEXT: and %s5, %s6, (32)058; CHECK-NEXT: srl %s5, %s5, %s059; CHECK-NEXT: and %s7, %s5, (48)060; CHECK-NEXT: subs.w.sx %s34, %s5, %s161; CHECK-NEXT: cmpu.w %s7, %s7, %s462; CHECK-NEXT: cmov.w.ge %s5, %s34, %s763; CHECK-NEXT: and %s5, %s5, (48)064; CHECK-NEXT: sla.w.sx %s5, %s5, %s065; CHECK-NEXT: and %s7, %s6, %s366; CHECK-NEXT: or %s5, %s7, %s567; CHECK-NEXT: cas.w %s5, (%s2), %s668; CHECK-NEXT: brne.w %s5, %s6, .LBB1_169; CHECK-NEXT: # %bb.2: # %atomicrmw.end70; CHECK-NEXT: and %s1, %s5, (32)071; CHECK-NEXT: srl %s0, %s1, %s072; CHECK-NEXT: fencem 373; CHECK-NEXT: b.l.t (, %s10)74 %result = atomicrmw usub_cond ptr %ptr, i16 %val seq_cst75 ret i16 %result76}77 78define i32 @atomicrmw_usub_cond_i32(ptr %ptr, i32 %val) {79; CHECK-LABEL: atomicrmw_usub_cond_i32:80; CHECK: # %bb.0:81; CHECK-NEXT: fencem 382; CHECK-NEXT: ldl.sx %s2, (, %s0)83; CHECK-NEXT: and %s1, %s1, (32)084; CHECK-NEXT: .LBB2_1: # %atomicrmw.start85; CHECK-NEXT: # =>This Inner Loop Header: Depth=186; CHECK-NEXT: or %s3, 0, %s287; CHECK-NEXT: subs.w.sx %s4, %s2, %s188; CHECK-NEXT: cmpu.w %s5, %s2, %s189; CHECK-NEXT: or %s2, 0, %s390; CHECK-NEXT: cmov.w.ge %s2, %s4, %s591; CHECK-NEXT: cas.w %s2, (%s0), %s392; CHECK-NEXT: brne.w %s2, %s3, .LBB2_193; CHECK-NEXT: # %bb.2: # %atomicrmw.end94; CHECK-NEXT: fencem 395; CHECK-NEXT: or %s0, 0, %s296; CHECK-NEXT: b.l.t (, %s10)97 %result = atomicrmw usub_cond ptr %ptr, i32 %val seq_cst98 ret i32 %result99}100 101define i64 @atomicrmw_usub_cond_sub_i64(ptr %ptr, i64 %val) {102; CHECK-LABEL: atomicrmw_usub_cond_sub_i64:103; CHECK: # %bb.0:104; CHECK-NEXT: or %s2, 0, %s0105; CHECK-NEXT: fencem 3106; CHECK-NEXT: ld %s0, (, %s0)107; CHECK-NEXT: .LBB3_1: # %atomicrmw.start108; CHECK-NEXT: # =>This Inner Loop Header: Depth=1109; CHECK-NEXT: or %s3, 0, %s0110; CHECK-NEXT: subs.l %s4, %s0, %s1111; CHECK-NEXT: cmpu.l %s5, %s0, %s1112; CHECK-NEXT: cmov.l.ge %s0, %s4, %s5113; CHECK-NEXT: cas.l %s0, (%s2), %s3114; CHECK-NEXT: brne.l %s0, %s3, .LBB3_1115; CHECK-NEXT: # %bb.2: # %atomicrmw.end116; CHECK-NEXT: fencem 3117; CHECK-NEXT: b.l.t (, %s10)118 %result = atomicrmw usub_cond ptr %ptr, i64 %val seq_cst119 ret i64 %result120}121 122define i8 @atomicrmw_usub_sat_i8(ptr %ptr, i8 %val) {123; CHECK-LABEL: atomicrmw_usub_sat_i8:124; CHECK: # %bb.0:125; CHECK-NEXT: and %s3, %s1, (32)0126; CHECK-NEXT: fencem 3127; CHECK-NEXT: and %s1, -4, %s0128; CHECK-NEXT: and %s0, 3, %s0129; CHECK-NEXT: sla.w.sx %s0, %s0, 3130; CHECK-NEXT: sla.w.sx %s2, (56)0, %s0131; CHECK-NEXT: ldl.sx %s4, (, %s1)132; CHECK-NEXT: xor %s2, -1, %s2133; CHECK-NEXT: and %s2, %s2, (32)0134; CHECK-NEXT: and %s3, %s3, (56)0135; CHECK-NEXT: .LBB4_1: # %atomicrmw.start136; CHECK-NEXT: # =>This Inner Loop Header: Depth=1137; CHECK-NEXT: or %s5, 0, %s4138; CHECK-NEXT: and %s4, %s5, (32)0139; CHECK-NEXT: srl %s4, %s4, %s0140; CHECK-NEXT: and %s4, %s4, (56)0141; CHECK-NEXT: subs.w.sx %s6, %s4, %s3142; CHECK-NEXT: cmpu.w %s4, %s6, %s4143; CHECK-NEXT: cmov.w.gt %s6, (0)1, %s4144; CHECK-NEXT: sla.w.sx %s4, %s6, %s0145; CHECK-NEXT: and %s6, %s5, %s2146; CHECK-NEXT: or %s4, %s6, %s4147; CHECK-NEXT: cas.w %s4, (%s1), %s5148; CHECK-NEXT: brne.w %s4, %s5, .LBB4_1149; CHECK-NEXT: # %bb.2: # %atomicrmw.end150; CHECK-NEXT: and %s1, %s4, (32)0151; CHECK-NEXT: srl %s0, %s1, %s0152; CHECK-NEXT: fencem 3153; CHECK-NEXT: b.l.t (, %s10)154 %result = atomicrmw usub_sat ptr %ptr, i8 %val seq_cst155 ret i8 %result156}157 158define i16 @atomicrmw_usub_sat_i16(ptr %ptr, i16 %val) {159; CHECK-LABEL: atomicrmw_usub_sat_i16:160; CHECK: # %bb.0:161; CHECK-NEXT: and %s3, %s1, (32)0162; CHECK-NEXT: fencem 3163; CHECK-NEXT: and %s1, -4, %s0164; CHECK-NEXT: and %s0, 3, %s0165; CHECK-NEXT: sla.w.sx %s0, %s0, 3166; CHECK-NEXT: sla.w.sx %s2, (48)0, %s0167; CHECK-NEXT: ldl.sx %s4, (, %s1)168; CHECK-NEXT: xor %s2, -1, %s2169; CHECK-NEXT: and %s2, %s2, (32)0170; CHECK-NEXT: and %s3, %s3, (48)0171; CHECK-NEXT: .LBB5_1: # %atomicrmw.start172; CHECK-NEXT: # =>This Inner Loop Header: Depth=1173; CHECK-NEXT: or %s5, 0, %s4174; CHECK-NEXT: and %s4, %s5, (32)0175; CHECK-NEXT: srl %s4, %s4, %s0176; CHECK-NEXT: and %s4, %s4, (48)0177; CHECK-NEXT: subs.w.sx %s6, %s4, %s3178; CHECK-NEXT: cmpu.w %s4, %s6, %s4179; CHECK-NEXT: cmov.w.gt %s6, (0)1, %s4180; CHECK-NEXT: sla.w.sx %s4, %s6, %s0181; CHECK-NEXT: and %s6, %s5, %s2182; CHECK-NEXT: or %s4, %s6, %s4183; CHECK-NEXT: cas.w %s4, (%s1), %s5184; CHECK-NEXT: brne.w %s4, %s5, .LBB5_1185; CHECK-NEXT: # %bb.2: # %atomicrmw.end186; CHECK-NEXT: and %s1, %s4, (32)0187; CHECK-NEXT: srl %s0, %s1, %s0188; CHECK-NEXT: fencem 3189; CHECK-NEXT: b.l.t (, %s10)190 %result = atomicrmw usub_sat ptr %ptr, i16 %val seq_cst191 ret i16 %result192}193 194define i32 @atomicrmw_usub_sat_i32(ptr %ptr, i32 %val) {195; CHECK-LABEL: atomicrmw_usub_sat_i32:196; CHECK: # %bb.0:197; CHECK-NEXT: fencem 3198; CHECK-NEXT: ldl.sx %s2, (, %s0)199; CHECK-NEXT: and %s1, %s1, (32)0200; CHECK-NEXT: .LBB6_1: # %atomicrmw.start201; CHECK-NEXT: # =>This Inner Loop Header: Depth=1202; CHECK-NEXT: or %s3, 0, %s2203; CHECK-NEXT: subs.w.sx %s2, %s2, %s1204; CHECK-NEXT: cmpu.w %s4, %s2, %s3205; CHECK-NEXT: cmov.w.gt %s2, (0)1, %s4206; CHECK-NEXT: cas.w %s2, (%s0), %s3207; CHECK-NEXT: brne.w %s2, %s3, .LBB6_1208; CHECK-NEXT: # %bb.2: # %atomicrmw.end209; CHECK-NEXT: fencem 3210; CHECK-NEXT: or %s0, 0, %s2211; CHECK-NEXT: b.l.t (, %s10)212 %result = atomicrmw usub_sat ptr %ptr, i32 %val seq_cst213 ret i32 %result214}215 216define i64 @atomicrmw_usub_sat_i64(ptr %ptr, i64 %val) {217; CHECK-LABEL: atomicrmw_usub_sat_i64:218; CHECK: # %bb.0:219; CHECK-NEXT: fencem 3220; CHECK-NEXT: ld %s2, (, %s0)221; CHECK-NEXT: .LBB7_1: # %atomicrmw.start222; CHECK-NEXT: # =>This Inner Loop Header: Depth=1223; CHECK-NEXT: or %s3, 0, %s2224; CHECK-NEXT: subs.l %s2, %s2, %s1225; CHECK-NEXT: cmpu.l %s4, %s2, %s3226; CHECK-NEXT: cmov.l.gt %s2, (0)1, %s4227; CHECK-NEXT: cas.l %s2, (%s0), %s3228; CHECK-NEXT: brne.l %s2, %s3, .LBB7_1229; CHECK-NEXT: # %bb.2: # %atomicrmw.end230; CHECK-NEXT: fencem 3231; CHECK-NEXT: or %s0, 0, %s2232; CHECK-NEXT: b.l.t (, %s10)233 %result = atomicrmw usub_sat ptr %ptr, i64 %val seq_cst234 ret i64 %result235}236