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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=ve-unknown-unknown < %s | FileCheck %s3 4define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {5; CHECK-LABEL: atomicrmw_uinc_wrap_i8:6; CHECK:       # %bb.0:7; CHECK-NEXT:    and %s3, %s1, (32)08; CHECK-NEXT:    fencem 39; CHECK-NEXT:    and %s1, -4, %s010; CHECK-NEXT:    and %s0, 3, %s011; CHECK-NEXT:    sla.w.sx %s0, %s0, 312; CHECK-NEXT:    sla.w.sx %s2, (56)0, %s013; CHECK-NEXT:    ldl.sx %s4, (, %s1)14; CHECK-NEXT:    xor %s2, -1, %s215; CHECK-NEXT:    and %s2, %s2, (32)016; CHECK-NEXT:    and %s3, %s3, (56)017; CHECK-NEXT:  .LBB0_1: # %atomicrmw.start18; CHECK-NEXT:    # =>This Inner Loop Header: Depth=119; CHECK-NEXT:    or %s5, 0, %s420; CHECK-NEXT:    and %s4, %s5, (32)021; CHECK-NEXT:    srl %s4, %s4, %s022; CHECK-NEXT:    and %s6, %s4, (56)023; CHECK-NEXT:    adds.w.sx %s4, 1, %s424; CHECK-NEXT:    cmpu.w %s6, %s6, %s325; CHECK-NEXT:    cmov.w.ge %s4, (0)1, %s626; CHECK-NEXT:    and %s4, %s4, (56)027; CHECK-NEXT:    sla.w.sx %s4, %s4, %s028; CHECK-NEXT:    and %s6, %s5, %s229; CHECK-NEXT:    or %s4, %s6, %s430; CHECK-NEXT:    cas.w %s4, (%s1), %s531; CHECK-NEXT:    brne.w %s4, %s5, .LBB0_132; CHECK-NEXT:  # %bb.2: # %atomicrmw.end33; CHECK-NEXT:    and %s1, %s4, (32)034; CHECK-NEXT:    srl %s0, %s1, %s035; CHECK-NEXT:    fencem 336; CHECK-NEXT:    b.l.t (, %s10)37  %result = atomicrmw uinc_wrap ptr %ptr, i8 %val seq_cst38  ret i8 %result39}40 41define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {42; CHECK-LABEL: atomicrmw_uinc_wrap_i16:43; CHECK:       # %bb.0:44; CHECK-NEXT:    and %s3, %s1, (32)045; CHECK-NEXT:    fencem 346; CHECK-NEXT:    and %s1, -4, %s047; CHECK-NEXT:    and %s0, 3, %s048; CHECK-NEXT:    sla.w.sx %s0, %s0, 349; CHECK-NEXT:    sla.w.sx %s2, (48)0, %s050; CHECK-NEXT:    ldl.sx %s4, (, %s1)51; CHECK-NEXT:    xor %s2, -1, %s252; CHECK-NEXT:    and %s2, %s2, (32)053; CHECK-NEXT:    and %s3, %s3, (48)054; CHECK-NEXT:  .LBB1_1: # %atomicrmw.start55; CHECK-NEXT:    # =>This Inner Loop Header: Depth=156; CHECK-NEXT:    or %s5, 0, %s457; CHECK-NEXT:    and %s4, %s5, (32)058; CHECK-NEXT:    srl %s4, %s4, %s059; CHECK-NEXT:    and %s6, %s4, (48)060; CHECK-NEXT:    adds.w.sx %s4, 1, %s461; CHECK-NEXT:    cmpu.w %s6, %s6, %s362; CHECK-NEXT:    cmov.w.ge %s4, (0)1, %s663; CHECK-NEXT:    and %s4, %s4, (48)064; CHECK-NEXT:    sla.w.sx %s4, %s4, %s065; CHECK-NEXT:    and %s6, %s5, %s266; CHECK-NEXT:    or %s4, %s6, %s467; CHECK-NEXT:    cas.w %s4, (%s1), %s568; CHECK-NEXT:    brne.w %s4, %s5, .LBB1_169; CHECK-NEXT:  # %bb.2: # %atomicrmw.end70; CHECK-NEXT:    and %s1, %s4, (32)071; CHECK-NEXT:    srl %s0, %s1, %s072; CHECK-NEXT:    fencem 373; CHECK-NEXT:    b.l.t (, %s10)74  %result = atomicrmw uinc_wrap ptr %ptr, i16 %val seq_cst75  ret i16 %result76}77 78define i32 @atomicrmw_uinc_wrap_i32(ptr %ptr, i32 %val) {79; CHECK-LABEL: atomicrmw_uinc_wrap_i32:80; CHECK:       # %bb.0:81; CHECK-NEXT:    fencem 382; CHECK-NEXT:    ldl.sx %s2, (, %s0)83; CHECK-NEXT:    and %s1, %s1, (32)084; CHECK-NEXT:  .LBB2_1: # %atomicrmw.start85; CHECK-NEXT:    # =>This Inner Loop Header: Depth=186; CHECK-NEXT:    or %s3, 0, %s287; CHECK-NEXT:    adds.w.sx %s2, 1, %s288; CHECK-NEXT:    cmpu.w %s4, %s3, %s189; CHECK-NEXT:    cmov.w.ge %s2, (0)1, %s490; CHECK-NEXT:    cas.w %s2, (%s0), %s391; CHECK-NEXT:    brne.w %s2, %s3, .LBB2_192; CHECK-NEXT:  # %bb.2: # %atomicrmw.end93; CHECK-NEXT:    fencem 394; CHECK-NEXT:    or %s0, 0, %s295; CHECK-NEXT:    b.l.t (, %s10)96  %result = atomicrmw uinc_wrap ptr %ptr, i32 %val seq_cst97  ret i32 %result98}99 100define i64 @atomicrmw_uinc_wrap_i64(ptr %ptr, i64 %val) {101; CHECK-LABEL: atomicrmw_uinc_wrap_i64:102; CHECK:       # %bb.0:103; CHECK-NEXT:    fencem 3104; CHECK-NEXT:    ld %s2, (, %s0)105; CHECK-NEXT:  .LBB3_1: # %atomicrmw.start106; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1107; CHECK-NEXT:    or %s3, 0, %s2108; CHECK-NEXT:    lea %s2, 1(, %s2)109; CHECK-NEXT:    cmpu.l %s4, %s3, %s1110; CHECK-NEXT:    cmov.l.ge %s2, (0)1, %s4111; CHECK-NEXT:    cas.l %s2, (%s0), %s3112; CHECK-NEXT:    brne.l %s2, %s3, .LBB3_1113; CHECK-NEXT:  # %bb.2: # %atomicrmw.end114; CHECK-NEXT:    fencem 3115; CHECK-NEXT:    or %s0, 0, %s2116; CHECK-NEXT:    b.l.t (, %s10)117  %result = atomicrmw uinc_wrap ptr %ptr, i64 %val seq_cst118  ret i64 %result119}120 121define i8 @atomicrmw_udec_wrap_i8(ptr %ptr, i8 %val) {122; CHECK-LABEL: atomicrmw_udec_wrap_i8:123; CHECK:       # %bb.0:124; CHECK-NEXT:    and %s1, %s1, (32)0125; CHECK-NEXT:    fencem 3126; CHECK-NEXT:    and %s2, -4, %s0127; CHECK-NEXT:    and %s0, 3, %s0128; CHECK-NEXT:    sla.w.sx %s0, %s0, 3129; CHECK-NEXT:    sla.w.sx %s3, (56)0, %s0130; CHECK-NEXT:    ldl.sx %s5, (, %s2)131; CHECK-NEXT:    xor %s3, -1, %s3132; CHECK-NEXT:    and %s3, %s3, (32)0133; CHECK-NEXT:    and %s4, %s1, (56)0134; CHECK-NEXT:  .LBB4_1: # %atomicrmw.start135; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1136; CHECK-NEXT:    or %s6, 0, %s5137; CHECK-NEXT:    and %s5, %s6, (32)0138; CHECK-NEXT:    srl %s5, %s5, %s0139; CHECK-NEXT:    and %s7, %s5, (56)0140; CHECK-NEXT:    adds.w.sx %s5, -1, %s5141; CHECK-NEXT:    cmpu.w %s34, %s7, %s4142; CHECK-NEXT:    cmov.w.gt %s5, %s1, %s34143; CHECK-NEXT:    cmov.w.eq %s5, %s1, %s7144; CHECK-NEXT:    and %s5, %s5, (56)0145; CHECK-NEXT:    sla.w.sx %s5, %s5, %s0146; CHECK-NEXT:    and %s7, %s6, %s3147; CHECK-NEXT:    or %s5, %s7, %s5148; CHECK-NEXT:    cas.w %s5, (%s2), %s6149; CHECK-NEXT:    brne.w %s5, %s6, .LBB4_1150; CHECK-NEXT:  # %bb.2: # %atomicrmw.end151; CHECK-NEXT:    and %s1, %s5, (32)0152; CHECK-NEXT:    srl %s0, %s1, %s0153; CHECK-NEXT:    fencem 3154; CHECK-NEXT:    b.l.t (, %s10)155  %result = atomicrmw udec_wrap ptr %ptr, i8 %val seq_cst156  ret i8 %result157}158 159define i16 @atomicrmw_udec_wrap_i16(ptr %ptr, i16 %val) {160; CHECK-LABEL: atomicrmw_udec_wrap_i16:161; CHECK:       # %bb.0:162; CHECK-NEXT:    and %s1, %s1, (32)0163; CHECK-NEXT:    fencem 3164; CHECK-NEXT:    and %s2, -4, %s0165; CHECK-NEXT:    and %s0, 3, %s0166; CHECK-NEXT:    sla.w.sx %s0, %s0, 3167; CHECK-NEXT:    sla.w.sx %s3, (48)0, %s0168; CHECK-NEXT:    ldl.sx %s5, (, %s2)169; CHECK-NEXT:    xor %s3, -1, %s3170; CHECK-NEXT:    and %s3, %s3, (32)0171; CHECK-NEXT:    and %s4, %s1, (48)0172; CHECK-NEXT:  .LBB5_1: # %atomicrmw.start173; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1174; CHECK-NEXT:    or %s6, 0, %s5175; CHECK-NEXT:    and %s5, %s6, (32)0176; CHECK-NEXT:    srl %s5, %s5, %s0177; CHECK-NEXT:    and %s7, %s5, (48)0178; CHECK-NEXT:    adds.w.sx %s5, -1, %s5179; CHECK-NEXT:    cmpu.w %s34, %s7, %s4180; CHECK-NEXT:    cmov.w.gt %s5, %s1, %s34181; CHECK-NEXT:    cmov.w.eq %s5, %s1, %s7182; CHECK-NEXT:    and %s5, %s5, (48)0183; CHECK-NEXT:    sla.w.sx %s5, %s5, %s0184; CHECK-NEXT:    and %s7, %s6, %s3185; CHECK-NEXT:    or %s5, %s7, %s5186; CHECK-NEXT:    cas.w %s5, (%s2), %s6187; CHECK-NEXT:    brne.w %s5, %s6, .LBB5_1188; CHECK-NEXT:  # %bb.2: # %atomicrmw.end189; CHECK-NEXT:    and %s1, %s5, (32)0190; CHECK-NEXT:    srl %s0, %s1, %s0191; CHECK-NEXT:    fencem 3192; CHECK-NEXT:    b.l.t (, %s10)193  %result = atomicrmw udec_wrap ptr %ptr, i16 %val seq_cst194  ret i16 %result195}196 197define i32 @atomicrmw_udec_wrap_i32(ptr %ptr, i32 %val) {198; CHECK-LABEL: atomicrmw_udec_wrap_i32:199; CHECK:       # %bb.0:200; CHECK-NEXT:    fencem 3201; CHECK-NEXT:    ldl.sx %s2, (, %s0)202; CHECK-NEXT:    and %s1, %s1, (32)0203; CHECK-NEXT:  .LBB6_1: # %atomicrmw.start204; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1205; CHECK-NEXT:    or %s3, 0, %s2206; CHECK-NEXT:    adds.w.sx %s2, -1, %s2207; CHECK-NEXT:    cmpu.w %s4, %s3, %s1208; CHECK-NEXT:    cmov.w.gt %s2, %s1, %s4209; CHECK-NEXT:    cmov.w.eq %s2, %s1, %s3210; CHECK-NEXT:    cas.w %s2, (%s0), %s3211; CHECK-NEXT:    brne.w %s2, %s3, .LBB6_1212; CHECK-NEXT:  # %bb.2: # %atomicrmw.end213; CHECK-NEXT:    fencem 3214; CHECK-NEXT:    or %s0, 0, %s2215; CHECK-NEXT:    b.l.t (, %s10)216  %result = atomicrmw udec_wrap ptr %ptr, i32 %val seq_cst217  ret i32 %result218}219 220define i64 @atomicrmw_udec_wrap_i64(ptr %ptr, i64 %val) {221; CHECK-LABEL: atomicrmw_udec_wrap_i64:222; CHECK:       # %bb.0:223; CHECK-NEXT:    fencem 3224; CHECK-NEXT:    ld %s2, (, %s0)225; CHECK-NEXT:  .LBB7_1: # %atomicrmw.start226; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1227; CHECK-NEXT:    or %s3, 0, %s2228; CHECK-NEXT:    lea %s2, -1(, %s2)229; CHECK-NEXT:    cmpu.l %s4, %s3, %s1230; CHECK-NEXT:    cmov.l.gt %s2, %s1, %s4231; CHECK-NEXT:    cmov.l.eq %s2, %s1, %s3232; CHECK-NEXT:    cas.l %s2, (%s0), %s3233; CHECK-NEXT:    brne.l %s2, %s3, .LBB7_1234; CHECK-NEXT:  # %bb.2: # %atomicrmw.end235; CHECK-NEXT:    fencem 3236; CHECK-NEXT:    or %s0, 0, %s2237; CHECK-NEXT:    b.l.t (, %s10)238  %result = atomicrmw udec_wrap ptr %ptr, i64 %val seq_cst239  ret i64 %result240}241