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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc < %s -mtriple=ve | FileCheck %s3 4; Function Attrs: nounwind5define void @br_cc_i1_var(i1 zeroext %0, i1 zeroext %1) {6; CHECK-LABEL: br_cc_i1_var:7; CHECK: # %bb.0:8; CHECK-NEXT: xor %s0, %s0, %s19; CHECK-NEXT: brne.w 0, %s0, .LBB0_210; CHECK-NEXT: # %bb.1:11; CHECK-NEXT: #APP12; CHECK-NEXT: nop13; CHECK-NEXT: #NO_APP14; CHECK-NEXT: .LBB0_2:15; CHECK-NEXT: b.l.t (, %s10)16 %3 = xor i1 %0, %117 br i1 %3, label %5, label %418 194: ; preds = %220 tail call void asm sideeffect "nop", ""()21 br label %522 235: ; preds = %4, %224 ret void25}26 27; Function Attrs: nounwind28define void @br_cc_i8_var(i8 signext %0, i8 signext %1) {29; CHECK-LABEL: br_cc_i8_var:30; CHECK: # %bb.0:31; CHECK-NEXT: brne.w %s0, %s1, .LBB1_232; CHECK-NEXT: # %bb.1:33; CHECK-NEXT: #APP34; CHECK-NEXT: nop35; CHECK-NEXT: #NO_APP36; CHECK-NEXT: .LBB1_2:37; CHECK-NEXT: b.l.t (, %s10)38 %3 = icmp eq i8 %0, %139 br i1 %3, label %4, label %540 414: ; preds = %242 tail call void asm sideeffect "nop", ""()43 br label %544 455: ; preds = %4, %246 ret void47}48 49; Function Attrs: nounwind50define void @br_cc_u8_var(i8 zeroext %0, i8 zeroext %1) {51; CHECK-LABEL: br_cc_u8_var:52; CHECK: # %bb.0:53; CHECK-NEXT: brne.w %s0, %s1, .LBB2_254; CHECK-NEXT: # %bb.1:55; CHECK-NEXT: #APP56; CHECK-NEXT: nop57; CHECK-NEXT: #NO_APP58; CHECK-NEXT: .LBB2_2:59; CHECK-NEXT: b.l.t (, %s10)60 %3 = icmp eq i8 %0, %161 br i1 %3, label %4, label %562 634: ; preds = %264 tail call void asm sideeffect "nop", ""()65 br label %566 675: ; preds = %4, %268 ret void69}70 71; Function Attrs: nounwind72define void @br_cc_i16_var(i16 signext %0, i16 signext %1) {73; CHECK-LABEL: br_cc_i16_var:74; CHECK: # %bb.0:75; CHECK-NEXT: brne.w %s0, %s1, .LBB3_276; CHECK-NEXT: # %bb.1:77; CHECK-NEXT: #APP78; CHECK-NEXT: nop79; CHECK-NEXT: #NO_APP80; CHECK-NEXT: .LBB3_2:81; CHECK-NEXT: b.l.t (, %s10)82 %3 = icmp eq i16 %0, %183 br i1 %3, label %4, label %584 854: ; preds = %286 tail call void asm sideeffect "nop", ""()87 br label %588 895: ; preds = %4, %290 ret void91}92 93; Function Attrs: nounwind94define void @br_cc_u16_var(i16 zeroext %0, i16 zeroext %1) {95; CHECK-LABEL: br_cc_u16_var:96; CHECK: # %bb.0:97; CHECK-NEXT: brne.w %s0, %s1, .LBB4_298; CHECK-NEXT: # %bb.1:99; CHECK-NEXT: #APP100; CHECK-NEXT: nop101; CHECK-NEXT: #NO_APP102; CHECK-NEXT: .LBB4_2:103; CHECK-NEXT: b.l.t (, %s10)104 %3 = icmp eq i16 %0, %1105 br i1 %3, label %4, label %5106 1074: ; preds = %2108 tail call void asm sideeffect "nop", ""()109 br label %5110 1115: ; preds = %4, %2112 ret void113}114 115; Function Attrs: nounwind116define void @br_cc_i32_var(i32 signext %0, i32 signext %1) {117; CHECK-LABEL: br_cc_i32_var:118; CHECK: # %bb.0:119; CHECK-NEXT: brne.w %s0, %s1, .LBB5_2120; CHECK-NEXT: # %bb.1:121; CHECK-NEXT: #APP122; CHECK-NEXT: nop123; CHECK-NEXT: #NO_APP124; CHECK-NEXT: .LBB5_2:125; CHECK-NEXT: b.l.t (, %s10)126 %3 = icmp eq i32 %0, %1127 br i1 %3, label %4, label %5128 1294: ; preds = %2130 tail call void asm sideeffect "nop", ""()131 br label %5132 1335: ; preds = %4, %2134 ret void135}136 137; Function Attrs: nounwind138define void @br_cc_u32_var(i32 zeroext %0, i32 zeroext %1) {139; CHECK-LABEL: br_cc_u32_var:140; CHECK: # %bb.0:141; CHECK-NEXT: brne.w %s0, %s1, .LBB6_2142; CHECK-NEXT: # %bb.1:143; CHECK-NEXT: #APP144; CHECK-NEXT: nop145; CHECK-NEXT: #NO_APP146; CHECK-NEXT: .LBB6_2:147; CHECK-NEXT: b.l.t (, %s10)148 %3 = icmp eq i32 %0, %1149 br i1 %3, label %4, label %5150 1514: ; preds = %2152 tail call void asm sideeffect "nop", ""()153 br label %5154 1555: ; preds = %4, %2156 ret void157}158 159; Function Attrs: nounwind160define void @br_cc_i64_var(i64 %0, i64 %1) {161; CHECK-LABEL: br_cc_i64_var:162; CHECK: # %bb.0:163; CHECK-NEXT: brne.l %s0, %s1, .LBB7_2164; CHECK-NEXT: # %bb.1:165; CHECK-NEXT: #APP166; CHECK-NEXT: nop167; CHECK-NEXT: #NO_APP168; CHECK-NEXT: .LBB7_2:169; CHECK-NEXT: b.l.t (, %s10)170 %3 = icmp eq i64 %0, %1171 br i1 %3, label %4, label %5172 1734: ; preds = %2174 tail call void asm sideeffect "nop", ""()175 br label %5176 1775: ; preds = %4, %2178 ret void179}180 181; Function Attrs: nounwind182define void @br_cc_u64_var(i64 %0, i64 %1) {183; CHECK-LABEL: br_cc_u64_var:184; CHECK: # %bb.0:185; CHECK-NEXT: brne.l %s0, %s1, .LBB8_2186; CHECK-NEXT: # %bb.1:187; CHECK-NEXT: #APP188; CHECK-NEXT: nop189; CHECK-NEXT: #NO_APP190; CHECK-NEXT: .LBB8_2:191; CHECK-NEXT: b.l.t (, %s10)192 %3 = icmp eq i64 %0, %1193 br i1 %3, label %4, label %5194 1954: ; preds = %2196 tail call void asm sideeffect "nop", ""()197 br label %5198 1995: ; preds = %4, %2200 ret void201}202 203; Function Attrs: nounwind204define void @br_cc_i128_var(i128 %0, i128 %1) {205; CHECK-LABEL: br_cc_i128_var:206; CHECK: # %bb.0:207; CHECK-NEXT: xor %s1, %s1, %s3208; CHECK-NEXT: xor %s0, %s0, %s2209; CHECK-NEXT: or %s0, %s0, %s1210; CHECK-NEXT: brne.l 0, %s0, .LBB9_2211; CHECK-NEXT: # %bb.1:212; CHECK-NEXT: #APP213; CHECK-NEXT: nop214; CHECK-NEXT: #NO_APP215; CHECK-NEXT: .LBB9_2:216; CHECK-NEXT: b.l.t (, %s10)217 %3 = icmp eq i128 %0, %1218 br i1 %3, label %4, label %5219 2204: ; preds = %2221 tail call void asm sideeffect "nop", ""()222 br label %5223 2245: ; preds = %4, %2225 ret void226}227 228; Function Attrs: nounwind229define void @br_cc_u128_var(i128 %0, i128 %1) {230; CHECK-LABEL: br_cc_u128_var:231; CHECK: # %bb.0:232; CHECK-NEXT: xor %s1, %s1, %s3233; CHECK-NEXT: xor %s0, %s0, %s2234; CHECK-NEXT: or %s0, %s0, %s1235; CHECK-NEXT: brne.l 0, %s0, .LBB10_2236; CHECK-NEXT: # %bb.1:237; CHECK-NEXT: #APP238; CHECK-NEXT: nop239; CHECK-NEXT: #NO_APP240; CHECK-NEXT: .LBB10_2:241; CHECK-NEXT: b.l.t (, %s10)242 %3 = icmp eq i128 %0, %1243 br i1 %3, label %4, label %5244 2454: ; preds = %2246 tail call void asm sideeffect "nop", ""()247 br label %5248 2495: ; preds = %4, %2250 ret void251}252 253; Function Attrs: nounwind254define void @br_cc_float_var(float %0, float %1) {255; CHECK-LABEL: br_cc_float_var:256; CHECK: # %bb.0:257; CHECK-NEXT: brne.s %s0, %s1, .LBB11_2258; CHECK-NEXT: # %bb.1:259; CHECK-NEXT: #APP260; CHECK-NEXT: nop261; CHECK-NEXT: #NO_APP262; CHECK-NEXT: .LBB11_2:263; CHECK-NEXT: b.l.t (, %s10)264 %3 = fcmp fast oeq float %0, %1265 br i1 %3, label %4, label %5266 2674: ; preds = %2268 tail call void asm sideeffect "nop", ""()269 br label %5270 2715: ; preds = %4, %2272 ret void273}274 275; Function Attrs: nounwind276define void @br_cc_double_var(double %0, double %1) {277; CHECK-LABEL: br_cc_double_var:278; CHECK: # %bb.0:279; CHECK-NEXT: brne.d %s0, %s1, .LBB12_2280; CHECK-NEXT: # %bb.1:281; CHECK-NEXT: #APP282; CHECK-NEXT: nop283; CHECK-NEXT: #NO_APP284; CHECK-NEXT: .LBB12_2:285; CHECK-NEXT: b.l.t (, %s10)286 %3 = fcmp fast oeq double %0, %1287 br i1 %3, label %4, label %5288 2894: ; preds = %2290 tail call void asm sideeffect "nop", ""()291 br label %5292 2935: ; preds = %4, %2294 ret void295}296 297; Function Attrs: nounwind298define void @br_cc_quad_var(fp128 %0, fp128 %1) {299; CHECK-LABEL: br_cc_quad_var:300; CHECK: # %bb.0:301; CHECK-NEXT: fcmp.q %s0, %s2, %s0302; CHECK-NEXT: brne.d 0, %s0, .LBB13_2303; CHECK-NEXT: # %bb.1:304; CHECK-NEXT: #APP305; CHECK-NEXT: nop306; CHECK-NEXT: #NO_APP307; CHECK-NEXT: .LBB13_2:308; CHECK-NEXT: b.l.t (, %s10)309 %3 = fcmp fast oeq fp128 %0, %1310 br i1 %3, label %4, label %5311 3124: ; preds = %2313 tail call void asm sideeffect "nop", ""()314 br label %5315 3165: ; preds = %4, %2317 ret void318}319 320; Function Attrs: nounwind321define void @br_cc_i1_imm(i1 zeroext %0) {322; CHECK-LABEL: br_cc_i1_imm:323; CHECK: # %bb.0:324; CHECK-NEXT: brne.w 0, %s0, .LBB14_2325; CHECK-NEXT: # %bb.1:326; CHECK-NEXT: #APP327; CHECK-NEXT: nop328; CHECK-NEXT: #NO_APP329; CHECK-NEXT: .LBB14_2:330; CHECK-NEXT: b.l.t (, %s10)331 br i1 %0, label %3, label %2332 3332: ; preds = %1334 tail call void asm sideeffect "nop", ""()335 br label %3336 3373: ; preds = %2, %1338 ret void339}340 341; Function Attrs: nounwind342define void @br_cc_i8_imm(i8 signext %0) {343; CHECK-LABEL: br_cc_i8_imm:344; CHECK: # %bb.0:345; CHECK-NEXT: brlt.w -10, %s0, .LBB15_2346; CHECK-NEXT: # %bb.1:347; CHECK-NEXT: #APP348; CHECK-NEXT: nop349; CHECK-NEXT: #NO_APP350; CHECK-NEXT: .LBB15_2:351; CHECK-NEXT: b.l.t (, %s10)352 %2 = icmp slt i8 %0, -9353 br i1 %2, label %3, label %4354 3553: ; preds = %1356 tail call void asm sideeffect "nop", ""()357 br label %4358 3594: ; preds = %3, %1360 ret void361}362 363; Function Attrs: nounwind364define void @br_cc_u8_imm(i8 zeroext %0) {365; CHECK-LABEL: br_cc_u8_imm:366; CHECK: # %bb.0:367; CHECK-NEXT: cmpu.w %s0, 8, %s0368; CHECK-NEXT: brgt.w 0, %s0, .LBB16_2369; CHECK-NEXT: # %bb.1:370; CHECK-NEXT: #APP371; CHECK-NEXT: nop372; CHECK-NEXT: #NO_APP373; CHECK-NEXT: .LBB16_2:374; CHECK-NEXT: b.l.t (, %s10)375 %2 = icmp ult i8 %0, 9376 br i1 %2, label %3, label %4377 3783: ; preds = %1379 tail call void asm sideeffect "nop", ""()380 br label %4381 3824: ; preds = %3, %1383 ret void384}385 386; Function Attrs: nounwind387define void @br_cc_i16_imm(i16 signext %0) {388; CHECK-LABEL: br_cc_i16_imm:389; CHECK: # %bb.0:390; CHECK-NEXT: brlt.w 62, %s0, .LBB17_2391; CHECK-NEXT: # %bb.1:392; CHECK-NEXT: #APP393; CHECK-NEXT: nop394; CHECK-NEXT: #NO_APP395; CHECK-NEXT: .LBB17_2:396; CHECK-NEXT: b.l.t (, %s10)397 %2 = icmp slt i16 %0, 63398 br i1 %2, label %3, label %4399 4003: ; preds = %1401 tail call void asm sideeffect "nop", ""()402 br label %4403 4044: ; preds = %3, %1405 ret void406}407 408; Function Attrs: nounwind409define void @br_cc_u16_imm(i16 zeroext %0) {410; CHECK-LABEL: br_cc_u16_imm:411; CHECK: # %bb.0:412; CHECK-NEXT: cmpu.w %s0, 63, %s0413; CHECK-NEXT: brgt.w 0, %s0, .LBB18_2414; CHECK-NEXT: # %bb.1:415; CHECK-NEXT: #APP416; CHECK-NEXT: nop417; CHECK-NEXT: #NO_APP418; CHECK-NEXT: .LBB18_2:419; CHECK-NEXT: b.l.t (, %s10)420 %2 = icmp ult i16 %0, 64421 br i1 %2, label %3, label %4422 4233: ; preds = %1424 tail call void asm sideeffect "nop", ""()425 br label %4426 4274: ; preds = %3, %1428 ret void429}430 431; Function Attrs: nounwind432define void @br_cc_i32_imm(i32 signext %0) {433; CHECK-LABEL: br_cc_i32_imm:434; CHECK: # %bb.0:435; CHECK-NEXT: brlt.w 63, %s0, .LBB19_2436; CHECK-NEXT: # %bb.1:437; CHECK-NEXT: #APP438; CHECK-NEXT: nop439; CHECK-NEXT: #NO_APP440; CHECK-NEXT: .LBB19_2:441; CHECK-NEXT: b.l.t (, %s10)442 %2 = icmp slt i32 %0, 64443 br i1 %2, label %3, label %4444 4453: ; preds = %1446 tail call void asm sideeffect "nop", ""()447 br label %4448 4494: ; preds = %3, %1450 ret void451}452 453; Function Attrs: nounwind454define void @br_cc_u32_imm(i32 zeroext %0) {455; CHECK-LABEL: br_cc_u32_imm:456; CHECK: # %bb.0:457; CHECK-NEXT: cmpu.w %s0, 63, %s0458; CHECK-NEXT: brgt.w 0, %s0, .LBB20_2459; CHECK-NEXT: # %bb.1:460; CHECK-NEXT: #APP461; CHECK-NEXT: nop462; CHECK-NEXT: #NO_APP463; CHECK-NEXT: .LBB20_2:464; CHECK-NEXT: b.l.t (, %s10)465 %2 = icmp ult i32 %0, 64466 br i1 %2, label %3, label %4467 4683: ; preds = %1469 tail call void asm sideeffect "nop", ""()470 br label %4471 4724: ; preds = %3, %1473 ret void474}475 476; Function Attrs: nounwind477define void @br_cc_i64_imm(i64 %0) {478; CHECK-LABEL: br_cc_i64_imm:479; CHECK: # %bb.0:480; CHECK-NEXT: brlt.l 63, %s0, .LBB21_2481; CHECK-NEXT: # %bb.1:482; CHECK-NEXT: #APP483; CHECK-NEXT: nop484; CHECK-NEXT: #NO_APP485; CHECK-NEXT: .LBB21_2:486; CHECK-NEXT: b.l.t (, %s10)487 %2 = icmp slt i64 %0, 64488 br i1 %2, label %3, label %4489 4903: ; preds = %1491 tail call void asm sideeffect "nop", ""()492 br label %4493 4944: ; preds = %3, %1495 ret void496}497 498; Function Attrs: nounwind499define void @br_cc_u64_imm(i64 %0) {500; CHECK-LABEL: br_cc_u64_imm:501; CHECK: # %bb.0:502; CHECK-NEXT: cmpu.l %s0, 63, %s0503; CHECK-NEXT: brgt.l 0, %s0, .LBB22_2504; CHECK-NEXT: # %bb.1:505; CHECK-NEXT: #APP506; CHECK-NEXT: nop507; CHECK-NEXT: #NO_APP508; CHECK-NEXT: .LBB22_2:509; CHECK-NEXT: b.l.t (, %s10)510 %2 = icmp ult i64 %0, 64511 br i1 %2, label %3, label %4512 5133: ; preds = %1514 tail call void asm sideeffect "nop", ""()515 br label %4516 5174: ; preds = %3, %1518 ret void519}520 521; Function Attrs: nounwind522define void @br_cc_i128_imm(i128 %0) {523; CHECK-LABEL: br_cc_i128_imm:524; CHECK: # %bb.0:525; CHECK-NEXT: or %s2, 0, (0)1526; CHECK-NEXT: cmps.l %s3, %s1, (0)1527; CHECK-NEXT: or %s4, 0, (0)1528; CHECK-NEXT: cmov.l.gt %s4, (63)0, %s3529; CHECK-NEXT: cmpu.l %s0, %s0, (58)0530; CHECK-NEXT: cmov.l.gt %s2, (63)0, %s0531; CHECK-NEXT: cmov.l.eq %s4, %s2, %s1532; CHECK-NEXT: brne.w 0, %s4, .LBB23_2533; CHECK-NEXT: # %bb.1:534; CHECK-NEXT: #APP535; CHECK-NEXT: nop536; CHECK-NEXT: #NO_APP537; CHECK-NEXT: .LBB23_2:538; CHECK-NEXT: b.l.t (, %s10)539 %2 = icmp slt i128 %0, 64540 br i1 %2, label %3, label %4541 5423: ; preds = %1543 tail call void asm sideeffect "nop", ""()544 br label %4545 5464: ; preds = %3, %1547 ret void548}549 550; Function Attrs: nounwind551define void @br_cc_u128_imm(i128 %0) {552; CHECK-LABEL: br_cc_u128_imm:553; CHECK: # %bb.0:554; CHECK-NEXT: or %s2, 0, (0)1555; CHECK-NEXT: cmps.l %s3, %s1, (0)1556; CHECK-NEXT: or %s4, 0, (0)1557; CHECK-NEXT: cmov.l.ne %s4, (63)0, %s3558; CHECK-NEXT: cmpu.l %s0, %s0, (58)0559; CHECK-NEXT: cmov.l.gt %s2, (63)0, %s0560; CHECK-NEXT: cmov.l.eq %s4, %s2, %s1561; CHECK-NEXT: brne.w 0, %s4, .LBB24_2562; CHECK-NEXT: # %bb.1:563; CHECK-NEXT: #APP564; CHECK-NEXT: nop565; CHECK-NEXT: #NO_APP566; CHECK-NEXT: .LBB24_2:567; CHECK-NEXT: b.l.t (, %s10)568 %2 = icmp ult i128 %0, 64569 br i1 %2, label %3, label %4570 5713: ; preds = %1572 tail call void asm sideeffect "nop", ""()573 br label %4574 5754: ; preds = %3, %1576 ret void577}578 579; Function Attrs: nounwind580define void @br_cc_float_imm(float %0) {581; CHECK-LABEL: br_cc_float_imm:582; CHECK: # %bb.0:583; CHECK-NEXT: brle.s 0, %s0, .LBB25_2584; CHECK-NEXT: # %bb.1:585; CHECK-NEXT: #APP586; CHECK-NEXT: nop587; CHECK-NEXT: #NO_APP588; CHECK-NEXT: .LBB25_2:589; CHECK-NEXT: b.l.t (, %s10)590 %2 = fcmp fast olt float %0, 0.000000e+00591 br i1 %2, label %3, label %4592 5933: ; preds = %1594 tail call void asm sideeffect "nop", ""()595 br label %4596 5974: ; preds = %3, %1598 ret void599}600 601; Function Attrs: nounwind602define void @br_cc_double_imm(double %0) {603; CHECK-LABEL: br_cc_double_imm:604; CHECK: # %bb.0:605; CHECK-NEXT: brle.d 0, %s0, .LBB26_2606; CHECK-NEXT: # %bb.1:607; CHECK-NEXT: #APP608; CHECK-NEXT: nop609; CHECK-NEXT: #NO_APP610; CHECK-NEXT: .LBB26_2:611; CHECK-NEXT: b.l.t (, %s10)612 %2 = fcmp fast olt double %0, 0.000000e+00613 br i1 %2, label %3, label %4614 6153: ; preds = %1616 tail call void asm sideeffect "nop", ""()617 br label %4618 6194: ; preds = %3, %1620 ret void621}622 623; Function Attrs: nounwind624define void @br_cc_quad_imm(fp128 %0) {625; CHECK-LABEL: br_cc_quad_imm:626; CHECK: # %bb.0:627; CHECK-NEXT: lea %s2, .LCPI27_0@lo628; CHECK-NEXT: and %s2, %s2, (32)0629; CHECK-NEXT: lea.sl %s2, .LCPI27_0@hi(, %s2)630; CHECK-NEXT: ld %s4, 8(, %s2)631; CHECK-NEXT: ld %s5, (, %s2)632; CHECK-NEXT: fcmp.q %s0, %s4, %s0633; CHECK-NEXT: brge.d 0, %s0, .LBB27_2634; CHECK-NEXT: # %bb.1:635; CHECK-NEXT: #APP636; CHECK-NEXT: nop637; CHECK-NEXT: #NO_APP638; CHECK-NEXT: .LBB27_2:639; CHECK-NEXT: b.l.t (, %s10)640 %2 = fcmp fast olt fp128 %0, 0xL00000000000000000000000000000000641 br i1 %2, label %3, label %4642 6433: ; preds = %1644 tail call void asm sideeffect "nop", ""()645 br label %4646 6474: ; preds = %3, %1648 ret void649}650 651; Function Attrs: nounwind652define void @br_cc_imm_i1(i1 zeroext %0) {653; CHECK-LABEL: br_cc_imm_i1:654; CHECK: # %bb.0:655; CHECK-NEXT: breq.w 0, %s0, .LBB28_2656; CHECK-NEXT: # %bb.1:657; CHECK-NEXT: #APP658; CHECK-NEXT: nop659; CHECK-NEXT: #NO_APP660; CHECK-NEXT: .LBB28_2:661; CHECK-NEXT: b.l.t (, %s10)662 br i1 %0, label %2, label %3663 6642: ; preds = %1665 tail call void asm sideeffect "nop", ""()666 br label %3667 6683: ; preds = %2, %1669 ret void670}671 672; Function Attrs: nounwind673define void @br_cc_imm_i8(i8 signext %0) {674; CHECK-LABEL: br_cc_imm_i8:675; CHECK: # %bb.0:676; CHECK-NEXT: brgt.w -9, %s0, .LBB29_2677; CHECK-NEXT: # %bb.1:678; CHECK-NEXT: #APP679; CHECK-NEXT: nop680; CHECK-NEXT: #NO_APP681; CHECK-NEXT: .LBB29_2:682; CHECK-NEXT: b.l.t (, %s10)683 %2 = icmp sgt i8 %0, -10684 br i1 %2, label %3, label %4685 6863: ; preds = %1687 tail call void asm sideeffect "nop", ""()688 br label %4689 6904: ; preds = %3, %1691 ret void692}693 694; Function Attrs: nounwind695define void @br_cc_imm_u8(i8 zeroext %0) {696; CHECK-LABEL: br_cc_imm_u8:697; CHECK: # %bb.0:698; CHECK-NEXT: cmpu.w %s0, 9, %s0699; CHECK-NEXT: brlt.w 0, %s0, .LBB30_2700; CHECK-NEXT: # %bb.1:701; CHECK-NEXT: #APP702; CHECK-NEXT: nop703; CHECK-NEXT: #NO_APP704; CHECK-NEXT: .LBB30_2:705; CHECK-NEXT: b.l.t (, %s10)706 %2 = icmp ugt i8 %0, 8707 br i1 %2, label %3, label %4708 7093: ; preds = %1710 tail call void asm sideeffect "nop", ""()711 br label %4712 7134: ; preds = %3, %1714 ret void715}716 717; Function Attrs: nounwind718define void @br_cc_imm_i16(i16 signext %0) {719; CHECK-LABEL: br_cc_imm_i16:720; CHECK: # %bb.0:721; CHECK-NEXT: brgt.w 63, %s0, .LBB31_2722; CHECK-NEXT: # %bb.1:723; CHECK-NEXT: #APP724; CHECK-NEXT: nop725; CHECK-NEXT: #NO_APP726; CHECK-NEXT: .LBB31_2:727; CHECK-NEXT: b.l.t (, %s10)728 %2 = icmp sgt i16 %0, 62729 br i1 %2, label %3, label %4730 7313: ; preds = %1732 tail call void asm sideeffect "nop", ""()733 br label %4734 7354: ; preds = %3, %1736 ret void737}738 739; Function Attrs: nounwind740define void @br_cc_imm_u16(i16 zeroext %0) {741; CHECK-LABEL: br_cc_imm_u16:742; CHECK: # %bb.0:743; CHECK-NEXT: lea %s1, 64744; CHECK-NEXT: cmpu.w %s0, %s1, %s0745; CHECK-NEXT: brlt.w 0, %s0, .LBB32_2746; CHECK-NEXT: # %bb.1:747; CHECK-NEXT: #APP748; CHECK-NEXT: nop749; CHECK-NEXT: #NO_APP750; CHECK-NEXT: .LBB32_2:751; CHECK-NEXT: b.l.t (, %s10)752 %2 = icmp ugt i16 %0, 63753 br i1 %2, label %3, label %4754 7553: ; preds = %1756 tail call void asm sideeffect "nop", ""()757 br label %4758 7594: ; preds = %3, %1760 ret void761}762 763; Function Attrs: nounwind764define void @br_cc_imm_i32(i32 signext %0) {765; CHECK-LABEL: br_cc_imm_i32:766; CHECK: # %bb.0:767; CHECK-NEXT: brgt.w -64, %s0, .LBB33_2768; CHECK-NEXT: # %bb.1:769; CHECK-NEXT: #APP770; CHECK-NEXT: nop771; CHECK-NEXT: #NO_APP772; CHECK-NEXT: .LBB33_2:773; CHECK-NEXT: b.l.t (, %s10)774 %2 = icmp sgt i32 %0, -65775 br i1 %2, label %3, label %4776 7773: ; preds = %1778 tail call void asm sideeffect "nop", ""()779 br label %4780 7814: ; preds = %3, %1782 ret void783}784 785; Function Attrs: nounwind786define void @br_cc_imm_u32(i32 zeroext %0) {787; CHECK-LABEL: br_cc_imm_u32:788; CHECK: # %bb.0:789; CHECK-NEXT: cmpu.w %s0, -64, %s0790; CHECK-NEXT: brlt.w 0, %s0, .LBB34_2791; CHECK-NEXT: # %bb.1:792; CHECK-NEXT: #APP793; CHECK-NEXT: nop794; CHECK-NEXT: #NO_APP795; CHECK-NEXT: .LBB34_2:796; CHECK-NEXT: b.l.t (, %s10)797 %2 = icmp ugt i32 %0, -65798 br i1 %2, label %3, label %4799 8003: ; preds = %1801 tail call void asm sideeffect "nop", ""()802 br label %4803 8044: ; preds = %3, %1805 ret void806}807 808; Function Attrs: nounwind809define void @br_cc_imm_i64(i64 %0) {810; CHECK-LABEL: br_cc_imm_i64:811; CHECK: # %bb.0:812; CHECK-NEXT: brgt.l -64, %s0, .LBB35_2813; CHECK-NEXT: # %bb.1:814; CHECK-NEXT: #APP815; CHECK-NEXT: nop816; CHECK-NEXT: #NO_APP817; CHECK-NEXT: .LBB35_2:818; CHECK-NEXT: b.l.t (, %s10)819 %2 = icmp sgt i64 %0, -65820 br i1 %2, label %3, label %4821 8223: ; preds = %1823 tail call void asm sideeffect "nop", ""()824 br label %4825 8264: ; preds = %3, %1827 ret void828}829 830; Function Attrs: nounwind831define void @br_cc_imm_u64(i64 %0) {832; CHECK-LABEL: br_cc_imm_u64:833; CHECK: # %bb.0:834; CHECK-NEXT: cmpu.l %s0, -64, %s0835; CHECK-NEXT: brlt.l 0, %s0, .LBB36_2836; CHECK-NEXT: # %bb.1:837; CHECK-NEXT: #APP838; CHECK-NEXT: nop839; CHECK-NEXT: #NO_APP840; CHECK-NEXT: .LBB36_2:841; CHECK-NEXT: b.l.t (, %s10)842 %2 = icmp ugt i64 %0, -65843 br i1 %2, label %3, label %4844 8453: ; preds = %1846 tail call void asm sideeffect "nop", ""()847 br label %4848 8494: ; preds = %3, %1850 ret void851}852 853; Function Attrs: nounwind854define void @br_cc_imm_i128(i128 %0) {855; CHECK-LABEL: br_cc_imm_i128:856; CHECK: # %bb.0:857; CHECK-NEXT: cmps.l %s2, %s1, (0)0858; CHECK-NEXT: or %s3, 0, (0)1859; CHECK-NEXT: or %s4, 0, (0)1860; CHECK-NEXT: cmov.l.lt %s4, (63)0, %s2861; CHECK-NEXT: cmpu.l %s0, %s0, (58)1862; CHECK-NEXT: cmov.l.lt %s3, (63)0, %s0863; CHECK-NEXT: cmpu.l %s0, %s1, (0)0864; CHECK-NEXT: cmov.l.eq %s4, %s3, %s0865; CHECK-NEXT: brne.w 0, %s4, .LBB37_2866; CHECK-NEXT: # %bb.1:867; CHECK-NEXT: #APP868; CHECK-NEXT: nop869; CHECK-NEXT: #NO_APP870; CHECK-NEXT: .LBB37_2:871; CHECK-NEXT: b.l.t (, %s10)872 %2 = icmp sgt i128 %0, -65873 br i1 %2, label %3, label %4874 8753: ; preds = %1876 tail call void asm sideeffect "nop", ""()877 br label %4878 8794: ; preds = %3, %1880 ret void881}882 883; Function Attrs: nounwind884define void @br_cc_imm_u128(i128 %0) {885; CHECK-LABEL: br_cc_imm_u128:886; CHECK: # %bb.0:887; CHECK-NEXT: cmps.l %s2, %s1, (0)0888; CHECK-NEXT: or %s3, 0, (0)1889; CHECK-NEXT: or %s4, 0, (0)1890; CHECK-NEXT: cmov.l.ne %s4, (63)0, %s2891; CHECK-NEXT: cmpu.l %s0, %s0, (58)1892; CHECK-NEXT: cmov.l.lt %s3, (63)0, %s0893; CHECK-NEXT: cmpu.l %s0, %s1, (0)0894; CHECK-NEXT: cmov.l.eq %s4, %s3, %s0895; CHECK-NEXT: brne.w 0, %s4, .LBB38_2896; CHECK-NEXT: # %bb.1:897; CHECK-NEXT: #APP898; CHECK-NEXT: nop899; CHECK-NEXT: #NO_APP900; CHECK-NEXT: .LBB38_2:901; CHECK-NEXT: b.l.t (, %s10)902 %2 = icmp ugt i128 %0, -65903 br i1 %2, label %3, label %4904 9053: ; preds = %1906 tail call void asm sideeffect "nop", ""()907 br label %4908 9094: ; preds = %3, %1910 ret void911}912 913; Function Attrs: nounwind914define void @br_cc_imm_float(float %0) {915; CHECK-LABEL: br_cc_imm_float:916; CHECK: # %bb.0:917; CHECK-NEXT: brgt.s 0, %s0, .LBB39_2918; CHECK-NEXT: # %bb.1:919; CHECK-NEXT: #APP920; CHECK-NEXT: nop921; CHECK-NEXT: #NO_APP922; CHECK-NEXT: .LBB39_2:923; CHECK-NEXT: b.l.t (, %s10)924 %2 = fcmp fast ult float %0, 0.000000e+00925 br i1 %2, label %4, label %3926 9273: ; preds = %1928 tail call void asm sideeffect "nop", ""()929 br label %4930 9314: ; preds = %3, %1932 ret void933}934 935; Function Attrs: nounwind936define void @br_cc_imm_double(double %0) {937; CHECK-LABEL: br_cc_imm_double:938; CHECK: # %bb.0:939; CHECK-NEXT: brgt.d 0, %s0, .LBB40_2940; CHECK-NEXT: # %bb.1:941; CHECK-NEXT: #APP942; CHECK-NEXT: nop943; CHECK-NEXT: #NO_APP944; CHECK-NEXT: .LBB40_2:945; CHECK-NEXT: b.l.t (, %s10)946 %2 = fcmp fast ult double %0, 0.000000e+00947 br i1 %2, label %4, label %3948 9493: ; preds = %1950 tail call void asm sideeffect "nop", ""()951 br label %4952 9534: ; preds = %3, %1954 ret void955}956 957; Function Attrs: nounwind958define void @br_cc_imm_quad(fp128 %0) {959; CHECK-LABEL: br_cc_imm_quad:960; CHECK: # %bb.0:961; CHECK-NEXT: lea %s2, .LCPI41_0@lo962; CHECK-NEXT: and %s2, %s2, (32)0963; CHECK-NEXT: lea.sl %s2, .LCPI41_0@hi(, %s2)964; CHECK-NEXT: ld %s4, 8(, %s2)965; CHECK-NEXT: ld %s5, (, %s2)966; CHECK-NEXT: fcmp.q %s0, %s4, %s0967; CHECK-NEXT: brlt.d 0, %s0, .LBB41_2968; CHECK-NEXT: # %bb.1:969; CHECK-NEXT: #APP970; CHECK-NEXT: nop971; CHECK-NEXT: #NO_APP972; CHECK-NEXT: .LBB41_2:973; CHECK-NEXT: b.l.t (, %s10)974 %2 = fcmp fast ult fp128 %0, 0xL00000000000000000000000000000000975 br i1 %2, label %4, label %3976 9773: ; preds = %1978 tail call void asm sideeffect "nop", ""()979 br label %4980 9814: ; preds = %3, %1982 ret void983}984