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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve | FileCheck %s3 4;;; Test store instructions5;;;6;;; Note:7;;; We test store instructions using general stack, stack with dynamic8;;; allocation, stack with dynamic allocation and alignment, and stack9;;; with dynamic allocation, alignment, and spill.10;;;11;;; Fist test using a stack for leaf function.12;;;13;;; | | Higher address14;;; |----------------------------------------------| <- old sp15;;; | Local variables of fixed size |16;;; |----------------------------------------------| <- sp17;;; | | Lower address18;;;19;;; Access local variable using sp (%s11). In addition, please remember20;;; that stack is aligned by 16 bytes.21;;;22;;; Second test using a general stack.23;;;24;;; | | Higher address25;;; |----------------------------------------------|26;;; | Parameter area for this function |27;;; |----------------------------------------------|28;;; | Register save area (RSA) for this function |29;;; |----------------------------------------------|30;;; | Return address for this function |31;;; |----------------------------------------------|32;;; | Frame pointer for this function |33;;; |----------------------------------------------| <- fp(=old sp)34;;; | Local variables of fixed size |35;;; |----------------------------------------------|36;;; |.variable-sized.local.variables.(VLAs)........|37;;; |..............................................|38;;; |..............................................|39;;; |----------------------------------------------| <- returned by alloca40;;; | Parameter area for callee |41;;; |----------------------------------------------|42;;; | Register save area (RSA) for callee |43;;; |----------------------------------------------|44;;; | Return address for callee |45;;; |----------------------------------------------|46;;; | Frame pointer for callee |47;;; |----------------------------------------------| <- sp48;;; | | Lower address49;;;50;;; Access local variable using fp (%s9) since the size of VLA is not51;;; known. At the beginning of the functions, allocates 240 + data52;;; bytes. 240 means RSA+RA+FP (=176) + Parameter (=64).53;;;54;;; Third test using a general stack.55;;;56;;; | | Higher address57;;; |----------------------------------------------|58;;; | Parameter area for this function |59;;; |----------------------------------------------|60;;; | Register save area (RSA) for this function |61;;; |----------------------------------------------|62;;; | Return address for this function |63;;; |----------------------------------------------|64;;; | Frame pointer for this function |65;;; |----------------------------------------------| <- fp(=old sp)66;;; |.empty.space.to.make.part.below.aligned.in....|67;;; |.case.it.needs.more.than.the.standard.16-byte.| (size of this area is68;;; |.alignment....................................| unknown at compile time)69;;; |----------------------------------------------|70;;; | Local variables of fixed size including spill|71;;; | slots |72;;; |----------------------------------------------| <- bp(not defined by ABI,73;;; |.variable-sized.local.variables.(VLAs)........| LLVM chooses SX17)74;;; |..............................................| (size of this area is75;;; |..............................................| unknown at compile time)76;;; |----------------------------------------------| <- stack top (returned by77;;; | Parameter area for callee | alloca)78;;; |----------------------------------------------|79;;; | Register save area (RSA) for callee |80;;; |----------------------------------------------|81;;; | Return address for callee |82;;; |----------------------------------------------|83;;; | Frame pointer for callee |84;;; |----------------------------------------------| <- sp85;;; | | Lower address86;;;87;;; Access local variable using bp (%s17) since the size of alignment88;;; and VLA are not known. At the beginning of the functions, allocates89;;; pad(240 + data + align) bytes. Then, access data through bp + pad(240)90;;; since this address doesn't change even if VLA is dynamically allocated.91;;;92;;; Fourth test using a general stack with some spills.93;;;94 95; Function Attrs: argmemonly nofree nounwind96define x86_fastcallcc void @storei64_stk(i64 noundef %0) {97; CHECK-LABEL: storei64_stk:98; CHECK: # %bb.0:99; CHECK-NEXT: adds.l %s11, -16, %s11100; CHECK-NEXT: brge.l.t %s11, %s8, .LBB0_2101; CHECK-NEXT: # %bb.1:102; CHECK-NEXT: ld %s61, 24(, %s14)103; CHECK-NEXT: or %s62, 0, %s0104; CHECK-NEXT: lea %s63, 315105; CHECK-NEXT: shm.l %s63, (%s61)106; CHECK-NEXT: shm.l %s8, 8(%s61)107; CHECK-NEXT: shm.l %s11, 16(%s61)108; CHECK-NEXT: monc109; CHECK-NEXT: or %s0, 0, %s62110; CHECK-NEXT: .LBB0_2:111; CHECK-NEXT: st %s0, 8(, %s11)112; CHECK-NEXT: adds.l %s11, 16, %s11113; CHECK-NEXT: b.l.t (, %s10)114 %2 = alloca i64, align 8115 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2)116 store volatile i64 %0, ptr %2, align 8, !tbaa !3117 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)118 ret void119}120 121; Function Attrs: argmemonly mustprogress nocallback nofree nosync nounwind willreturn122declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)123 124; Function Attrs: argmemonly mustprogress nocallback nofree nosync nounwind willreturn125declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)126 127; Function Attrs: argmemonly nofree nounwind128define x86_fastcallcc void @storei64_stk_big(i64 noundef %0, i64 noundef %1) {129; CHECK-LABEL: storei64_stk_big:130; CHECK: # %bb.0:131; CHECK-NEXT: lea %s11, -2147483648(, %s11)132; CHECK-NEXT: brge.l %s11, %s8, .LBB1_4133; CHECK-NEXT: # %bb.3:134; CHECK-NEXT: ld %s61, 24(, %s14)135; CHECK-NEXT: or %s62, 0, %s0136; CHECK-NEXT: lea %s63, 315137; CHECK-NEXT: shm.l %s63, (%s61)138; CHECK-NEXT: shm.l %s8, 8(%s61)139; CHECK-NEXT: shm.l %s11, 16(%s61)140; CHECK-NEXT: monc141; CHECK-NEXT: or %s0, 0, %s62142; CHECK-NEXT: .LBB1_4:143; CHECK-NEXT: st %s0, 2147483640(, %s11)144; CHECK-NEXT: or %s0, 0, (0)1145; CHECK-NEXT: lea %s2, 2147483640146; CHECK-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1147; CHECK-NEXT: st %s1, (%s0, %s11)148; CHECK-NEXT: lea %s0, 8(, %s0)149; CHECK-NEXT: brne.l %s0, %s2, .LBB1_1150; CHECK-NEXT: # %bb.2:151; CHECK-NEXT: lea %s13, -2147483648152; CHECK-NEXT: and %s13, %s13, (32)0153; CHECK-NEXT: lea.sl %s11, (%s13, %s11)154; CHECK-NEXT: b.l.t (, %s10)155 %3 = alloca i64, align 8156 %4 = alloca [268435455 x i64], align 8157 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3)158 call void @llvm.lifetime.start.p0(i64 2147483640, ptr nonnull %4)159 store volatile i64 %0, ptr %3, align 8, !tbaa !3160 br label %6161 1625: ; preds = %6163 call void @llvm.lifetime.end.p0(i64 2147483640, ptr nonnull %4)164 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)165 ret void166 1676: ; preds = %2, %6168 %7 = phi i64 [ 0, %2 ], [ %9, %6 ]169 %8 = getelementptr inbounds [268435455 x i64], ptr %4, i64 0, i64 %7170 store volatile i64 %1, ptr %8, align 8, !tbaa !3171 %9 = add nuw nsw i64 %7, 1172 %10 = icmp eq i64 %9, 268435455173 br i1 %10, label %5, label %6, !llvm.loop !7174}175 176; Function Attrs: argmemonly nofree nounwind177define x86_fastcallcc void @storei64_stk_big2(i64 noundef %0, i64 noundef %1) {178; CHECK-LABEL: storei64_stk_big2:179; CHECK: # %bb.0:180; CHECK-NEXT: lea %s13, 2147483632181; CHECK-NEXT: and %s13, %s13, (32)0182; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)183; CHECK-NEXT: brge.l %s11, %s8, .LBB2_4184; CHECK-NEXT: # %bb.3:185; CHECK-NEXT: ld %s61, 24(, %s14)186; CHECK-NEXT: or %s62, 0, %s0187; CHECK-NEXT: lea %s63, 315188; CHECK-NEXT: shm.l %s63, (%s61)189; CHECK-NEXT: shm.l %s8, 8(%s61)190; CHECK-NEXT: shm.l %s11, 16(%s61)191; CHECK-NEXT: monc192; CHECK-NEXT: or %s0, 0, %s62193; CHECK-NEXT: .LBB2_4:194; CHECK-NEXT: lea %s13, -2147483640195; CHECK-NEXT: and %s13, %s13, (32)0196; CHECK-NEXT: lea.sl %s13, (%s11, %s13)197; CHECK-NEXT: st %s0, (, %s13)198; CHECK-NEXT: or %s0, 0, (0)1199; CHECK-NEXT: lea %s2, -2147483648200; CHECK-NEXT: and %s2, %s2, (32)0201; CHECK-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1202; CHECK-NEXT: st %s1, 8(%s0, %s11)203; CHECK-NEXT: lea %s0, 8(, %s0)204; CHECK-NEXT: brne.l %s0, %s2, .LBB2_1205; CHECK-NEXT: # %bb.2:206; CHECK-NEXT: lea %s13, -2147483632207; CHECK-NEXT: and %s13, %s13, (32)0208; CHECK-NEXT: lea.sl %s11, (%s13, %s11)209; CHECK-NEXT: b.l.t (, %s10)210 %3 = alloca i64, align 8211 %4 = alloca [268435456 x i64], align 8212 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3)213 call void @llvm.lifetime.start.p0(i64 2147483648, ptr nonnull %4)214 store volatile i64 %0, ptr %3, align 8, !tbaa !3215 br label %6216 2175: ; preds = %6218 call void @llvm.lifetime.end.p0(i64 2147483648, ptr nonnull %4)219 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)220 ret void221 2226: ; preds = %2, %6223 %7 = phi i64 [ 0, %2 ], [ %9, %6 ]224 %8 = getelementptr inbounds [268435456 x i64], ptr %4, i64 0, i64 %7225 store volatile i64 %1, ptr %8, align 8, !tbaa !3226 %9 = add nuw nsw i64 %7, 1227 %10 = icmp eq i64 %9, 268435456228 br i1 %10, label %5, label %6, !llvm.loop !9229}230 231; Function Attrs: argmemonly nofree nounwind232define x86_fastcallcc void @storei64_stk_dyn(i64 noundef %0, i64 noundef %1) {233; CHECK-LABEL: storei64_stk_dyn:234; CHECK: # %bb.0:235; CHECK-NEXT: st %s9, (, %s11)236; CHECK-NEXT: st %s10, 8(, %s11)237; CHECK-NEXT: or %s9, 0, %s11238; CHECK-NEXT: lea %s11, -256(, %s11)239; CHECK-NEXT: brge.l.t %s11, %s8, .LBB3_2240; CHECK-NEXT: # %bb.1:241; CHECK-NEXT: ld %s61, 24(, %s14)242; CHECK-NEXT: or %s62, 0, %s0243; CHECK-NEXT: lea %s63, 315244; CHECK-NEXT: shm.l %s63, (%s61)245; CHECK-NEXT: shm.l %s8, 8(%s61)246; CHECK-NEXT: shm.l %s11, 16(%s61)247; CHECK-NEXT: monc248; CHECK-NEXT: or %s0, 0, %s62249; CHECK-NEXT: .LBB3_2:250; CHECK-NEXT: or %s2, 0, %s0251; CHECK-NEXT: lea %s0, 15(, %s1)252; CHECK-NEXT: and %s0, -16, %s0253; CHECK-NEXT: lea %s1, __ve_grow_stack@lo254; CHECK-NEXT: and %s1, %s1, (32)0255; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)256; CHECK-NEXT: bsic %s10, (, %s12)257; CHECK-NEXT: lea %s0, 240(, %s11)258; CHECK-NEXT: st %s2, (, %s0)259; CHECK-NEXT: st %s2, -8(, %s9)260; CHECK-NEXT: or %s11, 0, %s9261; CHECK-NEXT: ld %s10, 8(, %s11)262; CHECK-NEXT: ld %s9, (, %s11)263; CHECK-NEXT: b.l.t (, %s10)264 %3 = alloca i64, align 8265 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3)266 %4 = alloca i8, i64 %1, align 8267 store volatile i64 %0, ptr %4, align 8, !tbaa !3268 store volatile i64 %0, ptr %3, align 8, !tbaa !3269 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)270 ret void271}272 273; Function Attrs: argmemonly nofree nounwind274define x86_fastcallcc void @storei64_stk_dyn_align(i64 noundef %0, i64 noundef %1) {275; CHECK-LABEL: storei64_stk_dyn_align:276; CHECK: # %bb.0:277; CHECK-NEXT: st %s9, (, %s11)278; CHECK-NEXT: st %s10, 8(, %s11)279; CHECK-NEXT: st %s17, 40(, %s11)280; CHECK-NEXT: or %s9, 0, %s11281; CHECK-NEXT: lea %s11, -288(, %s11)282; CHECK-NEXT: and %s11, %s11, (59)1283; CHECK-NEXT: or %s17, 0, %s11284; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2285; CHECK-NEXT: # %bb.1:286; CHECK-NEXT: ld %s61, 24(, %s14)287; CHECK-NEXT: or %s62, 0, %s0288; CHECK-NEXT: lea %s63, 315289; CHECK-NEXT: shm.l %s63, (%s61)290; CHECK-NEXT: shm.l %s8, 8(%s61)291; CHECK-NEXT: shm.l %s11, 16(%s61)292; CHECK-NEXT: monc293; CHECK-NEXT: or %s0, 0, %s62294; CHECK-NEXT: .LBB4_2:295; CHECK-NEXT: or %s2, 0, %s0296; CHECK-NEXT: lea %s0, 15(, %s1)297; CHECK-NEXT: and %s0, -16, %s0298; CHECK-NEXT: lea %s1, __ve_grow_stack@lo299; CHECK-NEXT: and %s1, %s1, (32)0300; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)301; CHECK-NEXT: bsic %s10, (, %s12)302; CHECK-NEXT: lea %s0, 240(, %s11)303; CHECK-NEXT: st %s2, (, %s0)304; CHECK-NEXT: st %s2, 256(, %s17)305; CHECK-NEXT: or %s11, 0, %s9306; CHECK-NEXT: ld %s17, 40(, %s11)307; CHECK-NEXT: ld %s10, 8(, %s11)308; CHECK-NEXT: ld %s9, (, %s11)309; CHECK-NEXT: b.l.t (, %s10)310 %3 = alloca i64, align 32311 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3)312 %4 = alloca i8, i64 %1, align 8313 store volatile i64 %0, ptr %4, align 8, !tbaa !3314 store volatile i64 %0, ptr %3, align 32, !tbaa !10315 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)316 ret void317}318 319; Function Attrs: argmemonly nofree nounwind320define x86_fastcallcc void @storei64_stk_dyn_align2(i64 noundef %0, i64 noundef %1) {321; CHECK-LABEL: storei64_stk_dyn_align2:322; CHECK: # %bb.0:323; CHECK-NEXT: st %s9, (, %s11)324; CHECK-NEXT: st %s10, 8(, %s11)325; CHECK-NEXT: st %s17, 40(, %s11)326; CHECK-NEXT: or %s9, 0, %s11327; CHECK-NEXT: lea %s11, -320(, %s11)328; CHECK-NEXT: and %s11, %s11, (58)1329; CHECK-NEXT: or %s17, 0, %s11330; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2331; CHECK-NEXT: # %bb.1:332; CHECK-NEXT: ld %s61, 24(, %s14)333; CHECK-NEXT: or %s62, 0, %s0334; CHECK-NEXT: lea %s63, 315335; CHECK-NEXT: shm.l %s63, (%s61)336; CHECK-NEXT: shm.l %s8, 8(%s61)337; CHECK-NEXT: shm.l %s11, 16(%s61)338; CHECK-NEXT: monc339; CHECK-NEXT: or %s0, 0, %s62340; CHECK-NEXT: .LBB5_2:341; CHECK-NEXT: or %s2, 0, %s0342; CHECK-NEXT: lea %s0, 15(, %s1)343; CHECK-NEXT: and %s0, -16, %s0344; CHECK-NEXT: lea %s1, __ve_grow_stack@lo345; CHECK-NEXT: and %s1, %s1, (32)0346; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)347; CHECK-NEXT: bsic %s10, (, %s12)348; CHECK-NEXT: lea %s0, 240(, %s11)349; CHECK-NEXT: st %s2, (, %s0)350; CHECK-NEXT: st %s2, 288(, %s17)351; CHECK-NEXT: st %s2, 256(, %s17)352; CHECK-NEXT: or %s11, 0, %s9353; CHECK-NEXT: ld %s17, 40(, %s11)354; CHECK-NEXT: ld %s10, 8(, %s11)355; CHECK-NEXT: ld %s9, (, %s11)356; CHECK-NEXT: b.l.t (, %s10)357 %3 = alloca i64, align 32358 %4 = alloca i64, align 64359 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3)360 %5 = alloca i8, i64 %1, align 8361 store volatile i64 %0, ptr %5, align 8, !tbaa !3362 store volatile i64 %0, ptr %3, align 32, !tbaa !10363 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4)364 store volatile i64 %0, ptr %4, align 64, !tbaa !10365 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4)366 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)367 ret void368}369 370; Function Attrs: nounwind371define x86_fastcallcc void @storei64_stk_dyn_align_spill(i64 noundef %0, i64 noundef %1) {372; CHECK-LABEL: storei64_stk_dyn_align_spill:373; CHECK: # %bb.0:374; CHECK-NEXT: st %s9, (, %s11)375; CHECK-NEXT: st %s10, 8(, %s11)376; CHECK-NEXT: st %s17, 40(, %s11)377; CHECK-NEXT: or %s9, 0, %s11378; CHECK-NEXT: lea %s11, -288(, %s11)379; CHECK-NEXT: and %s11, %s11, (59)1380; CHECK-NEXT: or %s17, 0, %s11381; CHECK-NEXT: brge.l.t %s11, %s8, .LBB6_2382; CHECK-NEXT: # %bb.1:383; CHECK-NEXT: ld %s61, 24(, %s14)384; CHECK-NEXT: or %s62, 0, %s0385; CHECK-NEXT: lea %s63, 315386; CHECK-NEXT: shm.l %s63, (%s61)387; CHECK-NEXT: shm.l %s8, 8(%s61)388; CHECK-NEXT: shm.l %s11, 16(%s61)389; CHECK-NEXT: monc390; CHECK-NEXT: or %s0, 0, %s62391; CHECK-NEXT: .LBB6_2:392; CHECK-NEXT: st %s18, 48(, %s9) # 8-byte Folded Spill393; CHECK-NEXT: st %s19, 56(, %s9) # 8-byte Folded Spill394; CHECK-NEXT: st %s20, 64(, %s9) # 8-byte Folded Spill395; CHECK-NEXT: or %s18, 0, %s1396; CHECK-NEXT: or %s19, 0, %s0397; CHECK-NEXT: lea %s0, 15(, %s1)398; CHECK-NEXT: and %s0, -16, %s0399; CHECK-NEXT: lea %s1, __ve_grow_stack@lo400; CHECK-NEXT: and %s1, %s1, (32)0401; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)402; CHECK-NEXT: bsic %s10, (, %s12)403; CHECK-NEXT: lea %s20, 240(, %s11)404; CHECK-NEXT: lea %s0, dummy@lo405; CHECK-NEXT: and %s0, %s0, (32)0406; CHECK-NEXT: lea.sl %s12, dummy@hi(, %s0)407; CHECK-NEXT: bsic %s10, (, %s12)408; CHECK-NEXT: lea %s0, pass@lo409; CHECK-NEXT: and %s0, %s0, (32)0410; CHECK-NEXT: lea.sl %s12, pass@hi(, %s0)411; CHECK-NEXT: or %s0, 0, %s18412; CHECK-NEXT: bsic %s10, (, %s12)413; CHECK-NEXT: st %s19, (, %s20)414; CHECK-NEXT: st %s19, 256(, %s17)415; CHECK-NEXT: ld %s20, 64(, %s9) # 8-byte Folded Reload416; CHECK-NEXT: ld %s19, 56(, %s9) # 8-byte Folded Reload417; CHECK-NEXT: ld %s18, 48(, %s9) # 8-byte Folded Reload418; CHECK-NEXT: or %s11, 0, %s9419; CHECK-NEXT: ld %s17, 40(, %s11)420; CHECK-NEXT: ld %s10, 8(, %s11)421; CHECK-NEXT: ld %s9, (, %s11)422; CHECK-NEXT: b.l.t (, %s10)423 %3 = alloca i64, align 32424 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3)425 %4 = alloca i8, i64 %1, align 8426 tail call void (...) @dummy()427 tail call void @pass(i64 noundef %1)428 store volatile i64 %0, ptr %4, align 8, !tbaa !3429 store volatile i64 %0, ptr %3, align 32, !tbaa !10430 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)431 ret void432}433 434declare void @dummy(...)435 436declare void @pass(i64 noundef)437 438; Function Attrs: argmemonly nofree nounwind439define x86_fastcallcc void @storequad_stk(fp128 noundef %0) {440; CHECK-LABEL: storequad_stk:441; CHECK: # %bb.0:442; CHECK-NEXT: adds.l %s11, -16, %s11443; CHECK-NEXT: brge.l.t %s11, %s8, .LBB7_2444; CHECK-NEXT: # %bb.1:445; CHECK-NEXT: ld %s61, 24(, %s14)446; CHECK-NEXT: or %s62, 0, %s0447; CHECK-NEXT: lea %s63, 315448; CHECK-NEXT: shm.l %s63, (%s61)449; CHECK-NEXT: shm.l %s8, 8(%s61)450; CHECK-NEXT: shm.l %s11, 16(%s61)451; CHECK-NEXT: monc452; CHECK-NEXT: or %s0, 0, %s62453; CHECK-NEXT: .LBB7_2:454; CHECK-NEXT: st %s1, (, %s11)455; CHECK-NEXT: st %s0, 8(, %s11)456; CHECK-NEXT: adds.l %s11, 16, %s11457; CHECK-NEXT: b.l.t (, %s10)458 %2 = alloca fp128, align 16459 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2)460 store volatile fp128 %0, ptr %2, align 16, !tbaa !12461 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2)462 ret void463}464 465; Function Attrs: argmemonly nofree nounwind466define x86_fastcallcc void @storequad_stk_big(fp128 noundef %0, i64 noundef %1) {467; CHECK-LABEL: storequad_stk_big:468; CHECK: # %bb.0:469; CHECK-NEXT: lea %s13, 2147483632470; CHECK-NEXT: and %s13, %s13, (32)0471; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)472; CHECK-NEXT: brge.l %s11, %s8, .LBB8_4473; CHECK-NEXT: # %bb.3:474; CHECK-NEXT: ld %s61, 24(, %s14)475; CHECK-NEXT: or %s62, 0, %s0476; CHECK-NEXT: lea %s63, 315477; CHECK-NEXT: shm.l %s63, (%s61)478; CHECK-NEXT: shm.l %s8, 8(%s61)479; CHECK-NEXT: shm.l %s11, 16(%s61)480; CHECK-NEXT: monc481; CHECK-NEXT: or %s0, 0, %s62482; CHECK-NEXT: .LBB8_4:483; CHECK-NEXT: lea %s13, -2147483648484; CHECK-NEXT: and %s13, %s13, (32)0485; CHECK-NEXT: lea.sl %s13, (%s11, %s13)486; CHECK-NEXT: st %s1, (, %s13)487; CHECK-NEXT: st %s0, 8(, %s13)488; CHECK-NEXT: or %s0, 0, (0)1489; CHECK-NEXT: lea %s1, 2147483640490; CHECK-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1491; CHECK-NEXT: st %s2, 8(%s0, %s11)492; CHECK-NEXT: lea %s0, 8(, %s0)493; CHECK-NEXT: brne.l %s0, %s1, .LBB8_1494; CHECK-NEXT: # %bb.2:495; CHECK-NEXT: lea %s13, -2147483632496; CHECK-NEXT: and %s13, %s13, (32)0497; CHECK-NEXT: lea.sl %s11, (%s13, %s11)498; CHECK-NEXT: b.l.t (, %s10)499 %3 = alloca fp128, align 16500 %4 = alloca [268435455 x i64], align 8501 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)502 call void @llvm.lifetime.start.p0(i64 2147483640, ptr nonnull %4)503 store volatile fp128 %0, ptr %3, align 16, !tbaa !12504 br label %6505 5065: ; preds = %6507 call void @llvm.lifetime.end.p0(i64 2147483640, ptr nonnull %4)508 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)509 ret void510 5116: ; preds = %2, %6512 %7 = phi i64 [ 0, %2 ], [ %9, %6 ]513 %8 = getelementptr inbounds [268435455 x i64], ptr %4, i64 0, i64 %7514 store volatile i64 %1, ptr %8, align 8, !tbaa !3515 %9 = add nuw nsw i64 %7, 1516 %10 = icmp eq i64 %9, 268435455517 br i1 %10, label %5, label %6, !llvm.loop !14518}519 520; Function Attrs: argmemonly nofree nounwind521define x86_fastcallcc void @storequad_stk_big2(fp128 noundef %0, i64 noundef %1) {522; CHECK-LABEL: storequad_stk_big2:523; CHECK: # %bb.0:524; CHECK-NEXT: lea %s13, 2147483632525; CHECK-NEXT: and %s13, %s13, (32)0526; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)527; CHECK-NEXT: brge.l %s11, %s8, .LBB9_4528; CHECK-NEXT: # %bb.3:529; CHECK-NEXT: ld %s61, 24(, %s14)530; CHECK-NEXT: or %s62, 0, %s0531; CHECK-NEXT: lea %s63, 315532; CHECK-NEXT: shm.l %s63, (%s61)533; CHECK-NEXT: shm.l %s8, 8(%s61)534; CHECK-NEXT: shm.l %s11, 16(%s61)535; CHECK-NEXT: monc536; CHECK-NEXT: or %s0, 0, %s62537; CHECK-NEXT: .LBB9_4:538; CHECK-NEXT: lea %s13, -2147483648539; CHECK-NEXT: and %s13, %s13, (32)0540; CHECK-NEXT: lea.sl %s13, (%s11, %s13)541; CHECK-NEXT: st %s1, (, %s13)542; CHECK-NEXT: st %s0, 8(, %s13)543; CHECK-NEXT: or %s0, 0, (0)1544; CHECK-NEXT: lea %s1, -2147483648545; CHECK-NEXT: and %s1, %s1, (32)0546; CHECK-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1547; CHECK-NEXT: st %s2, (%s0, %s11)548; CHECK-NEXT: lea %s0, 8(, %s0)549; CHECK-NEXT: brne.l %s0, %s1, .LBB9_1550; CHECK-NEXT: # %bb.2:551; CHECK-NEXT: lea %s13, -2147483632552; CHECK-NEXT: and %s13, %s13, (32)0553; CHECK-NEXT: lea.sl %s11, (%s13, %s11)554; CHECK-NEXT: b.l.t (, %s10)555 %3 = alloca fp128, align 16556 %4 = alloca [268435456 x i64], align 8557 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)558 call void @llvm.lifetime.start.p0(i64 2147483648, ptr nonnull %4)559 store volatile fp128 %0, ptr %3, align 16, !tbaa !12560 br label %6561 5625: ; preds = %6563 call void @llvm.lifetime.end.p0(i64 2147483648, ptr nonnull %4)564 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)565 ret void566 5676: ; preds = %2, %6568 %7 = phi i64 [ 0, %2 ], [ %9, %6 ]569 %8 = getelementptr inbounds [268435456 x i64], ptr %4, i64 0, i64 %7570 store volatile i64 %1, ptr %8, align 8, !tbaa !3571 %9 = add nuw nsw i64 %7, 1572 %10 = icmp eq i64 %9, 268435456573 br i1 %10, label %5, label %6, !llvm.loop !15574}575 576; Function Attrs: argmemonly nofree nounwind577define x86_fastcallcc void @storequad_stk_dyn(fp128 noundef %0, i64 noundef %1) {578; CHECK-LABEL: storequad_stk_dyn:579; CHECK: # %bb.0:580; CHECK-NEXT: st %s9, (, %s11)581; CHECK-NEXT: st %s10, 8(, %s11)582; CHECK-NEXT: or %s9, 0, %s11583; CHECK-NEXT: lea %s11, -256(, %s11)584; CHECK-NEXT: brge.l.t %s11, %s8, .LBB10_2585; CHECK-NEXT: # %bb.1:586; CHECK-NEXT: ld %s61, 24(, %s14)587; CHECK-NEXT: or %s62, 0, %s0588; CHECK-NEXT: lea %s63, 315589; CHECK-NEXT: shm.l %s63, (%s61)590; CHECK-NEXT: shm.l %s8, 8(%s61)591; CHECK-NEXT: shm.l %s11, 16(%s61)592; CHECK-NEXT: monc593; CHECK-NEXT: or %s0, 0, %s62594; CHECK-NEXT: .LBB10_2:595; CHECK-NEXT: or %s4, 0, %s0596; CHECK-NEXT: or %s5, 0, %s1597; CHECK-NEXT: lea %s0, 15(, %s2)598; CHECK-NEXT: and %s0, -16, %s0599; CHECK-NEXT: lea %s1, __ve_grow_stack@lo600; CHECK-NEXT: and %s1, %s1, (32)0601; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)602; CHECK-NEXT: bsic %s10, (, %s12)603; CHECK-NEXT: lea %s0, 240(, %s11)604; CHECK-NEXT: st %s4, 8(, %s0)605; CHECK-NEXT: st %s5, (, %s0)606; CHECK-NEXT: st %s5, -16(, %s9)607; CHECK-NEXT: st %s4, -8(, %s9)608; CHECK-NEXT: or %s11, 0, %s9609; CHECK-NEXT: ld %s10, 8(, %s11)610; CHECK-NEXT: ld %s9, (, %s11)611; CHECK-NEXT: b.l.t (, %s10)612 %3 = alloca fp128, align 16613 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)614 %4 = alloca i8, i64 %1, align 16615 store volatile fp128 %0, ptr %4, align 16, !tbaa !12616 store volatile fp128 %0, ptr %3, align 16, !tbaa !12617 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)618 ret void619}620 621; Function Attrs: argmemonly nofree nounwind622define x86_fastcallcc void @storequad_stk_dyn_align(fp128 noundef %0, i64 noundef %1) {623; CHECK-LABEL: storequad_stk_dyn_align:624; CHECK: # %bb.0:625; CHECK-NEXT: st %s9, (, %s11)626; CHECK-NEXT: st %s10, 8(, %s11)627; CHECK-NEXT: st %s17, 40(, %s11)628; CHECK-NEXT: or %s9, 0, %s11629; CHECK-NEXT: lea %s11, -288(, %s11)630; CHECK-NEXT: and %s11, %s11, (59)1631; CHECK-NEXT: or %s17, 0, %s11632; CHECK-NEXT: brge.l.t %s11, %s8, .LBB11_2633; CHECK-NEXT: # %bb.1:634; CHECK-NEXT: ld %s61, 24(, %s14)635; CHECK-NEXT: or %s62, 0, %s0636; CHECK-NEXT: lea %s63, 315637; CHECK-NEXT: shm.l %s63, (%s61)638; CHECK-NEXT: shm.l %s8, 8(%s61)639; CHECK-NEXT: shm.l %s11, 16(%s61)640; CHECK-NEXT: monc641; CHECK-NEXT: or %s0, 0, %s62642; CHECK-NEXT: .LBB11_2:643; CHECK-NEXT: or %s4, 0, %s0644; CHECK-NEXT: or %s5, 0, %s1645; CHECK-NEXT: lea %s0, 15(, %s2)646; CHECK-NEXT: and %s0, -16, %s0647; CHECK-NEXT: lea %s1, __ve_grow_stack@lo648; CHECK-NEXT: and %s1, %s1, (32)0649; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)650; CHECK-NEXT: bsic %s10, (, %s12)651; CHECK-NEXT: lea %s0, 240(, %s11)652; CHECK-NEXT: st %s4, 8(, %s0)653; CHECK-NEXT: st %s5, (, %s0)654; CHECK-NEXT: st %s5, 256(, %s17)655; CHECK-NEXT: st %s4, 264(, %s17)656; CHECK-NEXT: or %s11, 0, %s9657; CHECK-NEXT: ld %s17, 40(, %s11)658; CHECK-NEXT: ld %s10, 8(, %s11)659; CHECK-NEXT: ld %s9, (, %s11)660; CHECK-NEXT: b.l.t (, %s10)661 %3 = alloca fp128, align 32662 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)663 %4 = alloca i8, i64 %1, align 16664 store volatile fp128 %0, ptr %4, align 16, !tbaa !12665 store volatile fp128 %0, ptr %3, align 32, !tbaa !16666 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)667 ret void668}669 670; Function Attrs: argmemonly nofree nounwind671define x86_fastcallcc void @storequad_stk_dyn_align2(fp128 noundef %0, i64 noundef %1) {672; CHECK-LABEL: storequad_stk_dyn_align2:673; CHECK: # %bb.0:674; CHECK-NEXT: st %s9, (, %s11)675; CHECK-NEXT: st %s10, 8(, %s11)676; CHECK-NEXT: st %s17, 40(, %s11)677; CHECK-NEXT: or %s9, 0, %s11678; CHECK-NEXT: lea %s11, -320(, %s11)679; CHECK-NEXT: and %s11, %s11, (58)1680; CHECK-NEXT: or %s17, 0, %s11681; CHECK-NEXT: brge.l.t %s11, %s8, .LBB12_2682; CHECK-NEXT: # %bb.1:683; CHECK-NEXT: ld %s61, 24(, %s14)684; CHECK-NEXT: or %s62, 0, %s0685; CHECK-NEXT: lea %s63, 315686; CHECK-NEXT: shm.l %s63, (%s61)687; CHECK-NEXT: shm.l %s8, 8(%s61)688; CHECK-NEXT: shm.l %s11, 16(%s61)689; CHECK-NEXT: monc690; CHECK-NEXT: or %s0, 0, %s62691; CHECK-NEXT: .LBB12_2:692; CHECK-NEXT: or %s4, 0, %s0693; CHECK-NEXT: or %s5, 0, %s1694; CHECK-NEXT: lea %s0, 15(, %s2)695; CHECK-NEXT: and %s0, -16, %s0696; CHECK-NEXT: lea %s1, __ve_grow_stack@lo697; CHECK-NEXT: and %s1, %s1, (32)0698; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)699; CHECK-NEXT: bsic %s10, (, %s12)700; CHECK-NEXT: lea %s0, 240(, %s11)701; CHECK-NEXT: st %s4, 8(, %s0)702; CHECK-NEXT: st %s5, (, %s0)703; CHECK-NEXT: st %s5, 288(, %s17)704; CHECK-NEXT: st %s4, 296(, %s17)705; CHECK-NEXT: st %s5, 256(, %s17)706; CHECK-NEXT: st %s4, 264(, %s17)707; CHECK-NEXT: or %s11, 0, %s9708; CHECK-NEXT: ld %s17, 40(, %s11)709; CHECK-NEXT: ld %s10, 8(, %s11)710; CHECK-NEXT: ld %s9, (, %s11)711; CHECK-NEXT: b.l.t (, %s10)712 %3 = alloca fp128, align 32713 %4 = alloca fp128, align 64714 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)715 %5 = alloca i8, i64 %1, align 16716 store volatile fp128 %0, ptr %5, align 16, !tbaa !12717 store volatile fp128 %0, ptr %3, align 32, !tbaa !16718 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4)719 store volatile fp128 %0, ptr %4, align 64, !tbaa !16720 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4)721 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)722 ret void723}724 725; Function Attrs: nounwind726define x86_fastcallcc void @storequad_stk_dyn_align_spill(fp128 noundef %0, i64 noundef %1) {727; CHECK-LABEL: storequad_stk_dyn_align_spill:728; CHECK: # %bb.0:729; CHECK-NEXT: st %s9, (, %s11)730; CHECK-NEXT: st %s10, 8(, %s11)731; CHECK-NEXT: st %s17, 40(, %s11)732; CHECK-NEXT: or %s9, 0, %s11733; CHECK-NEXT: lea %s11, -288(, %s11)734; CHECK-NEXT: and %s11, %s11, (59)1735; CHECK-NEXT: or %s17, 0, %s11736; CHECK-NEXT: brge.l.t %s11, %s8, .LBB13_2737; CHECK-NEXT: # %bb.1:738; CHECK-NEXT: ld %s61, 24(, %s14)739; CHECK-NEXT: or %s62, 0, %s0740; CHECK-NEXT: lea %s63, 315741; CHECK-NEXT: shm.l %s63, (%s61)742; CHECK-NEXT: shm.l %s8, 8(%s61)743; CHECK-NEXT: shm.l %s11, 16(%s61)744; CHECK-NEXT: monc745; CHECK-NEXT: or %s0, 0, %s62746; CHECK-NEXT: .LBB13_2:747; CHECK-NEXT: st %s18, 48(, %s9) # 8-byte Folded Spill748; CHECK-NEXT: st %s19, 56(, %s9) # 8-byte Folded Spill749; CHECK-NEXT: st %s20, 64(, %s9) # 8-byte Folded Spill750; CHECK-NEXT: st %s21, 72(, %s9) # 8-byte Folded Spill751; CHECK-NEXT: or %s18, 0, %s2752; CHECK-NEXT: or %s20, 0, %s0753; CHECK-NEXT: or %s21, 0, %s1754; CHECK-NEXT: lea %s0, 15(, %s2)755; CHECK-NEXT: and %s0, -16, %s0756; CHECK-NEXT: lea %s1, __ve_grow_stack@lo757; CHECK-NEXT: and %s1, %s1, (32)0758; CHECK-NEXT: lea.sl %s12, __ve_grow_stack@hi(, %s1)759; CHECK-NEXT: bsic %s10, (, %s12)760; CHECK-NEXT: lea %s19, 240(, %s11)761; CHECK-NEXT: lea %s0, dummy@lo762; CHECK-NEXT: and %s0, %s0, (32)0763; CHECK-NEXT: lea.sl %s12, dummy@hi(, %s0)764; CHECK-NEXT: bsic %s10, (, %s12)765; CHECK-NEXT: lea %s0, pass@lo766; CHECK-NEXT: and %s0, %s0, (32)0767; CHECK-NEXT: lea.sl %s12, pass@hi(, %s0)768; CHECK-NEXT: or %s0, 0, %s18769; CHECK-NEXT: bsic %s10, (, %s12)770; CHECK-NEXT: st %s20, 8(, %s19)771; CHECK-NEXT: st %s21, (, %s19)772; CHECK-NEXT: st %s21, 256(, %s17)773; CHECK-NEXT: st %s20, 264(, %s17)774; CHECK-NEXT: ld %s21, 72(, %s9) # 8-byte Folded Reload775; CHECK-NEXT: ld %s20, 64(, %s9) # 8-byte Folded Reload776; CHECK-NEXT: ld %s19, 56(, %s9) # 8-byte Folded Reload777; CHECK-NEXT: ld %s18, 48(, %s9) # 8-byte Folded Reload778; CHECK-NEXT: or %s11, 0, %s9779; CHECK-NEXT: ld %s17, 40(, %s11)780; CHECK-NEXT: ld %s10, 8(, %s11)781; CHECK-NEXT: ld %s9, (, %s11)782; CHECK-NEXT: b.l.t (, %s10)783 %3 = alloca fp128, align 32784 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3)785 %4 = alloca i8, i64 %1, align 16786 tail call void (...) @dummy()787 tail call void @pass(i64 noundef %1)788 store volatile fp128 %0, ptr %4, align 16, !tbaa !12789 store volatile fp128 %0, ptr %3, align 32, !tbaa !16790 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3)791 ret void792}793 794!3 = !{!4, !4, i64 0}795!4 = !{!"long", !5, i64 0}796!5 = !{!"omnipotent char", !6, i64 0}797!6 = !{!"Simple C/C++ TBAA"}798!7 = distinct !{!7, !8}799!8 = !{!"llvm.loop.mustprogress"}800!9 = distinct !{!9, !8}801!10 = !{!11, !4, i64 0}802!11 = !{!"", !4, i64 0}803!12 = !{!13, !13, i64 0}804!13 = !{!"long double", !5, i64 0}805!14 = distinct !{!14, !8}806!15 = distinct !{!15, !8}807!16 = !{!17, !13, i64 0}808!17 = !{!"", !13, i64 0}809