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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test and vm intrinsic instructions4;;;5;;; Note:6;;; We test ANDM*mm and ANDM*yy instructions.7 8; Function Attrs: nounwind readnone9define fastcc <256 x i1> @andm_mmm(<256 x i1> %0, <256 x i1> %1) {10; CHECK-LABEL: andm_mmm:11; CHECK: # %bb.0:12; CHECK-NEXT: andm %vm1, %vm1, %vm213; CHECK-NEXT: b.l.t (, %s10)14 %3 = tail call <256 x i1> @llvm.ve.vl.andm.mmm(<256 x i1> %0, <256 x i1> %1)15 ret <256 x i1> %316}17 18; Function Attrs: nounwind readnone19declare <256 x i1> @llvm.ve.vl.andm.mmm(<256 x i1>, <256 x i1>)20 21; Function Attrs: nounwind readnone22define fastcc <512 x i1> @andm_MMM(<512 x i1> %0, <512 x i1> %1) {23; CHECK-LABEL: andm_MMM:24; CHECK: # %bb.0:25; CHECK-NEXT: andm %vm2, %vm2, %vm426; CHECK-NEXT: andm %vm3, %vm3, %vm527; CHECK-NEXT: b.l.t (, %s10)28 %3 = tail call <512 x i1> @llvm.ve.vl.andm.MMM(<512 x i1> %0, <512 x i1> %1)29 ret <512 x i1> %330}31 32; Function Attrs: nounwind readnone33declare <512 x i1> @llvm.ve.vl.andm.MMM(<512 x i1>, <512 x i1>)34