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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test insert intrinsic instructions4;;;5;;; Note:6;;; We test insert_vm512u and insert_vm512l pseudo instructions.7 8; Function Attrs: nounwind readnone9define fastcc <512 x i1> @insert_vm512u(<512 x i1> %0, <256 x i1> %1) {10; CHECK-LABEL: insert_vm512u:11; CHECK: # %bb.0:12; CHECK-NEXT: andm %vm2, %vm0, %vm413; CHECK-NEXT: b.l.t (, %s10)14 %3 = tail call <512 x i1> @llvm.ve.vl.insert.vm512u(<512 x i1> %0, <256 x i1> %1)15 ret <512 x i1> %316}17 18; Function Attrs: nounwind readnone19declare <512 x i1> @llvm.ve.vl.insert.vm512u(<512 x i1>, <256 x i1>)20 21; Function Attrs: nounwind readnone22define fastcc <512 x i1> @insert_vm512l(<512 x i1> %0, <256 x i1> %1) {23; CHECK-LABEL: insert_vm512l:24; CHECK: # %bb.0:25; CHECK-NEXT: andm %vm3, %vm0, %vm426; CHECK-NEXT: b.l.t (, %s10)27 %3 = tail call <512 x i1> @llvm.ve.vl.insert.vm512l(<512 x i1> %0, <256 x i1> %1)28 ret <512 x i1> %329}30 31; Function Attrs: nounwind readnone32declare <512 x i1> @llvm.ve.vl.insert.vm512l(<512 x i1>, <256 x i1>)33