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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test pack intrinsic instructions4;;;5;;; Note:6;;; We test pack_f32p and pack_f32a pseudo instruction.7 8; Function Attrs: nounwind readonly9define fastcc i64 @pack_f32p(ptr readonly %0, ptr readonly %1) {10; CHECK-LABEL: pack_f32p:11; CHECK: # %bb.0:12; CHECK-NEXT: ldu %s0, (, %s0)13; CHECK-NEXT: ldl.zx %s1, (, %s1)14; CHECK-NEXT: or %s0, %s0, %s115; CHECK-NEXT: b.l.t (, %s10)16 %3 = tail call i64 @llvm.ve.vl.pack.f32p(ptr %0, ptr %1)17 ret i64 %318}19 20; Function Attrs: nounwind readonly21declare i64 @llvm.ve.vl.pack.f32p(ptr, ptr)22 23; Function Attrs: nounwind readonly24define fastcc i64 @pack_f32a(ptr readonly %0) {25; CHECK-LABEL: pack_f32a:26; CHECK: # %bb.0:27; CHECK-NEXT: ldl.zx %s0, (, %s0)28; CHECK-NEXT: lea %s1, 129; CHECK-NEXT: and %s1, %s1, (32)030; CHECK-NEXT: lea.sl %s1, 1(, %s1)31; CHECK-NEXT: mulu.l %s0, %s0, %s132; CHECK-NEXT: b.l.t (, %s10)33 %2 = tail call i64 @llvm.ve.vl.pack.f32a(ptr %0)34 ret i64 %235}36 37; Function Attrs: nounwind readonly38declare i64 @llvm.ve.vl.pack.f32a(ptr)39