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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector add intrinsic instructions4;;;5;;; Note:6;;; We test VADD*ivl, VADD*ivl_v, VADD*ivml_v, VADD*rvl, VADD*rvl_v,7;;; VADD*rvml_v, VADD*vvl, VADD*vvl_v, VADD*vvml_v PVADD*vvl, PVADD*vvl_v,8;;; PVADD*rvl, PVADD*rvl_v, PVADD*vvml_v, and PVADD*rvml_v instructions.9 10; Function Attrs: nounwind readnone11define fastcc <256 x double> @vaddsl_vsvl(i64 %0, <256 x double> %1) {12; CHECK-LABEL: vaddsl_vsvl:13; CHECK: # %bb.0:14; CHECK-NEXT: lea %s1, 25615; CHECK-NEXT: lvl %s116; CHECK-NEXT: vadds.l %v0, %s0, %v017; CHECK-NEXT: b.l.t (, %s10)18 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vsvl(i64 %0, <256 x double> %1, i32 256)19 ret <256 x double> %320}21 22; Function Attrs: nounwind readnone23declare <256 x double> @llvm.ve.vl.vaddsl.vsvl(i64, <256 x double>, i32)24 25; Function Attrs: nounwind readnone26define fastcc <256 x double> @vaddsl_vsvl_imm(<256 x double> %0) {27; CHECK-LABEL: vaddsl_vsvl_imm:28; CHECK: # %bb.0:29; CHECK-NEXT: lea %s0, 25630; CHECK-NEXT: lvl %s031; CHECK-NEXT: vadds.l %v0, 8, %v032; CHECK-NEXT: b.l.t (, %s10)33 %2 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vsvl(i64 8, <256 x double> %0, i32 256)34 ret <256 x double> %235}36 37; Function Attrs: nounwind readnone38define fastcc <256 x double> @vaddsl_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {39; CHECK-LABEL: vaddsl_vsvmvl:40; CHECK: # %bb.0:41; CHECK-NEXT: lea %s1, 12842; CHECK-NEXT: lvl %s143; CHECK-NEXT: vadds.l %v1, %s0, %v0, %vm144; CHECK-NEXT: lea %s16, 25645; CHECK-NEXT: lvl %s1646; CHECK-NEXT: vor %v0, (0)1, %v147; CHECK-NEXT: b.l.t (, %s10)48 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)49 ret <256 x double> %550}51 52; Function Attrs: nounwind readnone53declare <256 x double> @llvm.ve.vl.vaddsl.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)54 55; Function Attrs: nounwind readnone56define fastcc <256 x double> @vaddsl_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {57; CHECK-LABEL: vaddsl_vsvmvl_imm:58; CHECK: # %bb.0:59; CHECK-NEXT: lea %s0, 12860; CHECK-NEXT: lvl %s061; CHECK-NEXT: vadds.l %v1, 8, %v0, %vm162; CHECK-NEXT: lea %s16, 25663; CHECK-NEXT: lvl %s1664; CHECK-NEXT: vor %v0, (0)1, %v165; CHECK-NEXT: b.l.t (, %s10)66 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)67 ret <256 x double> %468}69 70; Function Attrs: nounwind readnone71define fastcc <256 x double> @vaddsl_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {72; CHECK-LABEL: vaddsl_vsvvl:73; CHECK: # %bb.0:74; CHECK-NEXT: lea %s1, 12875; CHECK-NEXT: lvl %s176; CHECK-NEXT: vadds.l %v1, %s0, %v077; CHECK-NEXT: lea %s16, 25678; CHECK-NEXT: lvl %s1679; CHECK-NEXT: vor %v0, (0)1, %v180; CHECK-NEXT: b.l.t (, %s10)81 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)82 ret <256 x double> %483}84 85; Function Attrs: nounwind readnone86declare <256 x double> @llvm.ve.vl.vaddsl.vsvvl(i64, <256 x double>, <256 x double>, i32)87 88; Function Attrs: nounwind readnone89define fastcc <256 x double> @vaddsl_vsvvl_imm(<256 x double> %0, <256 x double> %1) {90; CHECK-LABEL: vaddsl_vsvvl_imm:91; CHECK: # %bb.0:92; CHECK-NEXT: lea %s0, 12893; CHECK-NEXT: lvl %s094; CHECK-NEXT: vadds.l %v1, 8, %v095; CHECK-NEXT: lea %s16, 25696; CHECK-NEXT: lvl %s1697; CHECK-NEXT: vor %v0, (0)1, %v198; CHECK-NEXT: b.l.t (, %s10)99 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)100 ret <256 x double> %3101}102 103; Function Attrs: nounwind readnone104define fastcc <256 x double> @vaddsl_vvvl(<256 x double> %0, <256 x double> %1) {105; CHECK-LABEL: vaddsl_vvvl:106; CHECK: # %bb.0:107; CHECK-NEXT: lea %s0, 256108; CHECK-NEXT: lvl %s0109; CHECK-NEXT: vadds.l %v0, %v0, %v1110; CHECK-NEXT: b.l.t (, %s10)111 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vvvl(<256 x double> %0, <256 x double> %1, i32 256)112 ret <256 x double> %3113}114 115; Function Attrs: nounwind readnone116declare <256 x double> @llvm.ve.vl.vaddsl.vvvl(<256 x double>, <256 x double>, i32)117 118; Function Attrs: nounwind readnone119define fastcc <256 x double> @vaddsl_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {120; CHECK-LABEL: vaddsl_vvvmvl:121; CHECK: # %bb.0:122; CHECK-NEXT: lea %s0, 128123; CHECK-NEXT: lvl %s0124; CHECK-NEXT: vadds.l %v2, %v0, %v1, %vm1125; CHECK-NEXT: lea %s16, 256126; CHECK-NEXT: lvl %s16127; CHECK-NEXT: vor %v0, (0)1, %v2128; CHECK-NEXT: b.l.t (, %s10)129 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)130 ret <256 x double> %5131}132 133; Function Attrs: nounwind readnone134declare <256 x double> @llvm.ve.vl.vaddsl.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)135 136; Function Attrs: nounwind readnone137define fastcc <256 x double> @vaddsl_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {138; CHECK-LABEL: vaddsl_vvvvl:139; CHECK: # %bb.0:140; CHECK-NEXT: lea %s0, 128141; CHECK-NEXT: lvl %s0142; CHECK-NEXT: vadds.l %v2, %v0, %v1143; CHECK-NEXT: lea %s16, 256144; CHECK-NEXT: lvl %s16145; CHECK-NEXT: vor %v0, (0)1, %v2146; CHECK-NEXT: b.l.t (, %s10)147 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddsl.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)148 ret <256 x double> %4149}150 151; Function Attrs: nounwind readnone152declare <256 x double> @llvm.ve.vl.vaddsl.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)153 154; Function Attrs: nounwind readnone155define fastcc <256 x double> @vaddswsx_vsvl(i32 signext %0, <256 x double> %1) {156; CHECK-LABEL: vaddswsx_vsvl:157; CHECK: # %bb.0:158; CHECK-NEXT: and %s0, %s0, (32)0159; CHECK-NEXT: lea %s1, 256160; CHECK-NEXT: lvl %s1161; CHECK-NEXT: vadds.w.sx %v0, %s0, %v0162; CHECK-NEXT: b.l.t (, %s10)163 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vsvl(i32 %0, <256 x double> %1, i32 256)164 ret <256 x double> %3165}166 167; Function Attrs: nounwind readnone168declare <256 x double> @llvm.ve.vl.vaddswsx.vsvl(i32, <256 x double>, i32)169 170; Function Attrs: nounwind readnone171define fastcc <256 x double> @vaddswsx_vsvl_imm(<256 x double> %0) {172; CHECK-LABEL: vaddswsx_vsvl_imm:173; CHECK: # %bb.0:174; CHECK-NEXT: lea %s0, 256175; CHECK-NEXT: lvl %s0176; CHECK-NEXT: vadds.w.sx %v0, 8, %v0177; CHECK-NEXT: b.l.t (, %s10)178 %2 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vsvl(i32 8, <256 x double> %0, i32 256)179 ret <256 x double> %2180}181 182; Function Attrs: nounwind readnone183define fastcc <256 x double> @vaddswsx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {184; CHECK-LABEL: vaddswsx_vsvmvl:185; CHECK: # %bb.0:186; CHECK-NEXT: and %s0, %s0, (32)0187; CHECK-NEXT: lea %s1, 128188; CHECK-NEXT: lvl %s1189; CHECK-NEXT: vadds.w.sx %v1, %s0, %v0, %vm1190; CHECK-NEXT: lea %s16, 256191; CHECK-NEXT: lvl %s16192; CHECK-NEXT: vor %v0, (0)1, %v1193; CHECK-NEXT: b.l.t (, %s10)194 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)195 ret <256 x double> %5196}197 198; Function Attrs: nounwind readnone199declare <256 x double> @llvm.ve.vl.vaddswsx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)200 201; Function Attrs: nounwind readnone202define fastcc <256 x double> @vaddswsx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {203; CHECK-LABEL: vaddswsx_vsvmvl_imm:204; CHECK: # %bb.0:205; CHECK-NEXT: lea %s0, 128206; CHECK-NEXT: lvl %s0207; CHECK-NEXT: vadds.w.sx %v1, 8, %v0, %vm1208; CHECK-NEXT: lea %s16, 256209; CHECK-NEXT: lvl %s16210; CHECK-NEXT: vor %v0, (0)1, %v1211; CHECK-NEXT: b.l.t (, %s10)212 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)213 ret <256 x double> %4214}215 216; Function Attrs: nounwind readnone217define fastcc <256 x double> @vaddswsx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {218; CHECK-LABEL: vaddswsx_vsvvl:219; CHECK: # %bb.0:220; CHECK-NEXT: and %s0, %s0, (32)0221; CHECK-NEXT: lea %s1, 128222; CHECK-NEXT: lvl %s1223; CHECK-NEXT: vadds.w.sx %v1, %s0, %v0224; CHECK-NEXT: lea %s16, 256225; CHECK-NEXT: lvl %s16226; CHECK-NEXT: vor %v0, (0)1, %v1227; CHECK-NEXT: b.l.t (, %s10)228 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)229 ret <256 x double> %4230}231 232; Function Attrs: nounwind readnone233declare <256 x double> @llvm.ve.vl.vaddswsx.vsvvl(i32, <256 x double>, <256 x double>, i32)234 235; Function Attrs: nounwind readnone236define fastcc <256 x double> @vaddswsx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {237; CHECK-LABEL: vaddswsx_vsvvl_imm:238; CHECK: # %bb.0:239; CHECK-NEXT: lea %s0, 128240; CHECK-NEXT: lvl %s0241; CHECK-NEXT: vadds.w.sx %v1, 8, %v0242; CHECK-NEXT: lea %s16, 256243; CHECK-NEXT: lvl %s16244; CHECK-NEXT: vor %v0, (0)1, %v1245; CHECK-NEXT: b.l.t (, %s10)246 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)247 ret <256 x double> %3248}249 250; Function Attrs: nounwind readnone251define fastcc <256 x double> @vaddswsx_vvvl(<256 x double> %0, <256 x double> %1) {252; CHECK-LABEL: vaddswsx_vvvl:253; CHECK: # %bb.0:254; CHECK-NEXT: lea %s0, 256255; CHECK-NEXT: lvl %s0256; CHECK-NEXT: vadds.w.sx %v0, %v0, %v1257; CHECK-NEXT: b.l.t (, %s10)258 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)259 ret <256 x double> %3260}261 262; Function Attrs: nounwind readnone263declare <256 x double> @llvm.ve.vl.vaddswsx.vvvl(<256 x double>, <256 x double>, i32)264 265; Function Attrs: nounwind readnone266define fastcc <256 x double> @vaddswsx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {267; CHECK-LABEL: vaddswsx_vvvmvl:268; CHECK: # %bb.0:269; CHECK-NEXT: lea %s0, 128270; CHECK-NEXT: lvl %s0271; CHECK-NEXT: vadds.w.sx %v2, %v0, %v1, %vm1272; CHECK-NEXT: lea %s16, 256273; CHECK-NEXT: lvl %s16274; CHECK-NEXT: vor %v0, (0)1, %v2275; CHECK-NEXT: b.l.t (, %s10)276 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)277 ret <256 x double> %5278}279 280; Function Attrs: nounwind readnone281declare <256 x double> @llvm.ve.vl.vaddswsx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)282 283; Function Attrs: nounwind readnone284define fastcc <256 x double> @vaddswsx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {285; CHECK-LABEL: vaddswsx_vvvvl:286; CHECK: # %bb.0:287; CHECK-NEXT: lea %s0, 128288; CHECK-NEXT: lvl %s0289; CHECK-NEXT: vadds.w.sx %v2, %v0, %v1290; CHECK-NEXT: lea %s16, 256291; CHECK-NEXT: lvl %s16292; CHECK-NEXT: vor %v0, (0)1, %v2293; CHECK-NEXT: b.l.t (, %s10)294 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddswsx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)295 ret <256 x double> %4296}297 298; Function Attrs: nounwind readnone299declare <256 x double> @llvm.ve.vl.vaddswsx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)300 301; Function Attrs: nounwind readnone302define fastcc <256 x double> @vaddswzx_vsvl(i32 signext %0, <256 x double> %1) {303; CHECK-LABEL: vaddswzx_vsvl:304; CHECK: # %bb.0:305; CHECK-NEXT: and %s0, %s0, (32)0306; CHECK-NEXT: lea %s1, 256307; CHECK-NEXT: lvl %s1308; CHECK-NEXT: vadds.w.zx %v0, %s0, %v0309; CHECK-NEXT: b.l.t (, %s10)310 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vsvl(i32 %0, <256 x double> %1, i32 256)311 ret <256 x double> %3312}313 314; Function Attrs: nounwind readnone315declare <256 x double> @llvm.ve.vl.vaddswzx.vsvl(i32, <256 x double>, i32)316 317; Function Attrs: nounwind readnone318define fastcc <256 x double> @vaddswzx_vsvl_imm(<256 x double> %0) {319; CHECK-LABEL: vaddswzx_vsvl_imm:320; CHECK: # %bb.0:321; CHECK-NEXT: lea %s0, 256322; CHECK-NEXT: lvl %s0323; CHECK-NEXT: vadds.w.zx %v0, 8, %v0324; CHECK-NEXT: b.l.t (, %s10)325 %2 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vsvl(i32 8, <256 x double> %0, i32 256)326 ret <256 x double> %2327}328 329; Function Attrs: nounwind readnone330define fastcc <256 x double> @vaddswzx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {331; CHECK-LABEL: vaddswzx_vsvmvl:332; CHECK: # %bb.0:333; CHECK-NEXT: and %s0, %s0, (32)0334; CHECK-NEXT: lea %s1, 128335; CHECK-NEXT: lvl %s1336; CHECK-NEXT: vadds.w.zx %v1, %s0, %v0, %vm1337; CHECK-NEXT: lea %s16, 256338; CHECK-NEXT: lvl %s16339; CHECK-NEXT: vor %v0, (0)1, %v1340; CHECK-NEXT: b.l.t (, %s10)341 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)342 ret <256 x double> %5343}344 345; Function Attrs: nounwind readnone346declare <256 x double> @llvm.ve.vl.vaddswzx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)347 348; Function Attrs: nounwind readnone349define fastcc <256 x double> @vaddswzx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {350; CHECK-LABEL: vaddswzx_vsvmvl_imm:351; CHECK: # %bb.0:352; CHECK-NEXT: lea %s0, 128353; CHECK-NEXT: lvl %s0354; CHECK-NEXT: vadds.w.zx %v1, 8, %v0, %vm1355; CHECK-NEXT: lea %s16, 256356; CHECK-NEXT: lvl %s16357; CHECK-NEXT: vor %v0, (0)1, %v1358; CHECK-NEXT: b.l.t (, %s10)359 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)360 ret <256 x double> %4361}362 363; Function Attrs: nounwind readnone364define fastcc <256 x double> @vaddswzx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {365; CHECK-LABEL: vaddswzx_vsvvl:366; CHECK: # %bb.0:367; CHECK-NEXT: and %s0, %s0, (32)0368; CHECK-NEXT: lea %s1, 128369; CHECK-NEXT: lvl %s1370; CHECK-NEXT: vadds.w.zx %v1, %s0, %v0371; CHECK-NEXT: lea %s16, 256372; CHECK-NEXT: lvl %s16373; CHECK-NEXT: vor %v0, (0)1, %v1374; CHECK-NEXT: b.l.t (, %s10)375 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)376 ret <256 x double> %4377}378 379; Function Attrs: nounwind readnone380declare <256 x double> @llvm.ve.vl.vaddswzx.vsvvl(i32, <256 x double>, <256 x double>, i32)381 382; Function Attrs: nounwind readnone383define fastcc <256 x double> @vaddswzx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {384; CHECK-LABEL: vaddswzx_vsvvl_imm:385; CHECK: # %bb.0:386; CHECK-NEXT: lea %s0, 128387; CHECK-NEXT: lvl %s0388; CHECK-NEXT: vadds.w.zx %v1, 8, %v0389; CHECK-NEXT: lea %s16, 256390; CHECK-NEXT: lvl %s16391; CHECK-NEXT: vor %v0, (0)1, %v1392; CHECK-NEXT: b.l.t (, %s10)393 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)394 ret <256 x double> %3395}396 397; Function Attrs: nounwind readnone398define fastcc <256 x double> @vaddswzx_vvvl(<256 x double> %0, <256 x double> %1) {399; CHECK-LABEL: vaddswzx_vvvl:400; CHECK: # %bb.0:401; CHECK-NEXT: lea %s0, 256402; CHECK-NEXT: lvl %s0403; CHECK-NEXT: vadds.w.zx %v0, %v0, %v1404; CHECK-NEXT: b.l.t (, %s10)405 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)406 ret <256 x double> %3407}408 409; Function Attrs: nounwind readnone410declare <256 x double> @llvm.ve.vl.vaddswzx.vvvl(<256 x double>, <256 x double>, i32)411 412; Function Attrs: nounwind readnone413define fastcc <256 x double> @vaddswzx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {414; CHECK-LABEL: vaddswzx_vvvmvl:415; CHECK: # %bb.0:416; CHECK-NEXT: lea %s0, 128417; CHECK-NEXT: lvl %s0418; CHECK-NEXT: vadds.w.zx %v2, %v0, %v1, %vm1419; CHECK-NEXT: lea %s16, 256420; CHECK-NEXT: lvl %s16421; CHECK-NEXT: vor %v0, (0)1, %v2422; CHECK-NEXT: b.l.t (, %s10)423 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)424 ret <256 x double> %5425}426 427; Function Attrs: nounwind readnone428declare <256 x double> @llvm.ve.vl.vaddswzx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)429 430; Function Attrs: nounwind readnone431define fastcc <256 x double> @vaddswzx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {432; CHECK-LABEL: vaddswzx_vvvvl:433; CHECK: # %bb.0:434; CHECK-NEXT: lea %s0, 128435; CHECK-NEXT: lvl %s0436; CHECK-NEXT: vadds.w.zx %v2, %v0, %v1437; CHECK-NEXT: lea %s16, 256438; CHECK-NEXT: lvl %s16439; CHECK-NEXT: vor %v0, (0)1, %v2440; CHECK-NEXT: b.l.t (, %s10)441 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddswzx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)442 ret <256 x double> %4443}444 445; Function Attrs: nounwind readnone446declare <256 x double> @llvm.ve.vl.vaddswzx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)447 448; Function Attrs: nounwind readnone449define fastcc <256 x double> @vaddul_vsvl(i64 %0, <256 x double> %1) {450; CHECK-LABEL: vaddul_vsvl:451; CHECK: # %bb.0:452; CHECK-NEXT: lea %s1, 256453; CHECK-NEXT: lvl %s1454; CHECK-NEXT: vaddu.l %v0, %s0, %v0455; CHECK-NEXT: b.l.t (, %s10)456 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vsvl(i64 %0, <256 x double> %1, i32 256)457 ret <256 x double> %3458}459 460; Function Attrs: nounwind readnone461declare <256 x double> @llvm.ve.vl.vaddul.vsvl(i64, <256 x double>, i32)462 463; Function Attrs: nounwind readnone464define fastcc <256 x double> @vaddul_vsvl_imm(<256 x double> %0) {465; CHECK-LABEL: vaddul_vsvl_imm:466; CHECK: # %bb.0:467; CHECK-NEXT: lea %s0, 256468; CHECK-NEXT: lvl %s0469; CHECK-NEXT: vaddu.l %v0, 8, %v0470; CHECK-NEXT: b.l.t (, %s10)471 %2 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vsvl(i64 8, <256 x double> %0, i32 256)472 ret <256 x double> %2473}474 475; Function Attrs: nounwind readnone476define fastcc <256 x double> @vaddul_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {477; CHECK-LABEL: vaddul_vsvmvl:478; CHECK: # %bb.0:479; CHECK-NEXT: lea %s1, 128480; CHECK-NEXT: lvl %s1481; CHECK-NEXT: vaddu.l %v1, %s0, %v0, %vm1482; CHECK-NEXT: lea %s16, 256483; CHECK-NEXT: lvl %s16484; CHECK-NEXT: vor %v0, (0)1, %v1485; CHECK-NEXT: b.l.t (, %s10)486 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)487 ret <256 x double> %5488}489 490; Function Attrs: nounwind readnone491declare <256 x double> @llvm.ve.vl.vaddul.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)492 493; Function Attrs: nounwind readnone494define fastcc <256 x double> @vaddul_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {495; CHECK-LABEL: vaddul_vsvmvl_imm:496; CHECK: # %bb.0:497; CHECK-NEXT: lea %s0, 128498; CHECK-NEXT: lvl %s0499; CHECK-NEXT: vaddu.l %v1, 8, %v0, %vm1500; CHECK-NEXT: lea %s16, 256501; CHECK-NEXT: lvl %s16502; CHECK-NEXT: vor %v0, (0)1, %v1503; CHECK-NEXT: b.l.t (, %s10)504 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)505 ret <256 x double> %4506}507 508; Function Attrs: nounwind readnone509define fastcc <256 x double> @vaddul_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {510; CHECK-LABEL: vaddul_vsvvl:511; CHECK: # %bb.0:512; CHECK-NEXT: lea %s1, 128513; CHECK-NEXT: lvl %s1514; CHECK-NEXT: vaddu.l %v1, %s0, %v0515; CHECK-NEXT: lea %s16, 256516; CHECK-NEXT: lvl %s16517; CHECK-NEXT: vor %v0, (0)1, %v1518; CHECK-NEXT: b.l.t (, %s10)519 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)520 ret <256 x double> %4521}522 523; Function Attrs: nounwind readnone524declare <256 x double> @llvm.ve.vl.vaddul.vsvvl(i64, <256 x double>, <256 x double>, i32)525 526; Function Attrs: nounwind readnone527define fastcc <256 x double> @vaddul_vsvvl_imm(<256 x double> %0, <256 x double> %1) {528; CHECK-LABEL: vaddul_vsvvl_imm:529; CHECK: # %bb.0:530; CHECK-NEXT: lea %s0, 128531; CHECK-NEXT: lvl %s0532; CHECK-NEXT: vaddu.l %v1, 8, %v0533; CHECK-NEXT: lea %s16, 256534; CHECK-NEXT: lvl %s16535; CHECK-NEXT: vor %v0, (0)1, %v1536; CHECK-NEXT: b.l.t (, %s10)537 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)538 ret <256 x double> %3539}540 541; Function Attrs: nounwind readnone542define fastcc <256 x double> @vaddul_vvvl(<256 x double> %0, <256 x double> %1) {543; CHECK-LABEL: vaddul_vvvl:544; CHECK: # %bb.0:545; CHECK-NEXT: lea %s0, 256546; CHECK-NEXT: lvl %s0547; CHECK-NEXT: vaddu.l %v0, %v0, %v1548; CHECK-NEXT: b.l.t (, %s10)549 %3 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vvvl(<256 x double> %0, <256 x double> %1, i32 256)550 ret <256 x double> %3551}552 553; Function Attrs: nounwind readnone554declare <256 x double> @llvm.ve.vl.vaddul.vvvl(<256 x double>, <256 x double>, i32)555 556; Function Attrs: nounwind readnone557define fastcc <256 x double> @vaddul_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {558; CHECK-LABEL: vaddul_vvvmvl:559; CHECK: # %bb.0:560; CHECK-NEXT: lea %s0, 128561; CHECK-NEXT: lvl %s0562; CHECK-NEXT: vaddu.l %v2, %v0, %v1, %vm1563; CHECK-NEXT: lea %s16, 256564; CHECK-NEXT: lvl %s16565; CHECK-NEXT: vor %v0, (0)1, %v2566; CHECK-NEXT: b.l.t (, %s10)567 %5 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)568 ret <256 x double> %5569}570 571; Function Attrs: nounwind readnone572declare <256 x double> @llvm.ve.vl.vaddul.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)573 574; Function Attrs: nounwind readnone575define fastcc <256 x double> @vaddul_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {576; CHECK-LABEL: vaddul_vvvvl:577; CHECK: # %bb.0:578; CHECK-NEXT: lea %s0, 128579; CHECK-NEXT: lvl %s0580; CHECK-NEXT: vaddu.l %v2, %v0, %v1581; CHECK-NEXT: lea %s16, 256582; CHECK-NEXT: lvl %s16583; CHECK-NEXT: vor %v0, (0)1, %v2584; CHECK-NEXT: b.l.t (, %s10)585 %4 = tail call fast <256 x double> @llvm.ve.vl.vaddul.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)586 ret <256 x double> %4587}588 589; Function Attrs: nounwind readnone590declare <256 x double> @llvm.ve.vl.vaddul.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)591 592; Function Attrs: nounwind readnone593define fastcc <256 x double> @vadduw_vsvl(i32 signext %0, <256 x double> %1) {594; CHECK-LABEL: vadduw_vsvl:595; CHECK: # %bb.0:596; CHECK-NEXT: and %s0, %s0, (32)0597; CHECK-NEXT: lea %s1, 256598; CHECK-NEXT: lvl %s1599; CHECK-NEXT: vaddu.w %v0, %s0, %v0600; CHECK-NEXT: b.l.t (, %s10)601 %3 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vsvl(i32 %0, <256 x double> %1, i32 256)602 ret <256 x double> %3603}604 605; Function Attrs: nounwind readnone606declare <256 x double> @llvm.ve.vl.vadduw.vsvl(i32, <256 x double>, i32)607 608; Function Attrs: nounwind readnone609define fastcc <256 x double> @vadduw_vsvl_imm(<256 x double> %0) {610; CHECK-LABEL: vadduw_vsvl_imm:611; CHECK: # %bb.0:612; CHECK-NEXT: lea %s0, 256613; CHECK-NEXT: lvl %s0614; CHECK-NEXT: vaddu.w %v0, 8, %v0615; CHECK-NEXT: b.l.t (, %s10)616 %2 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vsvl(i32 8, <256 x double> %0, i32 256)617 ret <256 x double> %2618}619 620; Function Attrs: nounwind readnone621define fastcc <256 x double> @vadduw_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {622; CHECK-LABEL: vadduw_vsvmvl:623; CHECK: # %bb.0:624; CHECK-NEXT: and %s0, %s0, (32)0625; CHECK-NEXT: lea %s1, 128626; CHECK-NEXT: lvl %s1627; CHECK-NEXT: vaddu.w %v1, %s0, %v0, %vm1628; CHECK-NEXT: lea %s16, 256629; CHECK-NEXT: lvl %s16630; CHECK-NEXT: vor %v0, (0)1, %v1631; CHECK-NEXT: b.l.t (, %s10)632 %5 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)633 ret <256 x double> %5634}635 636; Function Attrs: nounwind readnone637declare <256 x double> @llvm.ve.vl.vadduw.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)638 639; Function Attrs: nounwind readnone640define fastcc <256 x double> @vadduw_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {641; CHECK-LABEL: vadduw_vsvmvl_imm:642; CHECK: # %bb.0:643; CHECK-NEXT: lea %s0, 128644; CHECK-NEXT: lvl %s0645; CHECK-NEXT: vaddu.w %v1, 8, %v0, %vm1646; CHECK-NEXT: lea %s16, 256647; CHECK-NEXT: lvl %s16648; CHECK-NEXT: vor %v0, (0)1, %v1649; CHECK-NEXT: b.l.t (, %s10)650 %4 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)651 ret <256 x double> %4652}653 654; Function Attrs: nounwind readnone655define fastcc <256 x double> @vadduw_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {656; CHECK-LABEL: vadduw_vsvvl:657; CHECK: # %bb.0:658; CHECK-NEXT: and %s0, %s0, (32)0659; CHECK-NEXT: lea %s1, 128660; CHECK-NEXT: lvl %s1661; CHECK-NEXT: vaddu.w %v1, %s0, %v0662; CHECK-NEXT: lea %s16, 256663; CHECK-NEXT: lvl %s16664; CHECK-NEXT: vor %v0, (0)1, %v1665; CHECK-NEXT: b.l.t (, %s10)666 %4 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)667 ret <256 x double> %4668}669 670; Function Attrs: nounwind readnone671declare <256 x double> @llvm.ve.vl.vadduw.vsvvl(i32, <256 x double>, <256 x double>, i32)672 673; Function Attrs: nounwind readnone674define fastcc <256 x double> @vadduw_vsvvl_imm(<256 x double> %0, <256 x double> %1) {675; CHECK-LABEL: vadduw_vsvvl_imm:676; CHECK: # %bb.0:677; CHECK-NEXT: lea %s0, 128678; CHECK-NEXT: lvl %s0679; CHECK-NEXT: vaddu.w %v1, 8, %v0680; CHECK-NEXT: lea %s16, 256681; CHECK-NEXT: lvl %s16682; CHECK-NEXT: vor %v0, (0)1, %v1683; CHECK-NEXT: b.l.t (, %s10)684 %3 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)685 ret <256 x double> %3686}687 688; Function Attrs: nounwind readnone689define fastcc <256 x double> @vadduw_vvvl(<256 x double> %0, <256 x double> %1) {690; CHECK-LABEL: vadduw_vvvl:691; CHECK: # %bb.0:692; CHECK-NEXT: lea %s0, 256693; CHECK-NEXT: lvl %s0694; CHECK-NEXT: vaddu.w %v0, %v0, %v1695; CHECK-NEXT: b.l.t (, %s10)696 %3 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vvvl(<256 x double> %0, <256 x double> %1, i32 256)697 ret <256 x double> %3698}699 700; Function Attrs: nounwind readnone701declare <256 x double> @llvm.ve.vl.vadduw.vvvl(<256 x double>, <256 x double>, i32)702 703; Function Attrs: nounwind readnone704define fastcc <256 x double> @vadduw_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {705; CHECK-LABEL: vadduw_vvvmvl:706; CHECK: # %bb.0:707; CHECK-NEXT: lea %s0, 128708; CHECK-NEXT: lvl %s0709; CHECK-NEXT: vaddu.w %v2, %v0, %v1, %vm1710; CHECK-NEXT: lea %s16, 256711; CHECK-NEXT: lvl %s16712; CHECK-NEXT: vor %v0, (0)1, %v2713; CHECK-NEXT: b.l.t (, %s10)714 %5 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)715 ret <256 x double> %5716}717 718; Function Attrs: nounwind readnone719declare <256 x double> @llvm.ve.vl.vadduw.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)720 721; Function Attrs: nounwind readnone722define fastcc <256 x double> @vadduw_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {723; CHECK-LABEL: vadduw_vvvvl:724; CHECK: # %bb.0:725; CHECK-NEXT: lea %s0, 128726; CHECK-NEXT: lvl %s0727; CHECK-NEXT: vaddu.w %v2, %v0, %v1728; CHECK-NEXT: lea %s16, 256729; CHECK-NEXT: lvl %s16730; CHECK-NEXT: vor %v0, (0)1, %v2731; CHECK-NEXT: b.l.t (, %s10)732 %4 = tail call fast <256 x double> @llvm.ve.vl.vadduw.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)733 ret <256 x double> %4734}735 736; Function Attrs: nounwind readnone737declare <256 x double> @llvm.ve.vl.vadduw.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)738 739; Function Attrs: nounwind readnone740define fastcc <256 x double> @pvaddu_vvvl(<256 x double> %0, <256 x double> %1) {741; CHECK-LABEL: pvaddu_vvvl:742; CHECK: # %bb.0:743; CHECK-NEXT: lea %s0, 256744; CHECK-NEXT: lvl %s0745; CHECK-NEXT: pvaddu %v0, %v0, %v1746; CHECK-NEXT: b.l.t (, %s10)747 %3 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vvvl(<256 x double> %0, <256 x double> %1, i32 256)748 ret <256 x double> %3749}750 751; Function Attrs: nounwind readnone752declare <256 x double> @llvm.ve.vl.pvaddu.vvvl(<256 x double>, <256 x double>, i32)753 754; Function Attrs: nounwind readnone755define fastcc <256 x double> @pvaddu_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {756; CHECK-LABEL: pvaddu_vvvvl:757; CHECK: # %bb.0:758; CHECK-NEXT: lea %s0, 128759; CHECK-NEXT: lvl %s0760; CHECK-NEXT: pvaddu %v2, %v0, %v1761; CHECK-NEXT: lea %s16, 256762; CHECK-NEXT: lvl %s16763; CHECK-NEXT: vor %v0, (0)1, %v2764; CHECK-NEXT: b.l.t (, %s10)765 %4 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)766 ret <256 x double> %4767}768 769; Function Attrs: nounwind readnone770declare <256 x double> @llvm.ve.vl.pvaddu.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)771 772; Function Attrs: nounwind readnone773define fastcc <256 x double> @pvaddu_vsvl(i64 %0, <256 x double> %1) {774; CHECK-LABEL: pvaddu_vsvl:775; CHECK: # %bb.0:776; CHECK-NEXT: lea %s1, 256777; CHECK-NEXT: lvl %s1778; CHECK-NEXT: pvaddu %v0, %s0, %v0779; CHECK-NEXT: b.l.t (, %s10)780 %3 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vsvl(i64 %0, <256 x double> %1, i32 256)781 ret <256 x double> %3782}783 784; Function Attrs: nounwind readnone785declare <256 x double> @llvm.ve.vl.pvaddu.vsvl(i64, <256 x double>, i32)786 787; Function Attrs: nounwind readnone788define fastcc <256 x double> @pvaddu_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {789; CHECK-LABEL: pvaddu_vsvvl:790; CHECK: # %bb.0:791; CHECK-NEXT: lea %s1, 128792; CHECK-NEXT: lvl %s1793; CHECK-NEXT: pvaddu %v1, %s0, %v0794; CHECK-NEXT: lea %s16, 256795; CHECK-NEXT: lvl %s16796; CHECK-NEXT: vor %v0, (0)1, %v1797; CHECK-NEXT: b.l.t (, %s10)798 %4 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)799 ret <256 x double> %4800}801 802; Function Attrs: nounwind readnone803declare <256 x double> @llvm.ve.vl.pvaddu.vsvvl(i64, <256 x double>, <256 x double>, i32)804 805; Function Attrs: nounwind readnone806define fastcc <256 x double> @pvaddu_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {807; CHECK-LABEL: pvaddu_vvvMvl:808; CHECK: # %bb.0:809; CHECK-NEXT: lea %s0, 128810; CHECK-NEXT: lvl %s0811; CHECK-NEXT: pvaddu %v2, %v0, %v1, %vm2812; CHECK-NEXT: lea %s16, 256813; CHECK-NEXT: lvl %s16814; CHECK-NEXT: vor %v0, (0)1, %v2815; CHECK-NEXT: b.l.t (, %s10)816 %5 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)817 ret <256 x double> %5818}819 820; Function Attrs: nounwind readnone821declare <256 x double> @llvm.ve.vl.pvaddu.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)822 823; Function Attrs: nounwind readnone824define fastcc <256 x double> @pvaddu_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {825; CHECK-LABEL: pvaddu_vsvMvl:826; CHECK: # %bb.0:827; CHECK-NEXT: lea %s1, 128828; CHECK-NEXT: lvl %s1829; CHECK-NEXT: pvaddu %v1, %s0, %v0, %vm2830; CHECK-NEXT: lea %s16, 256831; CHECK-NEXT: lvl %s16832; CHECK-NEXT: vor %v0, (0)1, %v1833; CHECK-NEXT: b.l.t (, %s10)834 %5 = tail call fast <256 x double> @llvm.ve.vl.pvaddu.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)835 ret <256 x double> %5836}837 838; Function Attrs: nounwind readnone839declare <256 x double> @llvm.ve.vl.pvaddu.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)840 841; Function Attrs: nounwind readnone842define fastcc <256 x double> @pvadds_vvvl(<256 x double> %0, <256 x double> %1) {843; CHECK-LABEL: pvadds_vvvl:844; CHECK: # %bb.0:845; CHECK-NEXT: lea %s0, 256846; CHECK-NEXT: lvl %s0847; CHECK-NEXT: pvadds %v0, %v0, %v1848; CHECK-NEXT: b.l.t (, %s10)849 %3 = tail call fast <256 x double> @llvm.ve.vl.pvadds.vvvl(<256 x double> %0, <256 x double> %1, i32 256)850 ret <256 x double> %3851}852 853; Function Attrs: nounwind readnone854declare <256 x double> @llvm.ve.vl.pvadds.vvvl(<256 x double>, <256 x double>, i32)855 856; Function Attrs: nounwind readnone857define fastcc <256 x double> @pvadds_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {858; CHECK-LABEL: pvadds_vvvvl:859; CHECK: # %bb.0:860; CHECK-NEXT: lea %s0, 128861; CHECK-NEXT: lvl %s0862; CHECK-NEXT: pvadds %v2, %v0, %v1863; CHECK-NEXT: lea %s16, 256864; CHECK-NEXT: lvl %s16865; CHECK-NEXT: vor %v0, (0)1, %v2866; CHECK-NEXT: b.l.t (, %s10)867 %4 = tail call fast <256 x double> @llvm.ve.vl.pvadds.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)868 ret <256 x double> %4869}870 871; Function Attrs: nounwind readnone872declare <256 x double> @llvm.ve.vl.pvadds.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)873 874; Function Attrs: nounwind readnone875define fastcc <256 x double> @pvadds_vsvl(i64 %0, <256 x double> %1) {876; CHECK-LABEL: pvadds_vsvl:877; CHECK: # %bb.0:878; CHECK-NEXT: lea %s1, 256879; CHECK-NEXT: lvl %s1880; CHECK-NEXT: pvadds %v0, %s0, %v0881; CHECK-NEXT: b.l.t (, %s10)882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvadds.vsvl(i64 %0, <256 x double> %1, i32 256)883 ret <256 x double> %3884}885 886; Function Attrs: nounwind readnone887declare <256 x double> @llvm.ve.vl.pvadds.vsvl(i64, <256 x double>, i32)888 889; Function Attrs: nounwind readnone890define fastcc <256 x double> @pvadds_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {891; CHECK-LABEL: pvadds_vsvvl:892; CHECK: # %bb.0:893; CHECK-NEXT: lea %s1, 128894; CHECK-NEXT: lvl %s1895; CHECK-NEXT: pvadds %v1, %s0, %v0896; CHECK-NEXT: lea %s16, 256897; CHECK-NEXT: lvl %s16898; CHECK-NEXT: vor %v0, (0)1, %v1899; CHECK-NEXT: b.l.t (, %s10)900 %4 = tail call fast <256 x double> @llvm.ve.vl.pvadds.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)901 ret <256 x double> %4902}903 904; Function Attrs: nounwind readnone905declare <256 x double> @llvm.ve.vl.pvadds.vsvvl(i64, <256 x double>, <256 x double>, i32)906 907; Function Attrs: nounwind readnone908define fastcc <256 x double> @pvadds_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {909; CHECK-LABEL: pvadds_vvvMvl:910; CHECK: # %bb.0:911; CHECK-NEXT: lea %s0, 128912; CHECK-NEXT: lvl %s0913; CHECK-NEXT: pvadds %v2, %v0, %v1, %vm2914; CHECK-NEXT: lea %s16, 256915; CHECK-NEXT: lvl %s16916; CHECK-NEXT: vor %v0, (0)1, %v2917; CHECK-NEXT: b.l.t (, %s10)918 %5 = tail call fast <256 x double> @llvm.ve.vl.pvadds.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)919 ret <256 x double> %5920}921 922; Function Attrs: nounwind readnone923declare <256 x double> @llvm.ve.vl.pvadds.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)924 925; Function Attrs: nounwind readnone926define fastcc <256 x double> @pvadds_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {927; CHECK-LABEL: pvadds_vsvMvl:928; CHECK: # %bb.0:929; CHECK-NEXT: lea %s1, 128930; CHECK-NEXT: lvl %s1931; CHECK-NEXT: pvadds %v1, %s0, %v0, %vm2932; CHECK-NEXT: lea %s16, 256933; CHECK-NEXT: lvl %s16934; CHECK-NEXT: vor %v0, (0)1, %v1935; CHECK-NEXT: b.l.t (, %s10)936 %5 = tail call fast <256 x double> @llvm.ve.vl.pvadds.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)937 ret <256 x double> %5938}939 940; Function Attrs: nounwind readnone941declare <256 x double> @llvm.ve.vl.pvadds.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)942