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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector compare intrinsic instructions4;;;5;;; Note:6;;; We test VCMP*vvl, VCMP*vvl_v, VCMP*rvl, VCMP*rvl_v, VCMP*ivl, VCMP*ivl_v,7;;; VCMP*vvml_v, VCMP*rvml_v, VCMP*ivml_v, PVCMP*vvl, PVCMP*vvl_v, PVCMP*rvl,8;;; PVCMP*rvl_v, PVCMP*vvml_v, and PVCMP*rvml_v instructions.9 10; Function Attrs: nounwind readnone11define fastcc <256 x double> @vcmpul_vvvl(<256 x double> %0, <256 x double> %1) {12; CHECK-LABEL: vcmpul_vvvl:13; CHECK: # %bb.0:14; CHECK-NEXT: lea %s0, 25615; CHECK-NEXT: lvl %s016; CHECK-NEXT: vcmpu.l %v0, %v0, %v117; CHECK-NEXT: b.l.t (, %s10)18 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vvvl(<256 x double> %0, <256 x double> %1, i32 256)19 ret <256 x double> %320}21 22; Function Attrs: nounwind readnone23declare <256 x double> @llvm.ve.vl.vcmpul.vvvl(<256 x double>, <256 x double>, i32)24 25; Function Attrs: nounwind readnone26define fastcc <256 x double> @vcmpul_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {27; CHECK-LABEL: vcmpul_vvvvl:28; CHECK: # %bb.0:29; CHECK-NEXT: lea %s0, 12830; CHECK-NEXT: lvl %s031; CHECK-NEXT: vcmpu.l %v2, %v0, %v132; CHECK-NEXT: lea %s16, 25633; CHECK-NEXT: lvl %s1634; CHECK-NEXT: vor %v0, (0)1, %v235; CHECK-NEXT: b.l.t (, %s10)36 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)37 ret <256 x double> %438}39 40; Function Attrs: nounwind readnone41declare <256 x double> @llvm.ve.vl.vcmpul.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)42 43; Function Attrs: nounwind readnone44define fastcc <256 x double> @vcmpul_vsvl(i64 %0, <256 x double> %1) {45; CHECK-LABEL: vcmpul_vsvl:46; CHECK: # %bb.0:47; CHECK-NEXT: lea %s1, 25648; CHECK-NEXT: lvl %s149; CHECK-NEXT: vcmpu.l %v0, %s0, %v050; CHECK-NEXT: b.l.t (, %s10)51 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vsvl(i64 %0, <256 x double> %1, i32 256)52 ret <256 x double> %353}54 55; Function Attrs: nounwind readnone56declare <256 x double> @llvm.ve.vl.vcmpul.vsvl(i64, <256 x double>, i32)57 58; Function Attrs: nounwind readnone59define fastcc <256 x double> @vcmpul_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {60; CHECK-LABEL: vcmpul_vsvvl:61; CHECK: # %bb.0:62; CHECK-NEXT: lea %s1, 12863; CHECK-NEXT: lvl %s164; CHECK-NEXT: vcmpu.l %v1, %s0, %v065; CHECK-NEXT: lea %s16, 25666; CHECK-NEXT: lvl %s1667; CHECK-NEXT: vor %v0, (0)1, %v168; CHECK-NEXT: b.l.t (, %s10)69 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)70 ret <256 x double> %471}72 73; Function Attrs: nounwind readnone74declare <256 x double> @llvm.ve.vl.vcmpul.vsvvl(i64, <256 x double>, <256 x double>, i32)75 76; Function Attrs: nounwind readnone77define fastcc <256 x double> @vcmpul_vsvl_imm(<256 x double> %0) {78; CHECK-LABEL: vcmpul_vsvl_imm:79; CHECK: # %bb.0:80; CHECK-NEXT: lea %s0, 25681; CHECK-NEXT: lvl %s082; CHECK-NEXT: vcmpu.l %v0, 8, %v083; CHECK-NEXT: b.l.t (, %s10)84 %2 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vsvl(i64 8, <256 x double> %0, i32 256)85 ret <256 x double> %286}87 88; Function Attrs: nounwind readnone89define fastcc <256 x double> @vcmpul_vsvvl_imm(<256 x double> %0, <256 x double> %1) {90; CHECK-LABEL: vcmpul_vsvvl_imm:91; CHECK: # %bb.0:92; CHECK-NEXT: lea %s0, 12893; CHECK-NEXT: lvl %s094; CHECK-NEXT: vcmpu.l %v1, 8, %v095; CHECK-NEXT: lea %s16, 25696; CHECK-NEXT: lvl %s1697; CHECK-NEXT: vor %v0, (0)1, %v198; CHECK-NEXT: b.l.t (, %s10)99 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)100 ret <256 x double> %3101}102 103; Function Attrs: nounwind readnone104define fastcc <256 x double> @vcmpul_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {105; CHECK-LABEL: vcmpul_vvvmvl:106; CHECK: # %bb.0:107; CHECK-NEXT: lea %s0, 128108; CHECK-NEXT: lvl %s0109; CHECK-NEXT: vcmpu.l %v2, %v0, %v1, %vm1110; CHECK-NEXT: lea %s16, 256111; CHECK-NEXT: lvl %s16112; CHECK-NEXT: vor %v0, (0)1, %v2113; CHECK-NEXT: b.l.t (, %s10)114 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)115 ret <256 x double> %5116}117 118; Function Attrs: nounwind readnone119declare <256 x double> @llvm.ve.vl.vcmpul.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)120 121; Function Attrs: nounwind readnone122define fastcc <256 x double> @vcmpul_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {123; CHECK-LABEL: vcmpul_vsvmvl:124; CHECK: # %bb.0:125; CHECK-NEXT: lea %s1, 128126; CHECK-NEXT: lvl %s1127; CHECK-NEXT: vcmpu.l %v1, %s0, %v0, %vm1128; CHECK-NEXT: lea %s16, 256129; CHECK-NEXT: lvl %s16130; CHECK-NEXT: vor %v0, (0)1, %v1131; CHECK-NEXT: b.l.t (, %s10)132 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)133 ret <256 x double> %5134}135 136; Function Attrs: nounwind readnone137declare <256 x double> @llvm.ve.vl.vcmpul.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)138 139; Function Attrs: nounwind readnone140define fastcc <256 x double> @vcmpul_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {141; CHECK-LABEL: vcmpul_vsvmvl_imm:142; CHECK: # %bb.0:143; CHECK-NEXT: lea %s0, 128144; CHECK-NEXT: lvl %s0145; CHECK-NEXT: vcmpu.l %v1, 8, %v0, %vm1146; CHECK-NEXT: lea %s16, 256147; CHECK-NEXT: lvl %s16148; CHECK-NEXT: vor %v0, (0)1, %v1149; CHECK-NEXT: b.l.t (, %s10)150 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpul.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)151 ret <256 x double> %4152}153 154; Function Attrs: nounwind readnone155define fastcc <256 x double> @vcmpuw_vvvl(<256 x double> %0, <256 x double> %1) {156; CHECK-LABEL: vcmpuw_vvvl:157; CHECK: # %bb.0:158; CHECK-NEXT: lea %s0, 256159; CHECK-NEXT: lvl %s0160; CHECK-NEXT: vcmpu.w %v0, %v0, %v1161; CHECK-NEXT: b.l.t (, %s10)162 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vvvl(<256 x double> %0, <256 x double> %1, i32 256)163 ret <256 x double> %3164}165 166; Function Attrs: nounwind readnone167declare <256 x double> @llvm.ve.vl.vcmpuw.vvvl(<256 x double>, <256 x double>, i32)168 169; Function Attrs: nounwind readnone170define fastcc <256 x double> @vcmpuw_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {171; CHECK-LABEL: vcmpuw_vvvvl:172; CHECK: # %bb.0:173; CHECK-NEXT: lea %s0, 128174; CHECK-NEXT: lvl %s0175; CHECK-NEXT: vcmpu.w %v2, %v0, %v1176; CHECK-NEXT: lea %s16, 256177; CHECK-NEXT: lvl %s16178; CHECK-NEXT: vor %v0, (0)1, %v2179; CHECK-NEXT: b.l.t (, %s10)180 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)181 ret <256 x double> %4182}183 184; Function Attrs: nounwind readnone185declare <256 x double> @llvm.ve.vl.vcmpuw.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)186 187; Function Attrs: nounwind readnone188define fastcc <256 x double> @vcmpuw_vsvl(i32 signext %0, <256 x double> %1) {189; CHECK-LABEL: vcmpuw_vsvl:190; CHECK: # %bb.0:191; CHECK-NEXT: and %s0, %s0, (32)0192; CHECK-NEXT: lea %s1, 256193; CHECK-NEXT: lvl %s1194; CHECK-NEXT: vcmpu.w %v0, %s0, %v0195; CHECK-NEXT: b.l.t (, %s10)196 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vsvl(i32 %0, <256 x double> %1, i32 256)197 ret <256 x double> %3198}199 200; Function Attrs: nounwind readnone201declare <256 x double> @llvm.ve.vl.vcmpuw.vsvl(i32, <256 x double>, i32)202 203; Function Attrs: nounwind readnone204define fastcc <256 x double> @vcmpuw_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {205; CHECK-LABEL: vcmpuw_vsvvl:206; CHECK: # %bb.0:207; CHECK-NEXT: and %s0, %s0, (32)0208; CHECK-NEXT: lea %s1, 128209; CHECK-NEXT: lvl %s1210; CHECK-NEXT: vcmpu.w %v1, %s0, %v0211; CHECK-NEXT: lea %s16, 256212; CHECK-NEXT: lvl %s16213; CHECK-NEXT: vor %v0, (0)1, %v1214; CHECK-NEXT: b.l.t (, %s10)215 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)216 ret <256 x double> %4217}218 219; Function Attrs: nounwind readnone220declare <256 x double> @llvm.ve.vl.vcmpuw.vsvvl(i32, <256 x double>, <256 x double>, i32)221 222; Function Attrs: nounwind readnone223define fastcc <256 x double> @vcmpuw_vsvl_imm(<256 x double> %0) {224; CHECK-LABEL: vcmpuw_vsvl_imm:225; CHECK: # %bb.0:226; CHECK-NEXT: lea %s0, 256227; CHECK-NEXT: lvl %s0228; CHECK-NEXT: vcmpu.w %v0, 8, %v0229; CHECK-NEXT: b.l.t (, %s10)230 %2 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vsvl(i32 8, <256 x double> %0, i32 256)231 ret <256 x double> %2232}233 234; Function Attrs: nounwind readnone235define fastcc <256 x double> @vcmpuw_vsvvl_imm(<256 x double> %0, <256 x double> %1) {236; CHECK-LABEL: vcmpuw_vsvvl_imm:237; CHECK: # %bb.0:238; CHECK-NEXT: lea %s0, 128239; CHECK-NEXT: lvl %s0240; CHECK-NEXT: vcmpu.w %v1, 8, %v0241; CHECK-NEXT: lea %s16, 256242; CHECK-NEXT: lvl %s16243; CHECK-NEXT: vor %v0, (0)1, %v1244; CHECK-NEXT: b.l.t (, %s10)245 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)246 ret <256 x double> %3247}248 249; Function Attrs: nounwind readnone250define fastcc <256 x double> @vcmpuw_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {251; CHECK-LABEL: vcmpuw_vvvmvl:252; CHECK: # %bb.0:253; CHECK-NEXT: lea %s0, 128254; CHECK-NEXT: lvl %s0255; CHECK-NEXT: vcmpu.w %v2, %v0, %v1, %vm1256; CHECK-NEXT: lea %s16, 256257; CHECK-NEXT: lvl %s16258; CHECK-NEXT: vor %v0, (0)1, %v2259; CHECK-NEXT: b.l.t (, %s10)260 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)261 ret <256 x double> %5262}263 264; Function Attrs: nounwind readnone265declare <256 x double> @llvm.ve.vl.vcmpuw.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)266 267; Function Attrs: nounwind readnone268define fastcc <256 x double> @vcmpuw_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {269; CHECK-LABEL: vcmpuw_vsvmvl:270; CHECK: # %bb.0:271; CHECK-NEXT: and %s0, %s0, (32)0272; CHECK-NEXT: lea %s1, 128273; CHECK-NEXT: lvl %s1274; CHECK-NEXT: vcmpu.w %v1, %s0, %v0, %vm1275; CHECK-NEXT: lea %s16, 256276; CHECK-NEXT: lvl %s16277; CHECK-NEXT: vor %v0, (0)1, %v1278; CHECK-NEXT: b.l.t (, %s10)279 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)280 ret <256 x double> %5281}282 283; Function Attrs: nounwind readnone284declare <256 x double> @llvm.ve.vl.vcmpuw.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)285 286; Function Attrs: nounwind readnone287define fastcc <256 x double> @vcmpuw_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {288; CHECK-LABEL: vcmpuw_vsvmvl_imm:289; CHECK: # %bb.0:290; CHECK-NEXT: lea %s0, 128291; CHECK-NEXT: lvl %s0292; CHECK-NEXT: vcmpu.w %v1, 8, %v0, %vm1293; CHECK-NEXT: lea %s16, 256294; CHECK-NEXT: lvl %s16295; CHECK-NEXT: vor %v0, (0)1, %v1296; CHECK-NEXT: b.l.t (, %s10)297 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpuw.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)298 ret <256 x double> %4299}300 301; Function Attrs: nounwind readnone302define fastcc <256 x double> @vcmpswsx_vvvl(<256 x double> %0, <256 x double> %1) {303; CHECK-LABEL: vcmpswsx_vvvl:304; CHECK: # %bb.0:305; CHECK-NEXT: lea %s0, 256306; CHECK-NEXT: lvl %s0307; CHECK-NEXT: vcmps.w.sx %v0, %v0, %v1308; CHECK-NEXT: b.l.t (, %s10)309 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)310 ret <256 x double> %3311}312 313; Function Attrs: nounwind readnone314declare <256 x double> @llvm.ve.vl.vcmpswsx.vvvl(<256 x double>, <256 x double>, i32)315 316; Function Attrs: nounwind readnone317define fastcc <256 x double> @vcmpswsx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {318; CHECK-LABEL: vcmpswsx_vvvvl:319; CHECK: # %bb.0:320; CHECK-NEXT: lea %s0, 128321; CHECK-NEXT: lvl %s0322; CHECK-NEXT: vcmps.w.sx %v2, %v0, %v1323; CHECK-NEXT: lea %s16, 256324; CHECK-NEXT: lvl %s16325; CHECK-NEXT: vor %v0, (0)1, %v2326; CHECK-NEXT: b.l.t (, %s10)327 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)328 ret <256 x double> %4329}330 331; Function Attrs: nounwind readnone332declare <256 x double> @llvm.ve.vl.vcmpswsx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)333 334; Function Attrs: nounwind readnone335define fastcc <256 x double> @vcmpswsx_vsvl(i32 signext %0, <256 x double> %1) {336; CHECK-LABEL: vcmpswsx_vsvl:337; CHECK: # %bb.0:338; CHECK-NEXT: and %s0, %s0, (32)0339; CHECK-NEXT: lea %s1, 256340; CHECK-NEXT: lvl %s1341; CHECK-NEXT: vcmps.w.sx %v0, %s0, %v0342; CHECK-NEXT: b.l.t (, %s10)343 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vsvl(i32 %0, <256 x double> %1, i32 256)344 ret <256 x double> %3345}346 347; Function Attrs: nounwind readnone348declare <256 x double> @llvm.ve.vl.vcmpswsx.vsvl(i32, <256 x double>, i32)349 350; Function Attrs: nounwind readnone351define fastcc <256 x double> @vcmpswsx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {352; CHECK-LABEL: vcmpswsx_vsvvl:353; CHECK: # %bb.0:354; CHECK-NEXT: and %s0, %s0, (32)0355; CHECK-NEXT: lea %s1, 128356; CHECK-NEXT: lvl %s1357; CHECK-NEXT: vcmps.w.sx %v1, %s0, %v0358; CHECK-NEXT: lea %s16, 256359; CHECK-NEXT: lvl %s16360; CHECK-NEXT: vor %v0, (0)1, %v1361; CHECK-NEXT: b.l.t (, %s10)362 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)363 ret <256 x double> %4364}365 366; Function Attrs: nounwind readnone367declare <256 x double> @llvm.ve.vl.vcmpswsx.vsvvl(i32, <256 x double>, <256 x double>, i32)368 369; Function Attrs: nounwind readnone370define fastcc <256 x double> @vcmpswsx_vsvl_imm(<256 x double> %0) {371; CHECK-LABEL: vcmpswsx_vsvl_imm:372; CHECK: # %bb.0:373; CHECK-NEXT: lea %s0, 256374; CHECK-NEXT: lvl %s0375; CHECK-NEXT: vcmps.w.sx %v0, 8, %v0376; CHECK-NEXT: b.l.t (, %s10)377 %2 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vsvl(i32 8, <256 x double> %0, i32 256)378 ret <256 x double> %2379}380 381; Function Attrs: nounwind readnone382define fastcc <256 x double> @vcmpswsx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {383; CHECK-LABEL: vcmpswsx_vsvvl_imm:384; CHECK: # %bb.0:385; CHECK-NEXT: lea %s0, 128386; CHECK-NEXT: lvl %s0387; CHECK-NEXT: vcmps.w.sx %v1, 8, %v0388; CHECK-NEXT: lea %s16, 256389; CHECK-NEXT: lvl %s16390; CHECK-NEXT: vor %v0, (0)1, %v1391; CHECK-NEXT: b.l.t (, %s10)392 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)393 ret <256 x double> %3394}395 396; Function Attrs: nounwind readnone397define fastcc <256 x double> @vcmpswsx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {398; CHECK-LABEL: vcmpswsx_vvvmvl:399; CHECK: # %bb.0:400; CHECK-NEXT: lea %s0, 128401; CHECK-NEXT: lvl %s0402; CHECK-NEXT: vcmps.w.sx %v2, %v0, %v1, %vm1403; CHECK-NEXT: lea %s16, 256404; CHECK-NEXT: lvl %s16405; CHECK-NEXT: vor %v0, (0)1, %v2406; CHECK-NEXT: b.l.t (, %s10)407 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)408 ret <256 x double> %5409}410 411; Function Attrs: nounwind readnone412declare <256 x double> @llvm.ve.vl.vcmpswsx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)413 414; Function Attrs: nounwind readnone415define fastcc <256 x double> @vcmpswsx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {416; CHECK-LABEL: vcmpswsx_vsvmvl:417; CHECK: # %bb.0:418; CHECK-NEXT: and %s0, %s0, (32)0419; CHECK-NEXT: lea %s1, 128420; CHECK-NEXT: lvl %s1421; CHECK-NEXT: vcmps.w.sx %v1, %s0, %v0, %vm1422; CHECK-NEXT: lea %s16, 256423; CHECK-NEXT: lvl %s16424; CHECK-NEXT: vor %v0, (0)1, %v1425; CHECK-NEXT: b.l.t (, %s10)426 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)427 ret <256 x double> %5428}429 430; Function Attrs: nounwind readnone431declare <256 x double> @llvm.ve.vl.vcmpswsx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)432 433; Function Attrs: nounwind readnone434define fastcc <256 x double> @vcmpswsx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {435; CHECK-LABEL: vcmpswsx_vsvmvl_imm:436; CHECK: # %bb.0:437; CHECK-NEXT: lea %s0, 128438; CHECK-NEXT: lvl %s0439; CHECK-NEXT: vcmps.w.sx %v1, 8, %v0, %vm1440; CHECK-NEXT: lea %s16, 256441; CHECK-NEXT: lvl %s16442; CHECK-NEXT: vor %v0, (0)1, %v1443; CHECK-NEXT: b.l.t (, %s10)444 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpswsx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)445 ret <256 x double> %4446}447 448; Function Attrs: nounwind readnone449define fastcc <256 x double> @vcmpswzx_vvvl(<256 x double> %0, <256 x double> %1) {450; CHECK-LABEL: vcmpswzx_vvvl:451; CHECK: # %bb.0:452; CHECK-NEXT: lea %s0, 256453; CHECK-NEXT: lvl %s0454; CHECK-NEXT: vcmps.w.zx %v0, %v0, %v1455; CHECK-NEXT: b.l.t (, %s10)456 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)457 ret <256 x double> %3458}459 460; Function Attrs: nounwind readnone461declare <256 x double> @llvm.ve.vl.vcmpswzx.vvvl(<256 x double>, <256 x double>, i32)462 463; Function Attrs: nounwind readnone464define fastcc <256 x double> @vcmpswzx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {465; CHECK-LABEL: vcmpswzx_vvvvl:466; CHECK: # %bb.0:467; CHECK-NEXT: lea %s0, 128468; CHECK-NEXT: lvl %s0469; CHECK-NEXT: vcmps.w.zx %v2, %v0, %v1470; CHECK-NEXT: lea %s16, 256471; CHECK-NEXT: lvl %s16472; CHECK-NEXT: vor %v0, (0)1, %v2473; CHECK-NEXT: b.l.t (, %s10)474 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)475 ret <256 x double> %4476}477 478; Function Attrs: nounwind readnone479declare <256 x double> @llvm.ve.vl.vcmpswzx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)480 481; Function Attrs: nounwind readnone482define fastcc <256 x double> @vcmpswzx_vsvl(i32 signext %0, <256 x double> %1) {483; CHECK-LABEL: vcmpswzx_vsvl:484; CHECK: # %bb.0:485; CHECK-NEXT: and %s0, %s0, (32)0486; CHECK-NEXT: lea %s1, 256487; CHECK-NEXT: lvl %s1488; CHECK-NEXT: vcmps.w.zx %v0, %s0, %v0489; CHECK-NEXT: b.l.t (, %s10)490 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vsvl(i32 %0, <256 x double> %1, i32 256)491 ret <256 x double> %3492}493 494; Function Attrs: nounwind readnone495declare <256 x double> @llvm.ve.vl.vcmpswzx.vsvl(i32, <256 x double>, i32)496 497; Function Attrs: nounwind readnone498define fastcc <256 x double> @vcmpswzx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {499; CHECK-LABEL: vcmpswzx_vsvvl:500; CHECK: # %bb.0:501; CHECK-NEXT: and %s0, %s0, (32)0502; CHECK-NEXT: lea %s1, 128503; CHECK-NEXT: lvl %s1504; CHECK-NEXT: vcmps.w.zx %v1, %s0, %v0505; CHECK-NEXT: lea %s16, 256506; CHECK-NEXT: lvl %s16507; CHECK-NEXT: vor %v0, (0)1, %v1508; CHECK-NEXT: b.l.t (, %s10)509 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)510 ret <256 x double> %4511}512 513; Function Attrs: nounwind readnone514declare <256 x double> @llvm.ve.vl.vcmpswzx.vsvvl(i32, <256 x double>, <256 x double>, i32)515 516; Function Attrs: nounwind readnone517define fastcc <256 x double> @vcmpswzx_vsvl_imm(<256 x double> %0) {518; CHECK-LABEL: vcmpswzx_vsvl_imm:519; CHECK: # %bb.0:520; CHECK-NEXT: lea %s0, 256521; CHECK-NEXT: lvl %s0522; CHECK-NEXT: vcmps.w.zx %v0, 8, %v0523; CHECK-NEXT: b.l.t (, %s10)524 %2 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vsvl(i32 8, <256 x double> %0, i32 256)525 ret <256 x double> %2526}527 528; Function Attrs: nounwind readnone529define fastcc <256 x double> @vcmpswzx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {530; CHECK-LABEL: vcmpswzx_vsvvl_imm:531; CHECK: # %bb.0:532; CHECK-NEXT: lea %s0, 128533; CHECK-NEXT: lvl %s0534; CHECK-NEXT: vcmps.w.zx %v1, 8, %v0535; CHECK-NEXT: lea %s16, 256536; CHECK-NEXT: lvl %s16537; CHECK-NEXT: vor %v0, (0)1, %v1538; CHECK-NEXT: b.l.t (, %s10)539 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)540 ret <256 x double> %3541}542 543; Function Attrs: nounwind readnone544define fastcc <256 x double> @vcmpswzx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {545; CHECK-LABEL: vcmpswzx_vvvmvl:546; CHECK: # %bb.0:547; CHECK-NEXT: lea %s0, 128548; CHECK-NEXT: lvl %s0549; CHECK-NEXT: vcmps.w.zx %v2, %v0, %v1, %vm1550; CHECK-NEXT: lea %s16, 256551; CHECK-NEXT: lvl %s16552; CHECK-NEXT: vor %v0, (0)1, %v2553; CHECK-NEXT: b.l.t (, %s10)554 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)555 ret <256 x double> %5556}557 558; Function Attrs: nounwind readnone559declare <256 x double> @llvm.ve.vl.vcmpswzx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)560 561; Function Attrs: nounwind readnone562define fastcc <256 x double> @vcmpswzx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {563; CHECK-LABEL: vcmpswzx_vsvmvl:564; CHECK: # %bb.0:565; CHECK-NEXT: and %s0, %s0, (32)0566; CHECK-NEXT: lea %s1, 128567; CHECK-NEXT: lvl %s1568; CHECK-NEXT: vcmps.w.zx %v1, %s0, %v0, %vm1569; CHECK-NEXT: lea %s16, 256570; CHECK-NEXT: lvl %s16571; CHECK-NEXT: vor %v0, (0)1, %v1572; CHECK-NEXT: b.l.t (, %s10)573 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)574 ret <256 x double> %5575}576 577; Function Attrs: nounwind readnone578declare <256 x double> @llvm.ve.vl.vcmpswzx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)579 580; Function Attrs: nounwind readnone581define fastcc <256 x double> @vcmpswzx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {582; CHECK-LABEL: vcmpswzx_vsvmvl_imm:583; CHECK: # %bb.0:584; CHECK-NEXT: lea %s0, 128585; CHECK-NEXT: lvl %s0586; CHECK-NEXT: vcmps.w.zx %v1, 8, %v0, %vm1587; CHECK-NEXT: lea %s16, 256588; CHECK-NEXT: lvl %s16589; CHECK-NEXT: vor %v0, (0)1, %v1590; CHECK-NEXT: b.l.t (, %s10)591 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpswzx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)592 ret <256 x double> %4593}594 595; Function Attrs: nounwind readnone596define fastcc <256 x double> @vcmpsl_vvvl(<256 x double> %0, <256 x double> %1) {597; CHECK-LABEL: vcmpsl_vvvl:598; CHECK: # %bb.0:599; CHECK-NEXT: lea %s0, 256600; CHECK-NEXT: lvl %s0601; CHECK-NEXT: vcmps.l %v0, %v0, %v1602; CHECK-NEXT: b.l.t (, %s10)603 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vvvl(<256 x double> %0, <256 x double> %1, i32 256)604 ret <256 x double> %3605}606 607; Function Attrs: nounwind readnone608declare <256 x double> @llvm.ve.vl.vcmpsl.vvvl(<256 x double>, <256 x double>, i32)609 610; Function Attrs: nounwind readnone611define fastcc <256 x double> @vcmpsl_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {612; CHECK-LABEL: vcmpsl_vvvvl:613; CHECK: # %bb.0:614; CHECK-NEXT: lea %s0, 128615; CHECK-NEXT: lvl %s0616; CHECK-NEXT: vcmps.l %v2, %v0, %v1617; CHECK-NEXT: lea %s16, 256618; CHECK-NEXT: lvl %s16619; CHECK-NEXT: vor %v0, (0)1, %v2620; CHECK-NEXT: b.l.t (, %s10)621 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)622 ret <256 x double> %4623}624 625; Function Attrs: nounwind readnone626declare <256 x double> @llvm.ve.vl.vcmpsl.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)627 628; Function Attrs: nounwind readnone629define fastcc <256 x double> @vcmpsl_vsvl(i64 %0, <256 x double> %1) {630; CHECK-LABEL: vcmpsl_vsvl:631; CHECK: # %bb.0:632; CHECK-NEXT: lea %s1, 256633; CHECK-NEXT: lvl %s1634; CHECK-NEXT: vcmps.l %v0, %s0, %v0635; CHECK-NEXT: b.l.t (, %s10)636 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vsvl(i64 %0, <256 x double> %1, i32 256)637 ret <256 x double> %3638}639 640; Function Attrs: nounwind readnone641declare <256 x double> @llvm.ve.vl.vcmpsl.vsvl(i64, <256 x double>, i32)642 643; Function Attrs: nounwind readnone644define fastcc <256 x double> @vcmpsl_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {645; CHECK-LABEL: vcmpsl_vsvvl:646; CHECK: # %bb.0:647; CHECK-NEXT: lea %s1, 128648; CHECK-NEXT: lvl %s1649; CHECK-NEXT: vcmps.l %v1, %s0, %v0650; CHECK-NEXT: lea %s16, 256651; CHECK-NEXT: lvl %s16652; CHECK-NEXT: vor %v0, (0)1, %v1653; CHECK-NEXT: b.l.t (, %s10)654 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)655 ret <256 x double> %4656}657 658; Function Attrs: nounwind readnone659declare <256 x double> @llvm.ve.vl.vcmpsl.vsvvl(i64, <256 x double>, <256 x double>, i32)660 661; Function Attrs: nounwind readnone662define fastcc <256 x double> @vcmpsl_vsvl_imm(<256 x double> %0) {663; CHECK-LABEL: vcmpsl_vsvl_imm:664; CHECK: # %bb.0:665; CHECK-NEXT: lea %s0, 256666; CHECK-NEXT: lvl %s0667; CHECK-NEXT: vcmps.l %v0, 8, %v0668; CHECK-NEXT: b.l.t (, %s10)669 %2 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vsvl(i64 8, <256 x double> %0, i32 256)670 ret <256 x double> %2671}672 673; Function Attrs: nounwind readnone674define fastcc <256 x double> @vcmpsl_vsvvl_imm(<256 x double> %0, <256 x double> %1) {675; CHECK-LABEL: vcmpsl_vsvvl_imm:676; CHECK: # %bb.0:677; CHECK-NEXT: lea %s0, 128678; CHECK-NEXT: lvl %s0679; CHECK-NEXT: vcmps.l %v1, 8, %v0680; CHECK-NEXT: lea %s16, 256681; CHECK-NEXT: lvl %s16682; CHECK-NEXT: vor %v0, (0)1, %v1683; CHECK-NEXT: b.l.t (, %s10)684 %3 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)685 ret <256 x double> %3686}687 688; Function Attrs: nounwind readnone689define fastcc <256 x double> @vcmpsl_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {690; CHECK-LABEL: vcmpsl_vvvmvl:691; CHECK: # %bb.0:692; CHECK-NEXT: lea %s0, 128693; CHECK-NEXT: lvl %s0694; CHECK-NEXT: vcmps.l %v2, %v0, %v1, %vm1695; CHECK-NEXT: lea %s16, 256696; CHECK-NEXT: lvl %s16697; CHECK-NEXT: vor %v0, (0)1, %v2698; CHECK-NEXT: b.l.t (, %s10)699 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)700 ret <256 x double> %5701}702 703; Function Attrs: nounwind readnone704declare <256 x double> @llvm.ve.vl.vcmpsl.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)705 706; Function Attrs: nounwind readnone707define fastcc <256 x double> @vcmpsl_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {708; CHECK-LABEL: vcmpsl_vsvmvl:709; CHECK: # %bb.0:710; CHECK-NEXT: lea %s1, 128711; CHECK-NEXT: lvl %s1712; CHECK-NEXT: vcmps.l %v1, %s0, %v0, %vm1713; CHECK-NEXT: lea %s16, 256714; CHECK-NEXT: lvl %s16715; CHECK-NEXT: vor %v0, (0)1, %v1716; CHECK-NEXT: b.l.t (, %s10)717 %5 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)718 ret <256 x double> %5719}720 721; Function Attrs: nounwind readnone722declare <256 x double> @llvm.ve.vl.vcmpsl.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)723 724; Function Attrs: nounwind readnone725define fastcc <256 x double> @vcmpsl_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {726; CHECK-LABEL: vcmpsl_vsvmvl_imm:727; CHECK: # %bb.0:728; CHECK-NEXT: lea %s0, 128729; CHECK-NEXT: lvl %s0730; CHECK-NEXT: vcmps.l %v1, 8, %v0, %vm1731; CHECK-NEXT: lea %s16, 256732; CHECK-NEXT: lvl %s16733; CHECK-NEXT: vor %v0, (0)1, %v1734; CHECK-NEXT: b.l.t (, %s10)735 %4 = tail call fast <256 x double> @llvm.ve.vl.vcmpsl.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)736 ret <256 x double> %4737}738 739; Function Attrs: nounwind readnone740define fastcc <256 x double> @pvcmpu_vvvl(<256 x double> %0, <256 x double> %1) {741; CHECK-LABEL: pvcmpu_vvvl:742; CHECK: # %bb.0:743; CHECK-NEXT: lea %s0, 256744; CHECK-NEXT: lvl %s0745; CHECK-NEXT: pvcmpu %v0, %v0, %v1746; CHECK-NEXT: b.l.t (, %s10)747 %3 = tail call fast <256 x double> @llvm.ve.vl.pvcmpu.vvvl(<256 x double> %0, <256 x double> %1, i32 256)748 ret <256 x double> %3749}750 751; Function Attrs: nounwind readnone752declare <256 x double> @llvm.ve.vl.pvcmpu.vvvl(<256 x double>, <256 x double>, i32)753 754; Function Attrs: nounwind readnone755define fastcc <256 x double> @pvcmpu_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {756; CHECK-LABEL: pvcmpu_vvvvl:757; CHECK: # %bb.0:758; CHECK-NEXT: lea %s0, 128759; CHECK-NEXT: lvl %s0760; CHECK-NEXT: pvcmpu %v2, %v0, %v1761; CHECK-NEXT: lea %s16, 256762; CHECK-NEXT: lvl %s16763; CHECK-NEXT: vor %v0, (0)1, %v2764; CHECK-NEXT: b.l.t (, %s10)765 %4 = tail call fast <256 x double> @llvm.ve.vl.pvcmpu.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)766 ret <256 x double> %4767}768 769; Function Attrs: nounwind readnone770declare <256 x double> @llvm.ve.vl.pvcmpu.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)771 772; Function Attrs: nounwind readnone773define fastcc <256 x double> @pvcmpu_vsvl(i64 %0, <256 x double> %1) {774; CHECK-LABEL: pvcmpu_vsvl:775; CHECK: # %bb.0:776; CHECK-NEXT: lea %s1, 256777; CHECK-NEXT: lvl %s1778; CHECK-NEXT: pvcmpu %v0, %s0, %v0779; CHECK-NEXT: b.l.t (, %s10)780 %3 = tail call fast <256 x double> @llvm.ve.vl.pvcmpu.vsvl(i64 %0, <256 x double> %1, i32 256)781 ret <256 x double> %3782}783 784; Function Attrs: nounwind readnone785declare <256 x double> @llvm.ve.vl.pvcmpu.vsvl(i64, <256 x double>, i32)786 787; Function Attrs: nounwind readnone788define fastcc <256 x double> @pvcmpu_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {789; CHECK-LABEL: pvcmpu_vsvvl:790; CHECK: # %bb.0:791; CHECK-NEXT: lea %s1, 128792; CHECK-NEXT: lvl %s1793; CHECK-NEXT: pvcmpu %v1, %s0, %v0794; CHECK-NEXT: lea %s16, 256795; CHECK-NEXT: lvl %s16796; CHECK-NEXT: vor %v0, (0)1, %v1797; CHECK-NEXT: b.l.t (, %s10)798 %4 = tail call fast <256 x double> @llvm.ve.vl.pvcmpu.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)799 ret <256 x double> %4800}801 802; Function Attrs: nounwind readnone803declare <256 x double> @llvm.ve.vl.pvcmpu.vsvvl(i64, <256 x double>, <256 x double>, i32)804 805; Function Attrs: nounwind readnone806define fastcc <256 x double> @pvcmpu_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {807; CHECK-LABEL: pvcmpu_vvvMvl:808; CHECK: # %bb.0:809; CHECK-NEXT: lea %s0, 128810; CHECK-NEXT: lvl %s0811; CHECK-NEXT: pvcmpu %v2, %v0, %v1, %vm2812; CHECK-NEXT: lea %s16, 256813; CHECK-NEXT: lvl %s16814; CHECK-NEXT: vor %v0, (0)1, %v2815; CHECK-NEXT: b.l.t (, %s10)816 %5 = tail call fast <256 x double> @llvm.ve.vl.pvcmpu.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)817 ret <256 x double> %5818}819 820; Function Attrs: nounwind readnone821declare <256 x double> @llvm.ve.vl.pvcmpu.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)822 823; Function Attrs: nounwind readnone824define fastcc <256 x double> @pvcmpu_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {825; CHECK-LABEL: pvcmpu_vsvMvl:826; CHECK: # %bb.0:827; CHECK-NEXT: lea %s1, 128828; CHECK-NEXT: lvl %s1829; CHECK-NEXT: pvcmpu %v1, %s0, %v0, %vm2830; CHECK-NEXT: lea %s16, 256831; CHECK-NEXT: lvl %s16832; CHECK-NEXT: vor %v0, (0)1, %v1833; CHECK-NEXT: b.l.t (, %s10)834 %5 = tail call fast <256 x double> @llvm.ve.vl.pvcmpu.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)835 ret <256 x double> %5836}837 838; Function Attrs: nounwind readnone839declare <256 x double> @llvm.ve.vl.pvcmpu.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)840 841; Function Attrs: nounwind readnone842define fastcc <256 x double> @pvcmps_vvvl(<256 x double> %0, <256 x double> %1) {843; CHECK-LABEL: pvcmps_vvvl:844; CHECK: # %bb.0:845; CHECK-NEXT: lea %s0, 256846; CHECK-NEXT: lvl %s0847; CHECK-NEXT: pvcmps %v0, %v0, %v1848; CHECK-NEXT: b.l.t (, %s10)849 %3 = tail call fast <256 x double> @llvm.ve.vl.pvcmps.vvvl(<256 x double> %0, <256 x double> %1, i32 256)850 ret <256 x double> %3851}852 853; Function Attrs: nounwind readnone854declare <256 x double> @llvm.ve.vl.pvcmps.vvvl(<256 x double>, <256 x double>, i32)855 856; Function Attrs: nounwind readnone857define fastcc <256 x double> @pvcmps_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {858; CHECK-LABEL: pvcmps_vvvvl:859; CHECK: # %bb.0:860; CHECK-NEXT: lea %s0, 128861; CHECK-NEXT: lvl %s0862; CHECK-NEXT: pvcmps %v2, %v0, %v1863; CHECK-NEXT: lea %s16, 256864; CHECK-NEXT: lvl %s16865; CHECK-NEXT: vor %v0, (0)1, %v2866; CHECK-NEXT: b.l.t (, %s10)867 %4 = tail call fast <256 x double> @llvm.ve.vl.pvcmps.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)868 ret <256 x double> %4869}870 871; Function Attrs: nounwind readnone872declare <256 x double> @llvm.ve.vl.pvcmps.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)873 874; Function Attrs: nounwind readnone875define fastcc <256 x double> @pvcmps_vsvl(i64 %0, <256 x double> %1) {876; CHECK-LABEL: pvcmps_vsvl:877; CHECK: # %bb.0:878; CHECK-NEXT: lea %s1, 256879; CHECK-NEXT: lvl %s1880; CHECK-NEXT: pvcmps %v0, %s0, %v0881; CHECK-NEXT: b.l.t (, %s10)882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvcmps.vsvl(i64 %0, <256 x double> %1, i32 256)883 ret <256 x double> %3884}885 886; Function Attrs: nounwind readnone887declare <256 x double> @llvm.ve.vl.pvcmps.vsvl(i64, <256 x double>, i32)888 889; Function Attrs: nounwind readnone890define fastcc <256 x double> @pvcmps_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {891; CHECK-LABEL: pvcmps_vsvvl:892; CHECK: # %bb.0:893; CHECK-NEXT: lea %s1, 128894; CHECK-NEXT: lvl %s1895; CHECK-NEXT: pvcmps %v1, %s0, %v0896; CHECK-NEXT: lea %s16, 256897; CHECK-NEXT: lvl %s16898; CHECK-NEXT: vor %v0, (0)1, %v1899; CHECK-NEXT: b.l.t (, %s10)900 %4 = tail call fast <256 x double> @llvm.ve.vl.pvcmps.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)901 ret <256 x double> %4902}903 904; Function Attrs: nounwind readnone905declare <256 x double> @llvm.ve.vl.pvcmps.vsvvl(i64, <256 x double>, <256 x double>, i32)906 907; Function Attrs: nounwind readnone908define fastcc <256 x double> @pvcmps_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {909; CHECK-LABEL: pvcmps_vvvMvl:910; CHECK: # %bb.0:911; CHECK-NEXT: lea %s0, 128912; CHECK-NEXT: lvl %s0913; CHECK-NEXT: pvcmps %v2, %v0, %v1, %vm2914; CHECK-NEXT: lea %s16, 256915; CHECK-NEXT: lvl %s16916; CHECK-NEXT: vor %v0, (0)1, %v2917; CHECK-NEXT: b.l.t (, %s10)918 %5 = tail call fast <256 x double> @llvm.ve.vl.pvcmps.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)919 ret <256 x double> %5920}921 922; Function Attrs: nounwind readnone923declare <256 x double> @llvm.ve.vl.pvcmps.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)924 925; Function Attrs: nounwind readnone926define fastcc <256 x double> @pvcmps_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {927; CHECK-LABEL: pvcmps_vsvMvl:928; CHECK: # %bb.0:929; CHECK-NEXT: lea %s1, 128930; CHECK-NEXT: lvl %s1931; CHECK-NEXT: pvcmps %v1, %s0, %v0, %vm2932; CHECK-NEXT: lea %s16, 256933; CHECK-NEXT: lvl %s16934; CHECK-NEXT: vor %v0, (0)1, %v1935; CHECK-NEXT: b.l.t (, %s10)936 %5 = tail call fast <256 x double> @llvm.ve.vl.pvcmps.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)937 ret <256 x double> %5938}939 940; Function Attrs: nounwind readnone941declare <256 x double> @llvm.ve.vl.pvcmps.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)942