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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector divide intrinsic instructions4;;;5;;; Note:6;;; We test VDIV*vvl, VDIV*vvl_v, VDIV*rvl, VDIV*rvl_v, VDIV*ivl,7;;; VDIV*ivl_v, VDIV*vvml_v, VDIV*rvml_v, VDIV*ivml_v, VDIV*vrl,8;;; VDIV*vrl_v, VDIV*vil, VDIV*vil_v, VDIV*vrml_v, and VDIV*viml_v9;;; instructions.10 11; Function Attrs: nounwind readnone12define fastcc <256 x double> @vdivul_vvvl(<256 x double> %0, <256 x double> %1) {13; CHECK-LABEL: vdivul_vvvl:14; CHECK: # %bb.0:15; CHECK-NEXT: lea %s0, 25616; CHECK-NEXT: lvl %s017; CHECK-NEXT: vdivu.l %v0, %v0, %v118; CHECK-NEXT: b.l.t (, %s10)19 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvvl(<256 x double> %0, <256 x double> %1, i32 256)20 ret <256 x double> %321}22 23; Function Attrs: nounwind readnone24declare <256 x double> @llvm.ve.vl.vdivul.vvvl(<256 x double>, <256 x double>, i32)25 26; Function Attrs: nounwind readnone27define fastcc <256 x double> @vdivul_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {28; CHECK-LABEL: vdivul_vvvvl:29; CHECK: # %bb.0:30; CHECK-NEXT: lea %s0, 12831; CHECK-NEXT: lvl %s032; CHECK-NEXT: vdivu.l %v2, %v0, %v133; CHECK-NEXT: lea %s16, 25634; CHECK-NEXT: lvl %s1635; CHECK-NEXT: vor %v0, (0)1, %v236; CHECK-NEXT: b.l.t (, %s10)37 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)38 ret <256 x double> %439}40 41; Function Attrs: nounwind readnone42declare <256 x double> @llvm.ve.vl.vdivul.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)43 44; Function Attrs: nounwind readnone45define fastcc <256 x double> @vdivul_vsvl(i64 %0, <256 x double> %1) {46; CHECK-LABEL: vdivul_vsvl:47; CHECK: # %bb.0:48; CHECK-NEXT: lea %s1, 25649; CHECK-NEXT: lvl %s150; CHECK-NEXT: vdivu.l %v0, %s0, %v051; CHECK-NEXT: b.l.t (, %s10)52 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vsvl(i64 %0, <256 x double> %1, i32 256)53 ret <256 x double> %354}55 56; Function Attrs: nounwind readnone57declare <256 x double> @llvm.ve.vl.vdivul.vsvl(i64, <256 x double>, i32)58 59; Function Attrs: nounwind readnone60define fastcc <256 x double> @vdivul_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {61; CHECK-LABEL: vdivul_vsvvl:62; CHECK: # %bb.0:63; CHECK-NEXT: lea %s1, 12864; CHECK-NEXT: lvl %s165; CHECK-NEXT: vdivu.l %v1, %s0, %v066; CHECK-NEXT: lea %s16, 25667; CHECK-NEXT: lvl %s1668; CHECK-NEXT: vor %v0, (0)1, %v169; CHECK-NEXT: b.l.t (, %s10)70 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)71 ret <256 x double> %472}73 74; Function Attrs: nounwind readnone75declare <256 x double> @llvm.ve.vl.vdivul.vsvvl(i64, <256 x double>, <256 x double>, i32)76 77; Function Attrs: nounwind readnone78define fastcc <256 x double> @vdivul_vsvl_imm(<256 x double> %0) {79; CHECK-LABEL: vdivul_vsvl_imm:80; CHECK: # %bb.0:81; CHECK-NEXT: lea %s0, 25682; CHECK-NEXT: lvl %s083; CHECK-NEXT: vdivu.l %v0, 8, %v084; CHECK-NEXT: b.l.t (, %s10)85 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vsvl(i64 8, <256 x double> %0, i32 256)86 ret <256 x double> %287}88 89; Function Attrs: nounwind readnone90define fastcc <256 x double> @vdivul_vsvvl_imm(<256 x double> %0, <256 x double> %1) {91; CHECK-LABEL: vdivul_vsvvl_imm:92; CHECK: # %bb.0:93; CHECK-NEXT: lea %s0, 12894; CHECK-NEXT: lvl %s095; CHECK-NEXT: vdivu.l %v1, 8, %v096; CHECK-NEXT: lea %s16, 25697; CHECK-NEXT: lvl %s1698; CHECK-NEXT: vor %v0, (0)1, %v199; CHECK-NEXT: b.l.t (, %s10)100 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)101 ret <256 x double> %3102}103 104; Function Attrs: nounwind readnone105define fastcc <256 x double> @vdivul_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {106; CHECK-LABEL: vdivul_vvvmvl:107; CHECK: # %bb.0:108; CHECK-NEXT: lea %s0, 128109; CHECK-NEXT: lvl %s0110; CHECK-NEXT: vdivu.l %v2, %v0, %v1, %vm1111; CHECK-NEXT: lea %s16, 256112; CHECK-NEXT: lvl %s16113; CHECK-NEXT: vor %v0, (0)1, %v2114; CHECK-NEXT: b.l.t (, %s10)115 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)116 ret <256 x double> %5117}118 119; Function Attrs: nounwind readnone120declare <256 x double> @llvm.ve.vl.vdivul.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)121 122; Function Attrs: nounwind readnone123define fastcc <256 x double> @vdivul_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {124; CHECK-LABEL: vdivul_vsvmvl:125; CHECK: # %bb.0:126; CHECK-NEXT: lea %s1, 128127; CHECK-NEXT: lvl %s1128; CHECK-NEXT: vdivu.l %v1, %s0, %v0, %vm1129; CHECK-NEXT: lea %s16, 256130; CHECK-NEXT: lvl %s16131; CHECK-NEXT: vor %v0, (0)1, %v1132; CHECK-NEXT: b.l.t (, %s10)133 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)134 ret <256 x double> %5135}136 137; Function Attrs: nounwind readnone138declare <256 x double> @llvm.ve.vl.vdivul.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)139 140; Function Attrs: nounwind readnone141define fastcc <256 x double> @vdivul_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {142; CHECK-LABEL: vdivul_vsvmvl_imm:143; CHECK: # %bb.0:144; CHECK-NEXT: lea %s0, 128145; CHECK-NEXT: lvl %s0146; CHECK-NEXT: vdivu.l %v1, 8, %v0, %vm1147; CHECK-NEXT: lea %s16, 256148; CHECK-NEXT: lvl %s16149; CHECK-NEXT: vor %v0, (0)1, %v1150; CHECK-NEXT: b.l.t (, %s10)151 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)152 ret <256 x double> %4153}154 155; Function Attrs: nounwind readnone156define fastcc <256 x double> @vdivul_vvsl(<256 x double> %0, i64 %1) {157; CHECK-LABEL: vdivul_vvsl:158; CHECK: # %bb.0:159; CHECK-NEXT: lea %s1, 256160; CHECK-NEXT: lvl %s1161; CHECK-NEXT: vdivu.l %v0, %v0, %s0162; CHECK-NEXT: b.l.t (, %s10)163 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvsl(<256 x double> %0, i64 %1, i32 256)164 ret <256 x double> %3165}166 167; Function Attrs: nounwind readnone168declare <256 x double> @llvm.ve.vl.vdivul.vvsl(<256 x double>, i64, i32)169 170; Function Attrs: nounwind readnone171define fastcc <256 x double> @vdivul_vvsvl(<256 x double> %0, i64 %1, <256 x double> %2) {172; CHECK-LABEL: vdivul_vvsvl:173; CHECK: # %bb.0:174; CHECK-NEXT: lea %s1, 128175; CHECK-NEXT: lvl %s1176; CHECK-NEXT: vdivu.l %v1, %v0, %s0177; CHECK-NEXT: lea %s16, 256178; CHECK-NEXT: lvl %s16179; CHECK-NEXT: vor %v0, (0)1, %v1180; CHECK-NEXT: b.l.t (, %s10)181 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvsvl(<256 x double> %0, i64 %1, <256 x double> %2, i32 128)182 ret <256 x double> %4183}184 185; Function Attrs: nounwind readnone186declare <256 x double> @llvm.ve.vl.vdivul.vvsvl(<256 x double>, i64, <256 x double>, i32)187 188; Function Attrs: nounwind readnone189define fastcc <256 x double> @vdivul_vvsl_imm(<256 x double> %0) {190; CHECK-LABEL: vdivul_vvsl_imm:191; CHECK: # %bb.0:192; CHECK-NEXT: lea %s0, 256193; CHECK-NEXT: lvl %s0194; CHECK-NEXT: vdivu.l %v0, %v0, 8195; CHECK-NEXT: b.l.t (, %s10)196 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvsl(<256 x double> %0, i64 8, i32 256)197 ret <256 x double> %2198}199 200; Function Attrs: nounwind readnone201define fastcc <256 x double> @vdivul_vvsvl_imm(<256 x double> %0, <256 x double> %1) {202; CHECK-LABEL: vdivul_vvsvl_imm:203; CHECK: # %bb.0:204; CHECK-NEXT: lea %s0, 128205; CHECK-NEXT: lvl %s0206; CHECK-NEXT: vdivu.l %v1, %v0, 8207; CHECK-NEXT: lea %s16, 256208; CHECK-NEXT: lvl %s16209; CHECK-NEXT: vor %v0, (0)1, %v1210; CHECK-NEXT: b.l.t (, %s10)211 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvsvl(<256 x double> %0, i64 8, <256 x double> %1, i32 128)212 ret <256 x double> %3213}214 215; Function Attrs: nounwind readnone216define fastcc <256 x double> @vdivul_vvsmvl(<256 x double> %0, i64 %1, <256 x i1> %2, <256 x double> %3) {217; CHECK-LABEL: vdivul_vvsmvl:218; CHECK: # %bb.0:219; CHECK-NEXT: lea %s1, 128220; CHECK-NEXT: lvl %s1221; CHECK-NEXT: vdivu.l %v1, %v0, %s0, %vm1222; CHECK-NEXT: lea %s16, 256223; CHECK-NEXT: lvl %s16224; CHECK-NEXT: vor %v0, (0)1, %v1225; CHECK-NEXT: b.l.t (, %s10)226 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvsmvl(<256 x double> %0, i64 %1, <256 x i1> %2, <256 x double> %3, i32 128)227 ret <256 x double> %5228}229 230; Function Attrs: nounwind readnone231declare <256 x double> @llvm.ve.vl.vdivul.vvsmvl(<256 x double>, i64, <256 x i1>, <256 x double>, i32)232 233; Function Attrs: nounwind readnone234define fastcc <256 x double> @vdivul_vvsmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {235; CHECK-LABEL: vdivul_vvsmvl_imm:236; CHECK: # %bb.0:237; CHECK-NEXT: lea %s0, 128238; CHECK-NEXT: lvl %s0239; CHECK-NEXT: vdivu.l %v1, %v0, 8, %vm1240; CHECK-NEXT: lea %s16, 256241; CHECK-NEXT: lvl %s16242; CHECK-NEXT: vor %v0, (0)1, %v1243; CHECK-NEXT: b.l.t (, %s10)244 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivul.vvsmvl(<256 x double> %0, i64 8, <256 x i1> %1, <256 x double> %2, i32 128)245 ret <256 x double> %4246}247 248; Function Attrs: nounwind readnone249define fastcc <256 x double> @vdivuw_vvvl(<256 x double> %0, <256 x double> %1) {250; CHECK-LABEL: vdivuw_vvvl:251; CHECK: # %bb.0:252; CHECK-NEXT: lea %s0, 256253; CHECK-NEXT: lvl %s0254; CHECK-NEXT: vdivu.w %v0, %v0, %v1255; CHECK-NEXT: b.l.t (, %s10)256 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvvl(<256 x double> %0, <256 x double> %1, i32 256)257 ret <256 x double> %3258}259 260; Function Attrs: nounwind readnone261declare <256 x double> @llvm.ve.vl.vdivuw.vvvl(<256 x double>, <256 x double>, i32)262 263; Function Attrs: nounwind readnone264define fastcc <256 x double> @vdivuw_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {265; CHECK-LABEL: vdivuw_vvvvl:266; CHECK: # %bb.0:267; CHECK-NEXT: lea %s0, 128268; CHECK-NEXT: lvl %s0269; CHECK-NEXT: vdivu.w %v2, %v0, %v1270; CHECK-NEXT: lea %s16, 256271; CHECK-NEXT: lvl %s16272; CHECK-NEXT: vor %v0, (0)1, %v2273; CHECK-NEXT: b.l.t (, %s10)274 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)275 ret <256 x double> %4276}277 278; Function Attrs: nounwind readnone279declare <256 x double> @llvm.ve.vl.vdivuw.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)280 281; Function Attrs: nounwind readnone282define fastcc <256 x double> @vdivuw_vsvl(i32 signext %0, <256 x double> %1) {283; CHECK-LABEL: vdivuw_vsvl:284; CHECK: # %bb.0:285; CHECK-NEXT: and %s0, %s0, (32)0286; CHECK-NEXT: lea %s1, 256287; CHECK-NEXT: lvl %s1288; CHECK-NEXT: vdivu.w %v0, %s0, %v0289; CHECK-NEXT: b.l.t (, %s10)290 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vsvl(i32 %0, <256 x double> %1, i32 256)291 ret <256 x double> %3292}293 294; Function Attrs: nounwind readnone295declare <256 x double> @llvm.ve.vl.vdivuw.vsvl(i32, <256 x double>, i32)296 297; Function Attrs: nounwind readnone298define fastcc <256 x double> @vdivuw_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {299; CHECK-LABEL: vdivuw_vsvvl:300; CHECK: # %bb.0:301; CHECK-NEXT: and %s0, %s0, (32)0302; CHECK-NEXT: lea %s1, 128303; CHECK-NEXT: lvl %s1304; CHECK-NEXT: vdivu.w %v1, %s0, %v0305; CHECK-NEXT: lea %s16, 256306; CHECK-NEXT: lvl %s16307; CHECK-NEXT: vor %v0, (0)1, %v1308; CHECK-NEXT: b.l.t (, %s10)309 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)310 ret <256 x double> %4311}312 313; Function Attrs: nounwind readnone314declare <256 x double> @llvm.ve.vl.vdivuw.vsvvl(i32, <256 x double>, <256 x double>, i32)315 316; Function Attrs: nounwind readnone317define fastcc <256 x double> @vdivuw_vsvl_imm(<256 x double> %0) {318; CHECK-LABEL: vdivuw_vsvl_imm:319; CHECK: # %bb.0:320; CHECK-NEXT: lea %s0, 256321; CHECK-NEXT: lvl %s0322; CHECK-NEXT: vdivu.w %v0, 8, %v0323; CHECK-NEXT: b.l.t (, %s10)324 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vsvl(i32 8, <256 x double> %0, i32 256)325 ret <256 x double> %2326}327 328; Function Attrs: nounwind readnone329define fastcc <256 x double> @vdivuw_vsvvl_imm(<256 x double> %0, <256 x double> %1) {330; CHECK-LABEL: vdivuw_vsvvl_imm:331; CHECK: # %bb.0:332; CHECK-NEXT: lea %s0, 128333; CHECK-NEXT: lvl %s0334; CHECK-NEXT: vdivu.w %v1, 8, %v0335; CHECK-NEXT: lea %s16, 256336; CHECK-NEXT: lvl %s16337; CHECK-NEXT: vor %v0, (0)1, %v1338; CHECK-NEXT: b.l.t (, %s10)339 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)340 ret <256 x double> %3341}342 343; Function Attrs: nounwind readnone344define fastcc <256 x double> @vdivuw_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {345; CHECK-LABEL: vdivuw_vvvmvl:346; CHECK: # %bb.0:347; CHECK-NEXT: lea %s0, 128348; CHECK-NEXT: lvl %s0349; CHECK-NEXT: vdivu.w %v2, %v0, %v1, %vm1350; CHECK-NEXT: lea %s16, 256351; CHECK-NEXT: lvl %s16352; CHECK-NEXT: vor %v0, (0)1, %v2353; CHECK-NEXT: b.l.t (, %s10)354 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)355 ret <256 x double> %5356}357 358; Function Attrs: nounwind readnone359declare <256 x double> @llvm.ve.vl.vdivuw.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)360 361; Function Attrs: nounwind readnone362define fastcc <256 x double> @vdivuw_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {363; CHECK-LABEL: vdivuw_vsvmvl:364; CHECK: # %bb.0:365; CHECK-NEXT: and %s0, %s0, (32)0366; CHECK-NEXT: lea %s1, 128367; CHECK-NEXT: lvl %s1368; CHECK-NEXT: vdivu.w %v1, %s0, %v0, %vm1369; CHECK-NEXT: lea %s16, 256370; CHECK-NEXT: lvl %s16371; CHECK-NEXT: vor %v0, (0)1, %v1372; CHECK-NEXT: b.l.t (, %s10)373 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)374 ret <256 x double> %5375}376 377; Function Attrs: nounwind readnone378declare <256 x double> @llvm.ve.vl.vdivuw.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)379 380; Function Attrs: nounwind readnone381define fastcc <256 x double> @vdivuw_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {382; CHECK-LABEL: vdivuw_vsvmvl_imm:383; CHECK: # %bb.0:384; CHECK-NEXT: lea %s0, 128385; CHECK-NEXT: lvl %s0386; CHECK-NEXT: vdivu.w %v1, 8, %v0, %vm1387; CHECK-NEXT: lea %s16, 256388; CHECK-NEXT: lvl %s16389; CHECK-NEXT: vor %v0, (0)1, %v1390; CHECK-NEXT: b.l.t (, %s10)391 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)392 ret <256 x double> %4393}394 395; Function Attrs: nounwind readnone396define fastcc <256 x double> @vdivuw_vvsl(<256 x double> %0, i32 signext %1) {397; CHECK-LABEL: vdivuw_vvsl:398; CHECK: # %bb.0:399; CHECK-NEXT: and %s0, %s0, (32)0400; CHECK-NEXT: lea %s1, 256401; CHECK-NEXT: lvl %s1402; CHECK-NEXT: vdivu.w %v0, %v0, %s0403; CHECK-NEXT: b.l.t (, %s10)404 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvsl(<256 x double> %0, i32 %1, i32 256)405 ret <256 x double> %3406}407 408; Function Attrs: nounwind readnone409declare <256 x double> @llvm.ve.vl.vdivuw.vvsl(<256 x double>, i32, i32)410 411; Function Attrs: nounwind readnone412define fastcc <256 x double> @vdivuw_vvsvl(<256 x double> %0, i32 signext %1, <256 x double> %2) {413; CHECK-LABEL: vdivuw_vvsvl:414; CHECK: # %bb.0:415; CHECK-NEXT: and %s0, %s0, (32)0416; CHECK-NEXT: lea %s1, 128417; CHECK-NEXT: lvl %s1418; CHECK-NEXT: vdivu.w %v1, %v0, %s0419; CHECK-NEXT: lea %s16, 256420; CHECK-NEXT: lvl %s16421; CHECK-NEXT: vor %v0, (0)1, %v1422; CHECK-NEXT: b.l.t (, %s10)423 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvsvl(<256 x double> %0, i32 %1, <256 x double> %2, i32 128)424 ret <256 x double> %4425}426 427; Function Attrs: nounwind readnone428declare <256 x double> @llvm.ve.vl.vdivuw.vvsvl(<256 x double>, i32, <256 x double>, i32)429 430; Function Attrs: nounwind readnone431define fastcc <256 x double> @vdivuw_vvsl_imm(<256 x double> %0) {432; CHECK-LABEL: vdivuw_vvsl_imm:433; CHECK: # %bb.0:434; CHECK-NEXT: lea %s0, 256435; CHECK-NEXT: lvl %s0436; CHECK-NEXT: vdivu.w %v0, %v0, 8437; CHECK-NEXT: b.l.t (, %s10)438 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvsl(<256 x double> %0, i32 8, i32 256)439 ret <256 x double> %2440}441 442; Function Attrs: nounwind readnone443define fastcc <256 x double> @vdivuw_vvsvl_imm(<256 x double> %0, <256 x double> %1) {444; CHECK-LABEL: vdivuw_vvsvl_imm:445; CHECK: # %bb.0:446; CHECK-NEXT: lea %s0, 128447; CHECK-NEXT: lvl %s0448; CHECK-NEXT: vdivu.w %v1, %v0, 8449; CHECK-NEXT: lea %s16, 256450; CHECK-NEXT: lvl %s16451; CHECK-NEXT: vor %v0, (0)1, %v1452; CHECK-NEXT: b.l.t (, %s10)453 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvsvl(<256 x double> %0, i32 8, <256 x double> %1, i32 128)454 ret <256 x double> %3455}456 457; Function Attrs: nounwind readnone458define fastcc <256 x double> @vdivuw_vvsmvl(<256 x double> %0, i32 signext %1, <256 x i1> %2, <256 x double> %3) {459; CHECK-LABEL: vdivuw_vvsmvl:460; CHECK: # %bb.0:461; CHECK-NEXT: and %s0, %s0, (32)0462; CHECK-NEXT: lea %s1, 128463; CHECK-NEXT: lvl %s1464; CHECK-NEXT: vdivu.w %v1, %v0, %s0, %vm1465; CHECK-NEXT: lea %s16, 256466; CHECK-NEXT: lvl %s16467; CHECK-NEXT: vor %v0, (0)1, %v1468; CHECK-NEXT: b.l.t (, %s10)469 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvsmvl(<256 x double> %0, i32 %1, <256 x i1> %2, <256 x double> %3, i32 128)470 ret <256 x double> %5471}472 473; Function Attrs: nounwind readnone474declare <256 x double> @llvm.ve.vl.vdivuw.vvsmvl(<256 x double>, i32, <256 x i1>, <256 x double>, i32)475 476; Function Attrs: nounwind readnone477define fastcc <256 x double> @vdivuw_vvsmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {478; CHECK-LABEL: vdivuw_vvsmvl_imm:479; CHECK: # %bb.0:480; CHECK-NEXT: lea %s0, 128481; CHECK-NEXT: lvl %s0482; CHECK-NEXT: vdivu.w %v1, %v0, 8, %vm1483; CHECK-NEXT: lea %s16, 256484; CHECK-NEXT: lvl %s16485; CHECK-NEXT: vor %v0, (0)1, %v1486; CHECK-NEXT: b.l.t (, %s10)487 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivuw.vvsmvl(<256 x double> %0, i32 8, <256 x i1> %1, <256 x double> %2, i32 128)488 ret <256 x double> %4489}490 491; Function Attrs: nounwind readnone492define fastcc <256 x double> @vdivswsx_vvvl(<256 x double> %0, <256 x double> %1) {493; CHECK-LABEL: vdivswsx_vvvl:494; CHECK: # %bb.0:495; CHECK-NEXT: lea %s0, 256496; CHECK-NEXT: lvl %s0497; CHECK-NEXT: vdivs.w.sx %v0, %v0, %v1498; CHECK-NEXT: b.l.t (, %s10)499 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)500 ret <256 x double> %3501}502 503; Function Attrs: nounwind readnone504declare <256 x double> @llvm.ve.vl.vdivswsx.vvvl(<256 x double>, <256 x double>, i32)505 506; Function Attrs: nounwind readnone507define fastcc <256 x double> @vdivswsx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {508; CHECK-LABEL: vdivswsx_vvvvl:509; CHECK: # %bb.0:510; CHECK-NEXT: lea %s0, 128511; CHECK-NEXT: lvl %s0512; CHECK-NEXT: vdivs.w.sx %v2, %v0, %v1513; CHECK-NEXT: lea %s16, 256514; CHECK-NEXT: lvl %s16515; CHECK-NEXT: vor %v0, (0)1, %v2516; CHECK-NEXT: b.l.t (, %s10)517 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)518 ret <256 x double> %4519}520 521; Function Attrs: nounwind readnone522declare <256 x double> @llvm.ve.vl.vdivswsx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)523 524; Function Attrs: nounwind readnone525define fastcc <256 x double> @vdivswsx_vsvl(i32 signext %0, <256 x double> %1) {526; CHECK-LABEL: vdivswsx_vsvl:527; CHECK: # %bb.0:528; CHECK-NEXT: and %s0, %s0, (32)0529; CHECK-NEXT: lea %s1, 256530; CHECK-NEXT: lvl %s1531; CHECK-NEXT: vdivs.w.sx %v0, %s0, %v0532; CHECK-NEXT: b.l.t (, %s10)533 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vsvl(i32 %0, <256 x double> %1, i32 256)534 ret <256 x double> %3535}536 537; Function Attrs: nounwind readnone538declare <256 x double> @llvm.ve.vl.vdivswsx.vsvl(i32, <256 x double>, i32)539 540; Function Attrs: nounwind readnone541define fastcc <256 x double> @vdivswsx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {542; CHECK-LABEL: vdivswsx_vsvvl:543; CHECK: # %bb.0:544; CHECK-NEXT: and %s0, %s0, (32)0545; CHECK-NEXT: lea %s1, 128546; CHECK-NEXT: lvl %s1547; CHECK-NEXT: vdivs.w.sx %v1, %s0, %v0548; CHECK-NEXT: lea %s16, 256549; CHECK-NEXT: lvl %s16550; CHECK-NEXT: vor %v0, (0)1, %v1551; CHECK-NEXT: b.l.t (, %s10)552 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)553 ret <256 x double> %4554}555 556; Function Attrs: nounwind readnone557declare <256 x double> @llvm.ve.vl.vdivswsx.vsvvl(i32, <256 x double>, <256 x double>, i32)558 559; Function Attrs: nounwind readnone560define fastcc <256 x double> @vdivswsx_vsvl_imm(<256 x double> %0) {561; CHECK-LABEL: vdivswsx_vsvl_imm:562; CHECK: # %bb.0:563; CHECK-NEXT: lea %s0, 256564; CHECK-NEXT: lvl %s0565; CHECK-NEXT: vdivs.w.sx %v0, 8, %v0566; CHECK-NEXT: b.l.t (, %s10)567 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vsvl(i32 8, <256 x double> %0, i32 256)568 ret <256 x double> %2569}570 571; Function Attrs: nounwind readnone572define fastcc <256 x double> @vdivswsx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {573; CHECK-LABEL: vdivswsx_vsvvl_imm:574; CHECK: # %bb.0:575; CHECK-NEXT: lea %s0, 128576; CHECK-NEXT: lvl %s0577; CHECK-NEXT: vdivs.w.sx %v1, 8, %v0578; CHECK-NEXT: lea %s16, 256579; CHECK-NEXT: lvl %s16580; CHECK-NEXT: vor %v0, (0)1, %v1581; CHECK-NEXT: b.l.t (, %s10)582 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)583 ret <256 x double> %3584}585 586; Function Attrs: nounwind readnone587define fastcc <256 x double> @vdivswsx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {588; CHECK-LABEL: vdivswsx_vvvmvl:589; CHECK: # %bb.0:590; CHECK-NEXT: lea %s0, 128591; CHECK-NEXT: lvl %s0592; CHECK-NEXT: vdivs.w.sx %v2, %v0, %v1, %vm1593; CHECK-NEXT: lea %s16, 256594; CHECK-NEXT: lvl %s16595; CHECK-NEXT: vor %v0, (0)1, %v2596; CHECK-NEXT: b.l.t (, %s10)597 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)598 ret <256 x double> %5599}600 601; Function Attrs: nounwind readnone602declare <256 x double> @llvm.ve.vl.vdivswsx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)603 604; Function Attrs: nounwind readnone605define fastcc <256 x double> @vdivswsx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {606; CHECK-LABEL: vdivswsx_vsvmvl:607; CHECK: # %bb.0:608; CHECK-NEXT: and %s0, %s0, (32)0609; CHECK-NEXT: lea %s1, 128610; CHECK-NEXT: lvl %s1611; CHECK-NEXT: vdivs.w.sx %v1, %s0, %v0, %vm1612; CHECK-NEXT: lea %s16, 256613; CHECK-NEXT: lvl %s16614; CHECK-NEXT: vor %v0, (0)1, %v1615; CHECK-NEXT: b.l.t (, %s10)616 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)617 ret <256 x double> %5618}619 620; Function Attrs: nounwind readnone621declare <256 x double> @llvm.ve.vl.vdivswsx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)622 623; Function Attrs: nounwind readnone624define fastcc <256 x double> @vdivswsx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {625; CHECK-LABEL: vdivswsx_vsvmvl_imm:626; CHECK: # %bb.0:627; CHECK-NEXT: lea %s0, 128628; CHECK-NEXT: lvl %s0629; CHECK-NEXT: vdivs.w.sx %v1, 8, %v0, %vm1630; CHECK-NEXT: lea %s16, 256631; CHECK-NEXT: lvl %s16632; CHECK-NEXT: vor %v0, (0)1, %v1633; CHECK-NEXT: b.l.t (, %s10)634 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)635 ret <256 x double> %4636}637 638; Function Attrs: nounwind readnone639define fastcc <256 x double> @vdivswsx_vvsl(<256 x double> %0, i32 signext %1) {640; CHECK-LABEL: vdivswsx_vvsl:641; CHECK: # %bb.0:642; CHECK-NEXT: and %s0, %s0, (32)0643; CHECK-NEXT: lea %s1, 256644; CHECK-NEXT: lvl %s1645; CHECK-NEXT: vdivs.w.sx %v0, %v0, %s0646; CHECK-NEXT: b.l.t (, %s10)647 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvsl(<256 x double> %0, i32 %1, i32 256)648 ret <256 x double> %3649}650 651; Function Attrs: nounwind readnone652declare <256 x double> @llvm.ve.vl.vdivswsx.vvsl(<256 x double>, i32, i32)653 654; Function Attrs: nounwind readnone655define fastcc <256 x double> @vdivswsx_vvsvl(<256 x double> %0, i32 signext %1, <256 x double> %2) {656; CHECK-LABEL: vdivswsx_vvsvl:657; CHECK: # %bb.0:658; CHECK-NEXT: and %s0, %s0, (32)0659; CHECK-NEXT: lea %s1, 128660; CHECK-NEXT: lvl %s1661; CHECK-NEXT: vdivs.w.sx %v1, %v0, %s0662; CHECK-NEXT: lea %s16, 256663; CHECK-NEXT: lvl %s16664; CHECK-NEXT: vor %v0, (0)1, %v1665; CHECK-NEXT: b.l.t (, %s10)666 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvsvl(<256 x double> %0, i32 %1, <256 x double> %2, i32 128)667 ret <256 x double> %4668}669 670; Function Attrs: nounwind readnone671declare <256 x double> @llvm.ve.vl.vdivswsx.vvsvl(<256 x double>, i32, <256 x double>, i32)672 673; Function Attrs: nounwind readnone674define fastcc <256 x double> @vdivswsx_vvsl_imm(<256 x double> %0) {675; CHECK-LABEL: vdivswsx_vvsl_imm:676; CHECK: # %bb.0:677; CHECK-NEXT: lea %s0, 256678; CHECK-NEXT: lvl %s0679; CHECK-NEXT: vdivs.w.sx %v0, %v0, 8680; CHECK-NEXT: b.l.t (, %s10)681 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvsl(<256 x double> %0, i32 8, i32 256)682 ret <256 x double> %2683}684 685; Function Attrs: nounwind readnone686define fastcc <256 x double> @vdivswsx_vvsvl_imm(<256 x double> %0, <256 x double> %1) {687; CHECK-LABEL: vdivswsx_vvsvl_imm:688; CHECK: # %bb.0:689; CHECK-NEXT: lea %s0, 128690; CHECK-NEXT: lvl %s0691; CHECK-NEXT: vdivs.w.sx %v1, %v0, 8692; CHECK-NEXT: lea %s16, 256693; CHECK-NEXT: lvl %s16694; CHECK-NEXT: vor %v0, (0)1, %v1695; CHECK-NEXT: b.l.t (, %s10)696 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvsvl(<256 x double> %0, i32 8, <256 x double> %1, i32 128)697 ret <256 x double> %3698}699 700; Function Attrs: nounwind readnone701define fastcc <256 x double> @vdivswsx_vvsmvl(<256 x double> %0, i32 signext %1, <256 x i1> %2, <256 x double> %3) {702; CHECK-LABEL: vdivswsx_vvsmvl:703; CHECK: # %bb.0:704; CHECK-NEXT: and %s0, %s0, (32)0705; CHECK-NEXT: lea %s1, 128706; CHECK-NEXT: lvl %s1707; CHECK-NEXT: vdivs.w.sx %v1, %v0, %s0, %vm1708; CHECK-NEXT: lea %s16, 256709; CHECK-NEXT: lvl %s16710; CHECK-NEXT: vor %v0, (0)1, %v1711; CHECK-NEXT: b.l.t (, %s10)712 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvsmvl(<256 x double> %0, i32 %1, <256 x i1> %2, <256 x double> %3, i32 128)713 ret <256 x double> %5714}715 716; Function Attrs: nounwind readnone717declare <256 x double> @llvm.ve.vl.vdivswsx.vvsmvl(<256 x double>, i32, <256 x i1>, <256 x double>, i32)718 719; Function Attrs: nounwind readnone720define fastcc <256 x double> @vdivswsx_vvsmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {721; CHECK-LABEL: vdivswsx_vvsmvl_imm:722; CHECK: # %bb.0:723; CHECK-NEXT: lea %s0, 128724; CHECK-NEXT: lvl %s0725; CHECK-NEXT: vdivs.w.sx %v1, %v0, 8, %vm1726; CHECK-NEXT: lea %s16, 256727; CHECK-NEXT: lvl %s16728; CHECK-NEXT: vor %v0, (0)1, %v1729; CHECK-NEXT: b.l.t (, %s10)730 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswsx.vvsmvl(<256 x double> %0, i32 8, <256 x i1> %1, <256 x double> %2, i32 128)731 ret <256 x double> %4732}733 734; Function Attrs: nounwind readnone735define fastcc <256 x double> @vdivswzx_vvvl(<256 x double> %0, <256 x double> %1) {736; CHECK-LABEL: vdivswzx_vvvl:737; CHECK: # %bb.0:738; CHECK-NEXT: lea %s0, 256739; CHECK-NEXT: lvl %s0740; CHECK-NEXT: vdivs.w.zx %v0, %v0, %v1741; CHECK-NEXT: b.l.t (, %s10)742 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)743 ret <256 x double> %3744}745 746; Function Attrs: nounwind readnone747declare <256 x double> @llvm.ve.vl.vdivswzx.vvvl(<256 x double>, <256 x double>, i32)748 749; Function Attrs: nounwind readnone750define fastcc <256 x double> @vdivswzx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {751; CHECK-LABEL: vdivswzx_vvvvl:752; CHECK: # %bb.0:753; CHECK-NEXT: lea %s0, 128754; CHECK-NEXT: lvl %s0755; CHECK-NEXT: vdivs.w.zx %v2, %v0, %v1756; CHECK-NEXT: lea %s16, 256757; CHECK-NEXT: lvl %s16758; CHECK-NEXT: vor %v0, (0)1, %v2759; CHECK-NEXT: b.l.t (, %s10)760 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)761 ret <256 x double> %4762}763 764; Function Attrs: nounwind readnone765declare <256 x double> @llvm.ve.vl.vdivswzx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)766 767; Function Attrs: nounwind readnone768define fastcc <256 x double> @vdivswzx_vsvl(i32 signext %0, <256 x double> %1) {769; CHECK-LABEL: vdivswzx_vsvl:770; CHECK: # %bb.0:771; CHECK-NEXT: and %s0, %s0, (32)0772; CHECK-NEXT: lea %s1, 256773; CHECK-NEXT: lvl %s1774; CHECK-NEXT: vdivs.w.zx %v0, %s0, %v0775; CHECK-NEXT: b.l.t (, %s10)776 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vsvl(i32 %0, <256 x double> %1, i32 256)777 ret <256 x double> %3778}779 780; Function Attrs: nounwind readnone781declare <256 x double> @llvm.ve.vl.vdivswzx.vsvl(i32, <256 x double>, i32)782 783; Function Attrs: nounwind readnone784define fastcc <256 x double> @vdivswzx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {785; CHECK-LABEL: vdivswzx_vsvvl:786; CHECK: # %bb.0:787; CHECK-NEXT: and %s0, %s0, (32)0788; CHECK-NEXT: lea %s1, 128789; CHECK-NEXT: lvl %s1790; CHECK-NEXT: vdivs.w.zx %v1, %s0, %v0791; CHECK-NEXT: lea %s16, 256792; CHECK-NEXT: lvl %s16793; CHECK-NEXT: vor %v0, (0)1, %v1794; CHECK-NEXT: b.l.t (, %s10)795 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)796 ret <256 x double> %4797}798 799; Function Attrs: nounwind readnone800declare <256 x double> @llvm.ve.vl.vdivswzx.vsvvl(i32, <256 x double>, <256 x double>, i32)801 802; Function Attrs: nounwind readnone803define fastcc <256 x double> @vdivswzx_vsvl_imm(<256 x double> %0) {804; CHECK-LABEL: vdivswzx_vsvl_imm:805; CHECK: # %bb.0:806; CHECK-NEXT: lea %s0, 256807; CHECK-NEXT: lvl %s0808; CHECK-NEXT: vdivs.w.zx %v0, 8, %v0809; CHECK-NEXT: b.l.t (, %s10)810 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vsvl(i32 8, <256 x double> %0, i32 256)811 ret <256 x double> %2812}813 814; Function Attrs: nounwind readnone815define fastcc <256 x double> @vdivswzx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {816; CHECK-LABEL: vdivswzx_vsvvl_imm:817; CHECK: # %bb.0:818; CHECK-NEXT: lea %s0, 128819; CHECK-NEXT: lvl %s0820; CHECK-NEXT: vdivs.w.zx %v1, 8, %v0821; CHECK-NEXT: lea %s16, 256822; CHECK-NEXT: lvl %s16823; CHECK-NEXT: vor %v0, (0)1, %v1824; CHECK-NEXT: b.l.t (, %s10)825 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)826 ret <256 x double> %3827}828 829; Function Attrs: nounwind readnone830define fastcc <256 x double> @vdivswzx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {831; CHECK-LABEL: vdivswzx_vvvmvl:832; CHECK: # %bb.0:833; CHECK-NEXT: lea %s0, 128834; CHECK-NEXT: lvl %s0835; CHECK-NEXT: vdivs.w.zx %v2, %v0, %v1, %vm1836; CHECK-NEXT: lea %s16, 256837; CHECK-NEXT: lvl %s16838; CHECK-NEXT: vor %v0, (0)1, %v2839; CHECK-NEXT: b.l.t (, %s10)840 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)841 ret <256 x double> %5842}843 844; Function Attrs: nounwind readnone845declare <256 x double> @llvm.ve.vl.vdivswzx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)846 847; Function Attrs: nounwind readnone848define fastcc <256 x double> @vdivswzx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {849; CHECK-LABEL: vdivswzx_vsvmvl:850; CHECK: # %bb.0:851; CHECK-NEXT: and %s0, %s0, (32)0852; CHECK-NEXT: lea %s1, 128853; CHECK-NEXT: lvl %s1854; CHECK-NEXT: vdivs.w.zx %v1, %s0, %v0, %vm1855; CHECK-NEXT: lea %s16, 256856; CHECK-NEXT: lvl %s16857; CHECK-NEXT: vor %v0, (0)1, %v1858; CHECK-NEXT: b.l.t (, %s10)859 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)860 ret <256 x double> %5861}862 863; Function Attrs: nounwind readnone864declare <256 x double> @llvm.ve.vl.vdivswzx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)865 866; Function Attrs: nounwind readnone867define fastcc <256 x double> @vdivswzx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {868; CHECK-LABEL: vdivswzx_vsvmvl_imm:869; CHECK: # %bb.0:870; CHECK-NEXT: lea %s0, 128871; CHECK-NEXT: lvl %s0872; CHECK-NEXT: vdivs.w.zx %v1, 8, %v0, %vm1873; CHECK-NEXT: lea %s16, 256874; CHECK-NEXT: lvl %s16875; CHECK-NEXT: vor %v0, (0)1, %v1876; CHECK-NEXT: b.l.t (, %s10)877 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)878 ret <256 x double> %4879}880 881; Function Attrs: nounwind readnone882define fastcc <256 x double> @vdivswzx_vvsl(<256 x double> %0, i32 signext %1) {883; CHECK-LABEL: vdivswzx_vvsl:884; CHECK: # %bb.0:885; CHECK-NEXT: and %s0, %s0, (32)0886; CHECK-NEXT: lea %s1, 256887; CHECK-NEXT: lvl %s1888; CHECK-NEXT: vdivs.w.zx %v0, %v0, %s0889; CHECK-NEXT: b.l.t (, %s10)890 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvsl(<256 x double> %0, i32 %1, i32 256)891 ret <256 x double> %3892}893 894; Function Attrs: nounwind readnone895declare <256 x double> @llvm.ve.vl.vdivswzx.vvsl(<256 x double>, i32, i32)896 897; Function Attrs: nounwind readnone898define fastcc <256 x double> @vdivswzx_vvsvl(<256 x double> %0, i32 signext %1, <256 x double> %2) {899; CHECK-LABEL: vdivswzx_vvsvl:900; CHECK: # %bb.0:901; CHECK-NEXT: and %s0, %s0, (32)0902; CHECK-NEXT: lea %s1, 128903; CHECK-NEXT: lvl %s1904; CHECK-NEXT: vdivs.w.zx %v1, %v0, %s0905; CHECK-NEXT: lea %s16, 256906; CHECK-NEXT: lvl %s16907; CHECK-NEXT: vor %v0, (0)1, %v1908; CHECK-NEXT: b.l.t (, %s10)909 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvsvl(<256 x double> %0, i32 %1, <256 x double> %2, i32 128)910 ret <256 x double> %4911}912 913; Function Attrs: nounwind readnone914declare <256 x double> @llvm.ve.vl.vdivswzx.vvsvl(<256 x double>, i32, <256 x double>, i32)915 916; Function Attrs: nounwind readnone917define fastcc <256 x double> @vdivswzx_vvsl_imm(<256 x double> %0) {918; CHECK-LABEL: vdivswzx_vvsl_imm:919; CHECK: # %bb.0:920; CHECK-NEXT: lea %s0, 256921; CHECK-NEXT: lvl %s0922; CHECK-NEXT: vdivs.w.zx %v0, %v0, 8923; CHECK-NEXT: b.l.t (, %s10)924 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvsl(<256 x double> %0, i32 8, i32 256)925 ret <256 x double> %2926}927 928; Function Attrs: nounwind readnone929define fastcc <256 x double> @vdivswzx_vvsvl_imm(<256 x double> %0, <256 x double> %1) {930; CHECK-LABEL: vdivswzx_vvsvl_imm:931; CHECK: # %bb.0:932; CHECK-NEXT: lea %s0, 128933; CHECK-NEXT: lvl %s0934; CHECK-NEXT: vdivs.w.zx %v1, %v0, 8935; CHECK-NEXT: lea %s16, 256936; CHECK-NEXT: lvl %s16937; CHECK-NEXT: vor %v0, (0)1, %v1938; CHECK-NEXT: b.l.t (, %s10)939 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvsvl(<256 x double> %0, i32 8, <256 x double> %1, i32 128)940 ret <256 x double> %3941}942 943; Function Attrs: nounwind readnone944define fastcc <256 x double> @vdivswzx_vvsmvl(<256 x double> %0, i32 signext %1, <256 x i1> %2, <256 x double> %3) {945; CHECK-LABEL: vdivswzx_vvsmvl:946; CHECK: # %bb.0:947; CHECK-NEXT: and %s0, %s0, (32)0948; CHECK-NEXT: lea %s1, 128949; CHECK-NEXT: lvl %s1950; CHECK-NEXT: vdivs.w.zx %v1, %v0, %s0, %vm1951; CHECK-NEXT: lea %s16, 256952; CHECK-NEXT: lvl %s16953; CHECK-NEXT: vor %v0, (0)1, %v1954; CHECK-NEXT: b.l.t (, %s10)955 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvsmvl(<256 x double> %0, i32 %1, <256 x i1> %2, <256 x double> %3, i32 128)956 ret <256 x double> %5957}958 959; Function Attrs: nounwind readnone960declare <256 x double> @llvm.ve.vl.vdivswzx.vvsmvl(<256 x double>, i32, <256 x i1>, <256 x double>, i32)961 962; Function Attrs: nounwind readnone963define fastcc <256 x double> @vdivswzx_vvsmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {964; CHECK-LABEL: vdivswzx_vvsmvl_imm:965; CHECK: # %bb.0:966; CHECK-NEXT: lea %s0, 128967; CHECK-NEXT: lvl %s0968; CHECK-NEXT: vdivs.w.zx %v1, %v0, 8, %vm1969; CHECK-NEXT: lea %s16, 256970; CHECK-NEXT: lvl %s16971; CHECK-NEXT: vor %v0, (0)1, %v1972; CHECK-NEXT: b.l.t (, %s10)973 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivswzx.vvsmvl(<256 x double> %0, i32 8, <256 x i1> %1, <256 x double> %2, i32 128)974 ret <256 x double> %4975}976 977; Function Attrs: nounwind readnone978define fastcc <256 x double> @vdivsl_vvvl(<256 x double> %0, <256 x double> %1) {979; CHECK-LABEL: vdivsl_vvvl:980; CHECK: # %bb.0:981; CHECK-NEXT: lea %s0, 256982; CHECK-NEXT: lvl %s0983; CHECK-NEXT: vdivs.l %v0, %v0, %v1984; CHECK-NEXT: b.l.t (, %s10)985 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvvl(<256 x double> %0, <256 x double> %1, i32 256)986 ret <256 x double> %3987}988 989; Function Attrs: nounwind readnone990declare <256 x double> @llvm.ve.vl.vdivsl.vvvl(<256 x double>, <256 x double>, i32)991 992; Function Attrs: nounwind readnone993define fastcc <256 x double> @vdivsl_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {994; CHECK-LABEL: vdivsl_vvvvl:995; CHECK: # %bb.0:996; CHECK-NEXT: lea %s0, 128997; CHECK-NEXT: lvl %s0998; CHECK-NEXT: vdivs.l %v2, %v0, %v1999; CHECK-NEXT: lea %s16, 2561000; CHECK-NEXT: lvl %s161001; CHECK-NEXT: vor %v0, (0)1, %v21002; CHECK-NEXT: b.l.t (, %s10)1003 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)1004 ret <256 x double> %41005}1006 1007; Function Attrs: nounwind readnone1008declare <256 x double> @llvm.ve.vl.vdivsl.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)1009 1010; Function Attrs: nounwind readnone1011define fastcc <256 x double> @vdivsl_vsvl(i64 %0, <256 x double> %1) {1012; CHECK-LABEL: vdivsl_vsvl:1013; CHECK: # %bb.0:1014; CHECK-NEXT: lea %s1, 2561015; CHECK-NEXT: lvl %s11016; CHECK-NEXT: vdivs.l %v0, %s0, %v01017; CHECK-NEXT: b.l.t (, %s10)1018 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vsvl(i64 %0, <256 x double> %1, i32 256)1019 ret <256 x double> %31020}1021 1022; Function Attrs: nounwind readnone1023declare <256 x double> @llvm.ve.vl.vdivsl.vsvl(i64, <256 x double>, i32)1024 1025; Function Attrs: nounwind readnone1026define fastcc <256 x double> @vdivsl_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {1027; CHECK-LABEL: vdivsl_vsvvl:1028; CHECK: # %bb.0:1029; CHECK-NEXT: lea %s1, 1281030; CHECK-NEXT: lvl %s11031; CHECK-NEXT: vdivs.l %v1, %s0, %v01032; CHECK-NEXT: lea %s16, 2561033; CHECK-NEXT: lvl %s161034; CHECK-NEXT: vor %v0, (0)1, %v11035; CHECK-NEXT: b.l.t (, %s10)1036 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)1037 ret <256 x double> %41038}1039 1040; Function Attrs: nounwind readnone1041declare <256 x double> @llvm.ve.vl.vdivsl.vsvvl(i64, <256 x double>, <256 x double>, i32)1042 1043; Function Attrs: nounwind readnone1044define fastcc <256 x double> @vdivsl_vsvl_imm(<256 x double> %0) {1045; CHECK-LABEL: vdivsl_vsvl_imm:1046; CHECK: # %bb.0:1047; CHECK-NEXT: lea %s0, 2561048; CHECK-NEXT: lvl %s01049; CHECK-NEXT: vdivs.l %v0, 8, %v01050; CHECK-NEXT: b.l.t (, %s10)1051 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vsvl(i64 8, <256 x double> %0, i32 256)1052 ret <256 x double> %21053}1054 1055; Function Attrs: nounwind readnone1056define fastcc <256 x double> @vdivsl_vsvvl_imm(<256 x double> %0, <256 x double> %1) {1057; CHECK-LABEL: vdivsl_vsvvl_imm:1058; CHECK: # %bb.0:1059; CHECK-NEXT: lea %s0, 1281060; CHECK-NEXT: lvl %s01061; CHECK-NEXT: vdivs.l %v1, 8, %v01062; CHECK-NEXT: lea %s16, 2561063; CHECK-NEXT: lvl %s161064; CHECK-NEXT: vor %v0, (0)1, %v11065; CHECK-NEXT: b.l.t (, %s10)1066 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)1067 ret <256 x double> %31068}1069 1070; Function Attrs: nounwind readnone1071define fastcc <256 x double> @vdivsl_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {1072; CHECK-LABEL: vdivsl_vvvmvl:1073; CHECK: # %bb.0:1074; CHECK-NEXT: lea %s0, 1281075; CHECK-NEXT: lvl %s01076; CHECK-NEXT: vdivs.l %v2, %v0, %v1, %vm11077; CHECK-NEXT: lea %s16, 2561078; CHECK-NEXT: lvl %s161079; CHECK-NEXT: vor %v0, (0)1, %v21080; CHECK-NEXT: b.l.t (, %s10)1081 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)1082 ret <256 x double> %51083}1084 1085; Function Attrs: nounwind readnone1086declare <256 x double> @llvm.ve.vl.vdivsl.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)1087 1088; Function Attrs: nounwind readnone1089define fastcc <256 x double> @vdivsl_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {1090; CHECK-LABEL: vdivsl_vsvmvl:1091; CHECK: # %bb.0:1092; CHECK-NEXT: lea %s1, 1281093; CHECK-NEXT: lvl %s11094; CHECK-NEXT: vdivs.l %v1, %s0, %v0, %vm11095; CHECK-NEXT: lea %s16, 2561096; CHECK-NEXT: lvl %s161097; CHECK-NEXT: vor %v0, (0)1, %v11098; CHECK-NEXT: b.l.t (, %s10)1099 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)1100 ret <256 x double> %51101}1102 1103; Function Attrs: nounwind readnone1104declare <256 x double> @llvm.ve.vl.vdivsl.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)1105 1106; Function Attrs: nounwind readnone1107define fastcc <256 x double> @vdivsl_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {1108; CHECK-LABEL: vdivsl_vsvmvl_imm:1109; CHECK: # %bb.0:1110; CHECK-NEXT: lea %s0, 1281111; CHECK-NEXT: lvl %s01112; CHECK-NEXT: vdivs.l %v1, 8, %v0, %vm11113; CHECK-NEXT: lea %s16, 2561114; CHECK-NEXT: lvl %s161115; CHECK-NEXT: vor %v0, (0)1, %v11116; CHECK-NEXT: b.l.t (, %s10)1117 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)1118 ret <256 x double> %41119}1120 1121; Function Attrs: nounwind readnone1122define fastcc <256 x double> @vdivsl_vvsl(<256 x double> %0, i64 %1) {1123; CHECK-LABEL: vdivsl_vvsl:1124; CHECK: # %bb.0:1125; CHECK-NEXT: lea %s1, 2561126; CHECK-NEXT: lvl %s11127; CHECK-NEXT: vdivs.l %v0, %v0, %s01128; CHECK-NEXT: b.l.t (, %s10)1129 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvsl(<256 x double> %0, i64 %1, i32 256)1130 ret <256 x double> %31131}1132 1133; Function Attrs: nounwind readnone1134declare <256 x double> @llvm.ve.vl.vdivsl.vvsl(<256 x double>, i64, i32)1135 1136; Function Attrs: nounwind readnone1137define fastcc <256 x double> @vdivsl_vvsvl(<256 x double> %0, i64 %1, <256 x double> %2) {1138; CHECK-LABEL: vdivsl_vvsvl:1139; CHECK: # %bb.0:1140; CHECK-NEXT: lea %s1, 1281141; CHECK-NEXT: lvl %s11142; CHECK-NEXT: vdivs.l %v1, %v0, %s01143; CHECK-NEXT: lea %s16, 2561144; CHECK-NEXT: lvl %s161145; CHECK-NEXT: vor %v0, (0)1, %v11146; CHECK-NEXT: b.l.t (, %s10)1147 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvsvl(<256 x double> %0, i64 %1, <256 x double> %2, i32 128)1148 ret <256 x double> %41149}1150 1151; Function Attrs: nounwind readnone1152declare <256 x double> @llvm.ve.vl.vdivsl.vvsvl(<256 x double>, i64, <256 x double>, i32)1153 1154; Function Attrs: nounwind readnone1155define fastcc <256 x double> @vdivsl_vvsl_imm(<256 x double> %0) {1156; CHECK-LABEL: vdivsl_vvsl_imm:1157; CHECK: # %bb.0:1158; CHECK-NEXT: lea %s0, 2561159; CHECK-NEXT: lvl %s01160; CHECK-NEXT: vdivs.l %v0, %v0, 81161; CHECK-NEXT: b.l.t (, %s10)1162 %2 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvsl(<256 x double> %0, i64 8, i32 256)1163 ret <256 x double> %21164}1165 1166; Function Attrs: nounwind readnone1167define fastcc <256 x double> @vdivsl_vvsvl_imm(<256 x double> %0, <256 x double> %1) {1168; CHECK-LABEL: vdivsl_vvsvl_imm:1169; CHECK: # %bb.0:1170; CHECK-NEXT: lea %s0, 1281171; CHECK-NEXT: lvl %s01172; CHECK-NEXT: vdivs.l %v1, %v0, 81173; CHECK-NEXT: lea %s16, 2561174; CHECK-NEXT: lvl %s161175; CHECK-NEXT: vor %v0, (0)1, %v11176; CHECK-NEXT: b.l.t (, %s10)1177 %3 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvsvl(<256 x double> %0, i64 8, <256 x double> %1, i32 128)1178 ret <256 x double> %31179}1180 1181; Function Attrs: nounwind readnone1182define fastcc <256 x double> @vdivsl_vvsmvl(<256 x double> %0, i64 %1, <256 x i1> %2, <256 x double> %3) {1183; CHECK-LABEL: vdivsl_vvsmvl:1184; CHECK: # %bb.0:1185; CHECK-NEXT: lea %s1, 1281186; CHECK-NEXT: lvl %s11187; CHECK-NEXT: vdivs.l %v1, %v0, %s0, %vm11188; CHECK-NEXT: lea %s16, 2561189; CHECK-NEXT: lvl %s161190; CHECK-NEXT: vor %v0, (0)1, %v11191; CHECK-NEXT: b.l.t (, %s10)1192 %5 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvsmvl(<256 x double> %0, i64 %1, <256 x i1> %2, <256 x double> %3, i32 128)1193 ret <256 x double> %51194}1195 1196; Function Attrs: nounwind readnone1197declare <256 x double> @llvm.ve.vl.vdivsl.vvsmvl(<256 x double>, i64, <256 x i1>, <256 x double>, i32)1198 1199; Function Attrs: nounwind readnone1200define fastcc <256 x double> @vdivsl_vvsmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {1201; CHECK-LABEL: vdivsl_vvsmvl_imm:1202; CHECK: # %bb.0:1203; CHECK-NEXT: lea %s0, 1281204; CHECK-NEXT: lvl %s01205; CHECK-NEXT: vdivs.l %v1, %v0, 8, %vm11206; CHECK-NEXT: lea %s16, 2561207; CHECK-NEXT: lvl %s161208; CHECK-NEXT: vor %v0, (0)1, %v11209; CHECK-NEXT: b.l.t (, %s10)1210 %4 = tail call fast <256 x double> @llvm.ve.vl.vdivsl.vvsmvl(<256 x double> %0, i64 8, <256 x i1> %1, <256 x double> %2, i32 128)1211 ret <256 x double> %41212}1213