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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector floating fused multiply add intrinsic instructions4;;;5;;; Note:6;;; We test VFMAD*vvvl, VFMAD*vvvl_v, VFMAD*rvvl, VFMAD*rvvl_v, VFMAD*vrvl,7;;; VFMAD*vrvl_v, VFMAD*vvvml_v, VFMAD*rvvml_v, VFMAD*vrvml_v, PVFMAD*vvvl,8;;; PVFMAD*vvvl_v, PVFMAD*rvvl, PVFMAD*rvvl_v, PVFMAD*vrvl, PVFMAD*vrvl_v,9;;; PVFMAD*vvvml_v, PVFMAD*rvvml_v, and PVFMAD*vrvml_v instructions.10 11; Function Attrs: nounwind readnone12define fastcc <256 x double> @vfmadd_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {13; CHECK-LABEL: vfmadd_vvvvl:14; CHECK: # %bb.0:15; CHECK-NEXT: lea %s0, 25616; CHECK-NEXT: lvl %s017; CHECK-NEXT: vfmad.d %v0, %v0, %v1, %v218; CHECK-NEXT: b.l.t (, %s10)19 %4 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 256)20 ret <256 x double> %421}22 23; Function Attrs: nounwind readnone24declare <256 x double> @llvm.ve.vl.vfmadd.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)25 26; Function Attrs: nounwind readnone27define fastcc <256 x double> @vfmadd_vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {28; CHECK-LABEL: vfmadd_vvvvvl:29; CHECK: # %bb.0:30; CHECK-NEXT: lea %s0, 12831; CHECK-NEXT: lvl %s032; CHECK-NEXT: vfmad.d %v3, %v0, %v1, %v233; CHECK-NEXT: lea %s16, 25634; CHECK-NEXT: lvl %s1635; CHECK-NEXT: vor %v0, (0)1, %v336; CHECK-NEXT: b.l.t (, %s10)37 %5 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)38 ret <256 x double> %539}40 41; Function Attrs: nounwind readnone42declare <256 x double> @llvm.ve.vl.vfmadd.vvvvvl(<256 x double>, <256 x double>, <256 x double>, <256 x double>, i32)43 44; Function Attrs: nounwind readnone45define fastcc <256 x double> @vfmadd_vsvvl(double %0, <256 x double> %1, <256 x double> %2) {46; CHECK-LABEL: vfmadd_vsvvl:47; CHECK: # %bb.0:48; CHECK-NEXT: lea %s1, 25649; CHECK-NEXT: lvl %s150; CHECK-NEXT: vfmad.d %v0, %s0, %v0, %v151; CHECK-NEXT: b.l.t (, %s10)52 %4 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vsvvl(double %0, <256 x double> %1, <256 x double> %2, i32 256)53 ret <256 x double> %454}55 56; Function Attrs: nounwind readnone57declare <256 x double> @llvm.ve.vl.vfmadd.vsvvl(double, <256 x double>, <256 x double>, i32)58 59; Function Attrs: nounwind readnone60define fastcc <256 x double> @vfmadd_vsvvvl(double %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {61; CHECK-LABEL: vfmadd_vsvvvl:62; CHECK: # %bb.0:63; CHECK-NEXT: lea %s1, 12864; CHECK-NEXT: lvl %s165; CHECK-NEXT: vfmad.d %v2, %s0, %v0, %v166; CHECK-NEXT: lea %s16, 25667; CHECK-NEXT: lvl %s1668; CHECK-NEXT: vor %v0, (0)1, %v269; CHECK-NEXT: b.l.t (, %s10)70 %5 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vsvvvl(double %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)71 ret <256 x double> %572}73 74; Function Attrs: nounwind readnone75declare <256 x double> @llvm.ve.vl.vfmadd.vsvvvl(double, <256 x double>, <256 x double>, <256 x double>, i32)76 77; Function Attrs: nounwind readnone78define fastcc <256 x double> @vfmadd_vvsvl(<256 x double> %0, double %1, <256 x double> %2) {79; CHECK-LABEL: vfmadd_vvsvl:80; CHECK: # %bb.0:81; CHECK-NEXT: lea %s1, 25682; CHECK-NEXT: lvl %s183; CHECK-NEXT: vfmad.d %v0, %v0, %s0, %v184; CHECK-NEXT: b.l.t (, %s10)85 %4 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvsvl(<256 x double> %0, double %1, <256 x double> %2, i32 256)86 ret <256 x double> %487}88 89; Function Attrs: nounwind readnone90declare <256 x double> @llvm.ve.vl.vfmadd.vvsvl(<256 x double>, double, <256 x double>, i32)91 92; Function Attrs: nounwind readnone93define fastcc <256 x double> @vfmadd_vvsvvl(<256 x double> %0, double %1, <256 x double> %2, <256 x double> %3) {94; CHECK-LABEL: vfmadd_vvsvvl:95; CHECK: # %bb.0:96; CHECK-NEXT: lea %s1, 12897; CHECK-NEXT: lvl %s198; CHECK-NEXT: vfmad.d %v2, %v0, %s0, %v199; CHECK-NEXT: lea %s16, 256100; CHECK-NEXT: lvl %s16101; CHECK-NEXT: vor %v0, (0)1, %v2102; CHECK-NEXT: b.l.t (, %s10)103 %5 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvsvvl(<256 x double> %0, double %1, <256 x double> %2, <256 x double> %3, i32 128)104 ret <256 x double> %5105}106 107; Function Attrs: nounwind readnone108declare <256 x double> @llvm.ve.vl.vfmadd.vvsvvl(<256 x double>, double, <256 x double>, <256 x double>, i32)109 110; Function Attrs: nounwind readnone111define fastcc <256 x double> @vfmadd_vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {112; CHECK-LABEL: vfmadd_vvvvmvl:113; CHECK: # %bb.0:114; CHECK-NEXT: lea %s0, 128115; CHECK-NEXT: lvl %s0116; CHECK-NEXT: vfmad.d %v3, %v0, %v1, %v2, %vm1117; CHECK-NEXT: lea %s16, 256118; CHECK-NEXT: lvl %s16119; CHECK-NEXT: vor %v0, (0)1, %v3120; CHECK-NEXT: b.l.t (, %s10)121 %6 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)122 ret <256 x double> %6123}124 125; Function Attrs: nounwind readnone126declare <256 x double> @llvm.ve.vl.vfmadd.vvvvmvl(<256 x double>, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)127 128; Function Attrs: nounwind readnone129define fastcc <256 x double> @vfmadd_vsvvmvl(double %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {130; CHECK-LABEL: vfmadd_vsvvmvl:131; CHECK: # %bb.0:132; CHECK-NEXT: lea %s1, 128133; CHECK-NEXT: lvl %s1134; CHECK-NEXT: vfmad.d %v2, %s0, %v0, %v1, %vm1135; CHECK-NEXT: lea %s16, 256136; CHECK-NEXT: lvl %s16137; CHECK-NEXT: vor %v0, (0)1, %v2138; CHECK-NEXT: b.l.t (, %s10)139 %6 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vsvvmvl(double %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)140 ret <256 x double> %6141}142 143; Function Attrs: nounwind readnone144declare <256 x double> @llvm.ve.vl.vfmadd.vsvvmvl(double, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)145 146; Function Attrs: nounwind readnone147define fastcc <256 x double> @vfmadd_vvsvmvl(<256 x double> %0, double %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {148; CHECK-LABEL: vfmadd_vvsvmvl:149; CHECK: # %bb.0:150; CHECK-NEXT: lea %s1, 128151; CHECK-NEXT: lvl %s1152; CHECK-NEXT: vfmad.d %v2, %v0, %s0, %v1, %vm1153; CHECK-NEXT: lea %s16, 256154; CHECK-NEXT: lvl %s16155; CHECK-NEXT: vor %v0, (0)1, %v2156; CHECK-NEXT: b.l.t (, %s10)157 %6 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvsvmvl(<256 x double> %0, double %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)158 ret <256 x double> %6159}160 161; Function Attrs: nounwind readnone162declare <256 x double> @llvm.ve.vl.vfmadd.vvsvmvl(<256 x double>, double, <256 x double>, <256 x i1>, <256 x double>, i32)163 164; Function Attrs: nounwind readnone165define fastcc <256 x double> @vfmads_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {166; CHECK-LABEL: vfmads_vvvvl:167; CHECK: # %bb.0:168; CHECK-NEXT: lea %s0, 256169; CHECK-NEXT: lvl %s0170; CHECK-NEXT: vfmad.s %v0, %v0, %v1, %v2171; CHECK-NEXT: b.l.t (, %s10)172 %4 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 256)173 ret <256 x double> %4174}175 176; Function Attrs: nounwind readnone177declare <256 x double> @llvm.ve.vl.vfmads.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)178 179; Function Attrs: nounwind readnone180define fastcc <256 x double> @vfmads_vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {181; CHECK-LABEL: vfmads_vvvvvl:182; CHECK: # %bb.0:183; CHECK-NEXT: lea %s0, 128184; CHECK-NEXT: lvl %s0185; CHECK-NEXT: vfmad.s %v3, %v0, %v1, %v2186; CHECK-NEXT: lea %s16, 256187; CHECK-NEXT: lvl %s16188; CHECK-NEXT: vor %v0, (0)1, %v3189; CHECK-NEXT: b.l.t (, %s10)190 %5 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)191 ret <256 x double> %5192}193 194; Function Attrs: nounwind readnone195declare <256 x double> @llvm.ve.vl.vfmads.vvvvvl(<256 x double>, <256 x double>, <256 x double>, <256 x double>, i32)196 197; Function Attrs: nounwind readnone198define fastcc <256 x double> @vfmads_vsvvl(float %0, <256 x double> %1, <256 x double> %2) {199; CHECK-LABEL: vfmads_vsvvl:200; CHECK: # %bb.0:201; CHECK-NEXT: lea %s1, 256202; CHECK-NEXT: lvl %s1203; CHECK-NEXT: vfmad.s %v0, %s0, %v0, %v1204; CHECK-NEXT: b.l.t (, %s10)205 %4 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vsvvl(float %0, <256 x double> %1, <256 x double> %2, i32 256)206 ret <256 x double> %4207}208 209; Function Attrs: nounwind readnone210declare <256 x double> @llvm.ve.vl.vfmads.vsvvl(float, <256 x double>, <256 x double>, i32)211 212; Function Attrs: nounwind readnone213define fastcc <256 x double> @vfmads_vsvvvl(float %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {214; CHECK-LABEL: vfmads_vsvvvl:215; CHECK: # %bb.0:216; CHECK-NEXT: lea %s1, 128217; CHECK-NEXT: lvl %s1218; CHECK-NEXT: vfmad.s %v2, %s0, %v0, %v1219; CHECK-NEXT: lea %s16, 256220; CHECK-NEXT: lvl %s16221; CHECK-NEXT: vor %v0, (0)1, %v2222; CHECK-NEXT: b.l.t (, %s10)223 %5 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vsvvvl(float %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)224 ret <256 x double> %5225}226 227; Function Attrs: nounwind readnone228declare <256 x double> @llvm.ve.vl.vfmads.vsvvvl(float, <256 x double>, <256 x double>, <256 x double>, i32)229 230; Function Attrs: nounwind readnone231define fastcc <256 x double> @vfmads_vvsvl(<256 x double> %0, float %1, <256 x double> %2) {232; CHECK-LABEL: vfmads_vvsvl:233; CHECK: # %bb.0:234; CHECK-NEXT: lea %s1, 256235; CHECK-NEXT: lvl %s1236; CHECK-NEXT: vfmad.s %v0, %v0, %s0, %v1237; CHECK-NEXT: b.l.t (, %s10)238 %4 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvsvl(<256 x double> %0, float %1, <256 x double> %2, i32 256)239 ret <256 x double> %4240}241 242; Function Attrs: nounwind readnone243declare <256 x double> @llvm.ve.vl.vfmads.vvsvl(<256 x double>, float, <256 x double>, i32)244 245; Function Attrs: nounwind readnone246define fastcc <256 x double> @vfmads_vvsvvl(<256 x double> %0, float %1, <256 x double> %2, <256 x double> %3) {247; CHECK-LABEL: vfmads_vvsvvl:248; CHECK: # %bb.0:249; CHECK-NEXT: lea %s1, 128250; CHECK-NEXT: lvl %s1251; CHECK-NEXT: vfmad.s %v2, %v0, %s0, %v1252; CHECK-NEXT: lea %s16, 256253; CHECK-NEXT: lvl %s16254; CHECK-NEXT: vor %v0, (0)1, %v2255; CHECK-NEXT: b.l.t (, %s10)256 %5 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvsvvl(<256 x double> %0, float %1, <256 x double> %2, <256 x double> %3, i32 128)257 ret <256 x double> %5258}259 260; Function Attrs: nounwind readnone261declare <256 x double> @llvm.ve.vl.vfmads.vvsvvl(<256 x double>, float, <256 x double>, <256 x double>, i32)262 263; Function Attrs: nounwind readnone264define fastcc <256 x double> @vfmads_vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {265; CHECK-LABEL: vfmads_vvvvmvl:266; CHECK: # %bb.0:267; CHECK-NEXT: lea %s0, 128268; CHECK-NEXT: lvl %s0269; CHECK-NEXT: vfmad.s %v3, %v0, %v1, %v2, %vm1270; CHECK-NEXT: lea %s16, 256271; CHECK-NEXT: lvl %s16272; CHECK-NEXT: vor %v0, (0)1, %v3273; CHECK-NEXT: b.l.t (, %s10)274 %6 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)275 ret <256 x double> %6276}277 278; Function Attrs: nounwind readnone279declare <256 x double> @llvm.ve.vl.vfmads.vvvvmvl(<256 x double>, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)280 281; Function Attrs: nounwind readnone282define fastcc <256 x double> @vfmads_vsvvmvl(float %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {283; CHECK-LABEL: vfmads_vsvvmvl:284; CHECK: # %bb.0:285; CHECK-NEXT: lea %s1, 128286; CHECK-NEXT: lvl %s1287; CHECK-NEXT: vfmad.s %v2, %s0, %v0, %v1, %vm1288; CHECK-NEXT: lea %s16, 256289; CHECK-NEXT: lvl %s16290; CHECK-NEXT: vor %v0, (0)1, %v2291; CHECK-NEXT: b.l.t (, %s10)292 %6 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vsvvmvl(float %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)293 ret <256 x double> %6294}295 296; Function Attrs: nounwind readnone297declare <256 x double> @llvm.ve.vl.vfmads.vsvvmvl(float, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)298 299; Function Attrs: nounwind readnone300define fastcc <256 x double> @vfmads_vvsvmvl(<256 x double> %0, float %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {301; CHECK-LABEL: vfmads_vvsvmvl:302; CHECK: # %bb.0:303; CHECK-NEXT: lea %s1, 128304; CHECK-NEXT: lvl %s1305; CHECK-NEXT: vfmad.s %v2, %v0, %s0, %v1, %vm1306; CHECK-NEXT: lea %s16, 256307; CHECK-NEXT: lvl %s16308; CHECK-NEXT: vor %v0, (0)1, %v2309; CHECK-NEXT: b.l.t (, %s10)310 %6 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvsvmvl(<256 x double> %0, float %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)311 ret <256 x double> %6312}313 314; Function Attrs: nounwind readnone315declare <256 x double> @llvm.ve.vl.vfmads.vvsvmvl(<256 x double>, float, <256 x double>, <256 x i1>, <256 x double>, i32)316 317; Function Attrs: nounwind readnone318define fastcc <256 x double> @pvfmad_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {319; CHECK-LABEL: pvfmad_vvvvl:320; CHECK: # %bb.0:321; CHECK-NEXT: lea %s0, 256322; CHECK-NEXT: lvl %s0323; CHECK-NEXT: pvfmad %v0, %v0, %v1, %v2324; CHECK-NEXT: b.l.t (, %s10)325 %4 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 256)326 ret <256 x double> %4327}328 329; Function Attrs: nounwind readnone330declare <256 x double> @llvm.ve.vl.pvfmad.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)331 332; Function Attrs: nounwind readnone333define fastcc <256 x double> @pvfmad_vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {334; CHECK-LABEL: pvfmad_vvvvvl:335; CHECK: # %bb.0:336; CHECK-NEXT: lea %s0, 128337; CHECK-NEXT: lvl %s0338; CHECK-NEXT: pvfmad %v3, %v0, %v1, %v2339; CHECK-NEXT: lea %s16, 256340; CHECK-NEXT: lvl %s16341; CHECK-NEXT: vor %v0, (0)1, %v3342; CHECK-NEXT: b.l.t (, %s10)343 %5 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)344 ret <256 x double> %5345}346 347; Function Attrs: nounwind readnone348declare <256 x double> @llvm.ve.vl.pvfmad.vvvvvl(<256 x double>, <256 x double>, <256 x double>, <256 x double>, i32)349 350; Function Attrs: nounwind readnone351define fastcc <256 x double> @pvfmad_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {352; CHECK-LABEL: pvfmad_vsvvl:353; CHECK: # %bb.0:354; CHECK-NEXT: lea %s1, 256355; CHECK-NEXT: lvl %s1356; CHECK-NEXT: pvfmad %v0, %s0, %v0, %v1357; CHECK-NEXT: b.l.t (, %s10)358 %4 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 256)359 ret <256 x double> %4360}361 362; Function Attrs: nounwind readnone363declare <256 x double> @llvm.ve.vl.pvfmad.vsvvl(i64, <256 x double>, <256 x double>, i32)364 365; Function Attrs: nounwind readnone366define fastcc <256 x double> @pvfmad_vsvvvl(i64 %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {367; CHECK-LABEL: pvfmad_vsvvvl:368; CHECK: # %bb.0:369; CHECK-NEXT: lea %s1, 128370; CHECK-NEXT: lvl %s1371; CHECK-NEXT: pvfmad %v2, %s0, %v0, %v1372; CHECK-NEXT: lea %s16, 256373; CHECK-NEXT: lvl %s16374; CHECK-NEXT: vor %v0, (0)1, %v2375; CHECK-NEXT: b.l.t (, %s10)376 %5 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vsvvvl(i64 %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)377 ret <256 x double> %5378}379 380; Function Attrs: nounwind readnone381declare <256 x double> @llvm.ve.vl.pvfmad.vsvvvl(i64, <256 x double>, <256 x double>, <256 x double>, i32)382 383; Function Attrs: nounwind readnone384define fastcc <256 x double> @pvfmad_vvsvl(<256 x double> %0, i64 %1, <256 x double> %2) {385; CHECK-LABEL: pvfmad_vvsvl:386; CHECK: # %bb.0:387; CHECK-NEXT: lea %s1, 256388; CHECK-NEXT: lvl %s1389; CHECK-NEXT: pvfmad %v0, %v0, %s0, %v1390; CHECK-NEXT: b.l.t (, %s10)391 %4 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvsvl(<256 x double> %0, i64 %1, <256 x double> %2, i32 256)392 ret <256 x double> %4393}394 395; Function Attrs: nounwind readnone396declare <256 x double> @llvm.ve.vl.pvfmad.vvsvl(<256 x double>, i64, <256 x double>, i32)397 398; Function Attrs: nounwind readnone399define fastcc <256 x double> @pvfmad_vvsvvl(<256 x double> %0, i64 %1, <256 x double> %2, <256 x double> %3) {400; CHECK-LABEL: pvfmad_vvsvvl:401; CHECK: # %bb.0:402; CHECK-NEXT: lea %s1, 128403; CHECK-NEXT: lvl %s1404; CHECK-NEXT: pvfmad %v2, %v0, %s0, %v1405; CHECK-NEXT: lea %s16, 256406; CHECK-NEXT: lvl %s16407; CHECK-NEXT: vor %v0, (0)1, %v2408; CHECK-NEXT: b.l.t (, %s10)409 %5 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvsvvl(<256 x double> %0, i64 %1, <256 x double> %2, <256 x double> %3, i32 128)410 ret <256 x double> %5411}412 413; Function Attrs: nounwind readnone414declare <256 x double> @llvm.ve.vl.pvfmad.vvsvvl(<256 x double>, i64, <256 x double>, <256 x double>, i32)415 416; Function Attrs: nounwind readnone417define fastcc <256 x double> @pvfmad_vvvvMvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4) {418; CHECK-LABEL: pvfmad_vvvvMvl:419; CHECK: # %bb.0:420; CHECK-NEXT: lea %s0, 128421; CHECK-NEXT: lvl %s0422; CHECK-NEXT: pvfmad %v3, %v0, %v1, %v2, %vm2423; CHECK-NEXT: lea %s16, 256424; CHECK-NEXT: lvl %s16425; CHECK-NEXT: vor %v0, (0)1, %v3426; CHECK-NEXT: b.l.t (, %s10)427 %6 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvvvMvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4, i32 128)428 ret <256 x double> %6429}430 431; Function Attrs: nounwind readnone432declare <256 x double> @llvm.ve.vl.pvfmad.vvvvMvl(<256 x double>, <256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)433 434; Function Attrs: nounwind readnone435define fastcc <256 x double> @pvfmad_vsvvMvl(i64 %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4) {436; CHECK-LABEL: pvfmad_vsvvMvl:437; CHECK: # %bb.0:438; CHECK-NEXT: lea %s1, 128439; CHECK-NEXT: lvl %s1440; CHECK-NEXT: pvfmad %v2, %s0, %v0, %v1, %vm2441; CHECK-NEXT: lea %s16, 256442; CHECK-NEXT: lvl %s16443; CHECK-NEXT: vor %v0, (0)1, %v2444; CHECK-NEXT: b.l.t (, %s10)445 %6 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vsvvMvl(i64 %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4, i32 128)446 ret <256 x double> %6447}448 449; Function Attrs: nounwind readnone450declare <256 x double> @llvm.ve.vl.pvfmad.vsvvMvl(i64, <256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)451 452; Function Attrs: nounwind readnone453define fastcc <256 x double> @pvfmad_vvsvMvl(<256 x double> %0, i64 %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4) {454; CHECK-LABEL: pvfmad_vvsvMvl:455; CHECK: # %bb.0:456; CHECK-NEXT: lea %s1, 128457; CHECK-NEXT: lvl %s1458; CHECK-NEXT: pvfmad %v2, %v0, %s0, %v1, %vm2459; CHECK-NEXT: lea %s16, 256460; CHECK-NEXT: lvl %s16461; CHECK-NEXT: vor %v0, (0)1, %v2462; CHECK-NEXT: b.l.t (, %s10)463 %6 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvsvMvl(<256 x double> %0, i64 %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4, i32 128)464 ret <256 x double> %6465}466 467; Function Attrs: nounwind readnone468declare <256 x double> @llvm.ve.vl.pvfmad.vvsvMvl(<256 x double>, i64, <256 x double>, <512 x i1>, <256 x double>, i32)469