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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector compare and select minimum intrinsic instructions4;;;5;;; Note:6;;; We test VMIN*vvl, VMIN*vvl_v, VMIN*rvl, VMIN*rvl_v, VMIN*ivl, VMIN*ivl_v,7;;; VMIN*vvml_v, VMIN*rvml_v, VMIN*ivml_v, PVMIN*vvl, PVMIN*vvl_v, PVMIN*rvl,8;;; PVMIN*rvl_v, PVMIN*vvml_v, and PVMIN*rvml_v instructions.9 10; Function Attrs: nounwind readnone11define fastcc <256 x double> @vminswsx_vvvl(<256 x double> %0, <256 x double> %1) {12; CHECK-LABEL: vminswsx_vvvl:13; CHECK: # %bb.0:14; CHECK-NEXT: lea %s0, 25615; CHECK-NEXT: lvl %s016; CHECK-NEXT: vmins.w.sx %v0, %v0, %v117; CHECK-NEXT: b.l.t (, %s10)18 %3 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)19 ret <256 x double> %320}21 22; Function Attrs: nounwind readnone23declare <256 x double> @llvm.ve.vl.vminswsx.vvvl(<256 x double>, <256 x double>, i32)24 25; Function Attrs: nounwind readnone26define fastcc <256 x double> @vminswsx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {27; CHECK-LABEL: vminswsx_vvvvl:28; CHECK: # %bb.0:29; CHECK-NEXT: lea %s0, 12830; CHECK-NEXT: lvl %s031; CHECK-NEXT: vmins.w.sx %v2, %v0, %v132; CHECK-NEXT: lea %s16, 25633; CHECK-NEXT: lvl %s1634; CHECK-NEXT: vor %v0, (0)1, %v235; CHECK-NEXT: b.l.t (, %s10)36 %4 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)37 ret <256 x double> %438}39 40; Function Attrs: nounwind readnone41declare <256 x double> @llvm.ve.vl.vminswsx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)42 43; Function Attrs: nounwind readnone44define fastcc <256 x double> @vminswsx_vsvl(i32 signext %0, <256 x double> %1) {45; CHECK-LABEL: vminswsx_vsvl:46; CHECK: # %bb.0:47; CHECK-NEXT: and %s0, %s0, (32)048; CHECK-NEXT: lea %s1, 25649; CHECK-NEXT: lvl %s150; CHECK-NEXT: vmins.w.sx %v0, %s0, %v051; CHECK-NEXT: b.l.t (, %s10)52 %3 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vsvl(i32 %0, <256 x double> %1, i32 256)53 ret <256 x double> %354}55 56; Function Attrs: nounwind readnone57declare <256 x double> @llvm.ve.vl.vminswsx.vsvl(i32, <256 x double>, i32)58 59; Function Attrs: nounwind readnone60define fastcc <256 x double> @vminswsx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {61; CHECK-LABEL: vminswsx_vsvvl:62; CHECK: # %bb.0:63; CHECK-NEXT: and %s0, %s0, (32)064; CHECK-NEXT: lea %s1, 12865; CHECK-NEXT: lvl %s166; CHECK-NEXT: vmins.w.sx %v1, %s0, %v067; CHECK-NEXT: lea %s16, 25668; CHECK-NEXT: lvl %s1669; CHECK-NEXT: vor %v0, (0)1, %v170; CHECK-NEXT: b.l.t (, %s10)71 %4 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)72 ret <256 x double> %473}74 75; Function Attrs: nounwind readnone76declare <256 x double> @llvm.ve.vl.vminswsx.vsvvl(i32, <256 x double>, <256 x double>, i32)77 78; Function Attrs: nounwind readnone79define fastcc <256 x double> @vminswsx_vsvl_imm(<256 x double> %0) {80; CHECK-LABEL: vminswsx_vsvl_imm:81; CHECK: # %bb.0:82; CHECK-NEXT: lea %s0, 25683; CHECK-NEXT: lvl %s084; CHECK-NEXT: vmins.w.sx %v0, 8, %v085; CHECK-NEXT: b.l.t (, %s10)86 %2 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vsvl(i32 8, <256 x double> %0, i32 256)87 ret <256 x double> %288}89 90; Function Attrs: nounwind readnone91define fastcc <256 x double> @vminswsx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {92; CHECK-LABEL: vminswsx_vsvvl_imm:93; CHECK: # %bb.0:94; CHECK-NEXT: lea %s0, 12895; CHECK-NEXT: lvl %s096; CHECK-NEXT: vmins.w.sx %v1, 8, %v097; CHECK-NEXT: lea %s16, 25698; CHECK-NEXT: lvl %s1699; CHECK-NEXT: vor %v0, (0)1, %v1100; CHECK-NEXT: b.l.t (, %s10)101 %3 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)102 ret <256 x double> %3103}104 105; Function Attrs: nounwind readnone106define fastcc <256 x double> @vminswsx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {107; CHECK-LABEL: vminswsx_vvvmvl:108; CHECK: # %bb.0:109; CHECK-NEXT: lea %s0, 128110; CHECK-NEXT: lvl %s0111; CHECK-NEXT: vmins.w.sx %v2, %v0, %v1, %vm1112; CHECK-NEXT: lea %s16, 256113; CHECK-NEXT: lvl %s16114; CHECK-NEXT: vor %v0, (0)1, %v2115; CHECK-NEXT: b.l.t (, %s10)116 %5 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)117 ret <256 x double> %5118}119 120; Function Attrs: nounwind readnone121declare <256 x double> @llvm.ve.vl.vminswsx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)122 123; Function Attrs: nounwind readnone124define fastcc <256 x double> @vminswsx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {125; CHECK-LABEL: vminswsx_vsvmvl:126; CHECK: # %bb.0:127; CHECK-NEXT: and %s0, %s0, (32)0128; CHECK-NEXT: lea %s1, 128129; CHECK-NEXT: lvl %s1130; CHECK-NEXT: vmins.w.sx %v1, %s0, %v0, %vm1131; CHECK-NEXT: lea %s16, 256132; CHECK-NEXT: lvl %s16133; CHECK-NEXT: vor %v0, (0)1, %v1134; CHECK-NEXT: b.l.t (, %s10)135 %5 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)136 ret <256 x double> %5137}138 139; Function Attrs: nounwind readnone140declare <256 x double> @llvm.ve.vl.vminswsx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)141 142; Function Attrs: nounwind readnone143define fastcc <256 x double> @vminswsx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {144; CHECK-LABEL: vminswsx_vsvmvl_imm:145; CHECK: # %bb.0:146; CHECK-NEXT: lea %s0, 128147; CHECK-NEXT: lvl %s0148; CHECK-NEXT: vmins.w.sx %v1, 8, %v0, %vm1149; CHECK-NEXT: lea %s16, 256150; CHECK-NEXT: lvl %s16151; CHECK-NEXT: vor %v0, (0)1, %v1152; CHECK-NEXT: b.l.t (, %s10)153 %4 = tail call fast <256 x double> @llvm.ve.vl.vminswsx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)154 ret <256 x double> %4155}156 157; Function Attrs: nounwind readnone158define fastcc <256 x double> @vminswzx_vvvl(<256 x double> %0, <256 x double> %1) {159; CHECK-LABEL: vminswzx_vvvl:160; CHECK: # %bb.0:161; CHECK-NEXT: lea %s0, 256162; CHECK-NEXT: lvl %s0163; CHECK-NEXT: vmins.w.zx %v0, %v0, %v1164; CHECK-NEXT: b.l.t (, %s10)165 %3 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)166 ret <256 x double> %3167}168 169; Function Attrs: nounwind readnone170declare <256 x double> @llvm.ve.vl.vminswzx.vvvl(<256 x double>, <256 x double>, i32)171 172; Function Attrs: nounwind readnone173define fastcc <256 x double> @vminswzx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {174; CHECK-LABEL: vminswzx_vvvvl:175; CHECK: # %bb.0:176; CHECK-NEXT: lea %s0, 128177; CHECK-NEXT: lvl %s0178; CHECK-NEXT: vmins.w.zx %v2, %v0, %v1179; CHECK-NEXT: lea %s16, 256180; CHECK-NEXT: lvl %s16181; CHECK-NEXT: vor %v0, (0)1, %v2182; CHECK-NEXT: b.l.t (, %s10)183 %4 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)184 ret <256 x double> %4185}186 187; Function Attrs: nounwind readnone188declare <256 x double> @llvm.ve.vl.vminswzx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)189 190; Function Attrs: nounwind readnone191define fastcc <256 x double> @vminswzx_vsvl(i32 signext %0, <256 x double> %1) {192; CHECK-LABEL: vminswzx_vsvl:193; CHECK: # %bb.0:194; CHECK-NEXT: and %s0, %s0, (32)0195; CHECK-NEXT: lea %s1, 256196; CHECK-NEXT: lvl %s1197; CHECK-NEXT: vmins.w.zx %v0, %s0, %v0198; CHECK-NEXT: b.l.t (, %s10)199 %3 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vsvl(i32 %0, <256 x double> %1, i32 256)200 ret <256 x double> %3201}202 203; Function Attrs: nounwind readnone204declare <256 x double> @llvm.ve.vl.vminswzx.vsvl(i32, <256 x double>, i32)205 206; Function Attrs: nounwind readnone207define fastcc <256 x double> @vminswzx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {208; CHECK-LABEL: vminswzx_vsvvl:209; CHECK: # %bb.0:210; CHECK-NEXT: and %s0, %s0, (32)0211; CHECK-NEXT: lea %s1, 128212; CHECK-NEXT: lvl %s1213; CHECK-NEXT: vmins.w.zx %v1, %s0, %v0214; CHECK-NEXT: lea %s16, 256215; CHECK-NEXT: lvl %s16216; CHECK-NEXT: vor %v0, (0)1, %v1217; CHECK-NEXT: b.l.t (, %s10)218 %4 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)219 ret <256 x double> %4220}221 222; Function Attrs: nounwind readnone223declare <256 x double> @llvm.ve.vl.vminswzx.vsvvl(i32, <256 x double>, <256 x double>, i32)224 225; Function Attrs: nounwind readnone226define fastcc <256 x double> @vminswzx_vsvl_imm(<256 x double> %0) {227; CHECK-LABEL: vminswzx_vsvl_imm:228; CHECK: # %bb.0:229; CHECK-NEXT: lea %s0, 256230; CHECK-NEXT: lvl %s0231; CHECK-NEXT: vmins.w.zx %v0, 8, %v0232; CHECK-NEXT: b.l.t (, %s10)233 %2 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vsvl(i32 8, <256 x double> %0, i32 256)234 ret <256 x double> %2235}236 237; Function Attrs: nounwind readnone238define fastcc <256 x double> @vminswzx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {239; CHECK-LABEL: vminswzx_vsvvl_imm:240; CHECK: # %bb.0:241; CHECK-NEXT: lea %s0, 128242; CHECK-NEXT: lvl %s0243; CHECK-NEXT: vmins.w.zx %v1, 8, %v0244; CHECK-NEXT: lea %s16, 256245; CHECK-NEXT: lvl %s16246; CHECK-NEXT: vor %v0, (0)1, %v1247; CHECK-NEXT: b.l.t (, %s10)248 %3 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)249 ret <256 x double> %3250}251 252; Function Attrs: nounwind readnone253define fastcc <256 x double> @vminswzx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {254; CHECK-LABEL: vminswzx_vvvmvl:255; CHECK: # %bb.0:256; CHECK-NEXT: lea %s0, 128257; CHECK-NEXT: lvl %s0258; CHECK-NEXT: vmins.w.zx %v2, %v0, %v1, %vm1259; CHECK-NEXT: lea %s16, 256260; CHECK-NEXT: lvl %s16261; CHECK-NEXT: vor %v0, (0)1, %v2262; CHECK-NEXT: b.l.t (, %s10)263 %5 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)264 ret <256 x double> %5265}266 267; Function Attrs: nounwind readnone268declare <256 x double> @llvm.ve.vl.vminswzx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)269 270; Function Attrs: nounwind readnone271define fastcc <256 x double> @vminswzx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {272; CHECK-LABEL: vminswzx_vsvmvl:273; CHECK: # %bb.0:274; CHECK-NEXT: and %s0, %s0, (32)0275; CHECK-NEXT: lea %s1, 128276; CHECK-NEXT: lvl %s1277; CHECK-NEXT: vmins.w.zx %v1, %s0, %v0, %vm1278; CHECK-NEXT: lea %s16, 256279; CHECK-NEXT: lvl %s16280; CHECK-NEXT: vor %v0, (0)1, %v1281; CHECK-NEXT: b.l.t (, %s10)282 %5 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)283 ret <256 x double> %5284}285 286; Function Attrs: nounwind readnone287declare <256 x double> @llvm.ve.vl.vminswzx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)288 289; Function Attrs: nounwind readnone290define fastcc <256 x double> @vminswzx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {291; CHECK-LABEL: vminswzx_vsvmvl_imm:292; CHECK: # %bb.0:293; CHECK-NEXT: lea %s0, 128294; CHECK-NEXT: lvl %s0295; CHECK-NEXT: vmins.w.zx %v1, 8, %v0, %vm1296; CHECK-NEXT: lea %s16, 256297; CHECK-NEXT: lvl %s16298; CHECK-NEXT: vor %v0, (0)1, %v1299; CHECK-NEXT: b.l.t (, %s10)300 %4 = tail call fast <256 x double> @llvm.ve.vl.vminswzx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)301 ret <256 x double> %4302}303 304; Function Attrs: nounwind readnone305define fastcc <256 x double> @vminsl_vvvl(<256 x double> %0, <256 x double> %1) {306; CHECK-LABEL: vminsl_vvvl:307; CHECK: # %bb.0:308; CHECK-NEXT: lea %s0, 256309; CHECK-NEXT: lvl %s0310; CHECK-NEXT: vmins.l %v0, %v0, %v1311; CHECK-NEXT: b.l.t (, %s10)312 %3 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vvvl(<256 x double> %0, <256 x double> %1, i32 256)313 ret <256 x double> %3314}315 316; Function Attrs: nounwind readnone317declare <256 x double> @llvm.ve.vl.vminsl.vvvl(<256 x double>, <256 x double>, i32)318 319; Function Attrs: nounwind readnone320define fastcc <256 x double> @vminsl_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {321; CHECK-LABEL: vminsl_vvvvl:322; CHECK: # %bb.0:323; CHECK-NEXT: lea %s0, 128324; CHECK-NEXT: lvl %s0325; CHECK-NEXT: vmins.l %v2, %v0, %v1326; CHECK-NEXT: lea %s16, 256327; CHECK-NEXT: lvl %s16328; CHECK-NEXT: vor %v0, (0)1, %v2329; CHECK-NEXT: b.l.t (, %s10)330 %4 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)331 ret <256 x double> %4332}333 334; Function Attrs: nounwind readnone335declare <256 x double> @llvm.ve.vl.vminsl.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)336 337; Function Attrs: nounwind readnone338define fastcc <256 x double> @vminsl_vsvl(i64 %0, <256 x double> %1) {339; CHECK-LABEL: vminsl_vsvl:340; CHECK: # %bb.0:341; CHECK-NEXT: lea %s1, 256342; CHECK-NEXT: lvl %s1343; CHECK-NEXT: vmins.l %v0, %s0, %v0344; CHECK-NEXT: b.l.t (, %s10)345 %3 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vsvl(i64 %0, <256 x double> %1, i32 256)346 ret <256 x double> %3347}348 349; Function Attrs: nounwind readnone350declare <256 x double> @llvm.ve.vl.vminsl.vsvl(i64, <256 x double>, i32)351 352; Function Attrs: nounwind readnone353define fastcc <256 x double> @vminsl_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {354; CHECK-LABEL: vminsl_vsvvl:355; CHECK: # %bb.0:356; CHECK-NEXT: lea %s1, 128357; CHECK-NEXT: lvl %s1358; CHECK-NEXT: vmins.l %v1, %s0, %v0359; CHECK-NEXT: lea %s16, 256360; CHECK-NEXT: lvl %s16361; CHECK-NEXT: vor %v0, (0)1, %v1362; CHECK-NEXT: b.l.t (, %s10)363 %4 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)364 ret <256 x double> %4365}366 367; Function Attrs: nounwind readnone368declare <256 x double> @llvm.ve.vl.vminsl.vsvvl(i64, <256 x double>, <256 x double>, i32)369 370; Function Attrs: nounwind readnone371define fastcc <256 x double> @vminsl_vsvl_imm(<256 x double> %0) {372; CHECK-LABEL: vminsl_vsvl_imm:373; CHECK: # %bb.0:374; CHECK-NEXT: lea %s0, 256375; CHECK-NEXT: lvl %s0376; CHECK-NEXT: vmins.l %v0, 8, %v0377; CHECK-NEXT: b.l.t (, %s10)378 %2 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vsvl(i64 8, <256 x double> %0, i32 256)379 ret <256 x double> %2380}381 382; Function Attrs: nounwind readnone383define fastcc <256 x double> @vminsl_vsvvl_imm(<256 x double> %0, <256 x double> %1) {384; CHECK-LABEL: vminsl_vsvvl_imm:385; CHECK: # %bb.0:386; CHECK-NEXT: lea %s0, 128387; CHECK-NEXT: lvl %s0388; CHECK-NEXT: vmins.l %v1, 8, %v0389; CHECK-NEXT: lea %s16, 256390; CHECK-NEXT: lvl %s16391; CHECK-NEXT: vor %v0, (0)1, %v1392; CHECK-NEXT: b.l.t (, %s10)393 %3 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)394 ret <256 x double> %3395}396 397; Function Attrs: nounwind readnone398define fastcc <256 x double> @vminsl_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {399; CHECK-LABEL: vminsl_vvvmvl:400; CHECK: # %bb.0:401; CHECK-NEXT: lea %s0, 128402; CHECK-NEXT: lvl %s0403; CHECK-NEXT: vmins.l %v2, %v0, %v1, %vm1404; CHECK-NEXT: lea %s16, 256405; CHECK-NEXT: lvl %s16406; CHECK-NEXT: vor %v0, (0)1, %v2407; CHECK-NEXT: b.l.t (, %s10)408 %5 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)409 ret <256 x double> %5410}411 412; Function Attrs: nounwind readnone413declare <256 x double> @llvm.ve.vl.vminsl.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)414 415; Function Attrs: nounwind readnone416define fastcc <256 x double> @vminsl_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {417; CHECK-LABEL: vminsl_vsvmvl:418; CHECK: # %bb.0:419; CHECK-NEXT: lea %s1, 128420; CHECK-NEXT: lvl %s1421; CHECK-NEXT: vmins.l %v1, %s0, %v0, %vm1422; CHECK-NEXT: lea %s16, 256423; CHECK-NEXT: lvl %s16424; CHECK-NEXT: vor %v0, (0)1, %v1425; CHECK-NEXT: b.l.t (, %s10)426 %5 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)427 ret <256 x double> %5428}429 430; Function Attrs: nounwind readnone431declare <256 x double> @llvm.ve.vl.vminsl.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)432 433; Function Attrs: nounwind readnone434define fastcc <256 x double> @vminsl_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {435; CHECK-LABEL: vminsl_vsvmvl_imm:436; CHECK: # %bb.0:437; CHECK-NEXT: lea %s0, 128438; CHECK-NEXT: lvl %s0439; CHECK-NEXT: vmins.l %v1, 8, %v0, %vm1440; CHECK-NEXT: lea %s16, 256441; CHECK-NEXT: lvl %s16442; CHECK-NEXT: vor %v0, (0)1, %v1443; CHECK-NEXT: b.l.t (, %s10)444 %4 = tail call fast <256 x double> @llvm.ve.vl.vminsl.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)445 ret <256 x double> %4446}447 448; Function Attrs: nounwind readnone449define fastcc <256 x double> @pvmins_vvvl(<256 x double> %0, <256 x double> %1) {450; CHECK-LABEL: pvmins_vvvl:451; CHECK: # %bb.0:452; CHECK-NEXT: lea %s0, 256453; CHECK-NEXT: lvl %s0454; CHECK-NEXT: pvmins %v0, %v0, %v1455; CHECK-NEXT: b.l.t (, %s10)456 %3 = tail call fast <256 x double> @llvm.ve.vl.pvmins.vvvl(<256 x double> %0, <256 x double> %1, i32 256)457 ret <256 x double> %3458}459 460; Function Attrs: nounwind readnone461declare <256 x double> @llvm.ve.vl.pvmins.vvvl(<256 x double>, <256 x double>, i32)462 463; Function Attrs: nounwind readnone464define fastcc <256 x double> @pvmins_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {465; CHECK-LABEL: pvmins_vvvvl:466; CHECK: # %bb.0:467; CHECK-NEXT: lea %s0, 128468; CHECK-NEXT: lvl %s0469; CHECK-NEXT: pvmins %v2, %v0, %v1470; CHECK-NEXT: lea %s16, 256471; CHECK-NEXT: lvl %s16472; CHECK-NEXT: vor %v0, (0)1, %v2473; CHECK-NEXT: b.l.t (, %s10)474 %4 = tail call fast <256 x double> @llvm.ve.vl.pvmins.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)475 ret <256 x double> %4476}477 478; Function Attrs: nounwind readnone479declare <256 x double> @llvm.ve.vl.pvmins.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)480 481; Function Attrs: nounwind readnone482define fastcc <256 x double> @pvmins_vsvl(i64 %0, <256 x double> %1) {483; CHECK-LABEL: pvmins_vsvl:484; CHECK: # %bb.0:485; CHECK-NEXT: lea %s1, 256486; CHECK-NEXT: lvl %s1487; CHECK-NEXT: pvmins %v0, %s0, %v0488; CHECK-NEXT: b.l.t (, %s10)489 %3 = tail call fast <256 x double> @llvm.ve.vl.pvmins.vsvl(i64 %0, <256 x double> %1, i32 256)490 ret <256 x double> %3491}492 493; Function Attrs: nounwind readnone494declare <256 x double> @llvm.ve.vl.pvmins.vsvl(i64, <256 x double>, i32)495 496; Function Attrs: nounwind readnone497define fastcc <256 x double> @pvmins_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {498; CHECK-LABEL: pvmins_vsvvl:499; CHECK: # %bb.0:500; CHECK-NEXT: lea %s1, 128501; CHECK-NEXT: lvl %s1502; CHECK-NEXT: pvmins %v1, %s0, %v0503; CHECK-NEXT: lea %s16, 256504; CHECK-NEXT: lvl %s16505; CHECK-NEXT: vor %v0, (0)1, %v1506; CHECK-NEXT: b.l.t (, %s10)507 %4 = tail call fast <256 x double> @llvm.ve.vl.pvmins.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)508 ret <256 x double> %4509}510 511; Function Attrs: nounwind readnone512declare <256 x double> @llvm.ve.vl.pvmins.vsvvl(i64, <256 x double>, <256 x double>, i32)513 514; Function Attrs: nounwind readnone515define fastcc <256 x double> @pvmins_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {516; CHECK-LABEL: pvmins_vvvMvl:517; CHECK: # %bb.0:518; CHECK-NEXT: lea %s0, 128519; CHECK-NEXT: lvl %s0520; CHECK-NEXT: pvmins %v2, %v0, %v1, %vm2521; CHECK-NEXT: lea %s16, 256522; CHECK-NEXT: lvl %s16523; CHECK-NEXT: vor %v0, (0)1, %v2524; CHECK-NEXT: b.l.t (, %s10)525 %5 = tail call fast <256 x double> @llvm.ve.vl.pvmins.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)526 ret <256 x double> %5527}528 529; Function Attrs: nounwind readnone530declare <256 x double> @llvm.ve.vl.pvmins.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)531 532; Function Attrs: nounwind readnone533define fastcc <256 x double> @pvmins_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {534; CHECK-LABEL: pvmins_vsvMvl:535; CHECK: # %bb.0:536; CHECK-NEXT: lea %s1, 128537; CHECK-NEXT: lvl %s1538; CHECK-NEXT: pvmins %v1, %s0, %v0, %vm2539; CHECK-NEXT: lea %s16, 256540; CHECK-NEXT: lvl %s16541; CHECK-NEXT: vor %v0, (0)1, %v1542; CHECK-NEXT: b.l.t (, %s10)543 %5 = tail call fast <256 x double> @llvm.ve.vl.pvmins.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)544 ret <256 x double> %5545}546 547; Function Attrs: nounwind readnone548declare <256 x double> @llvm.ve.vl.pvmins.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)549