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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector merge intrinsic instructions4;;;5;;; Note:6;;; We test VMRG*vvml, VMRG*vvml_v, VMRG*rvml, VMRG*rvml_v, VMRG*ivml, and7;;; VMRG*ivml_v instructions.8 9; Function Attrs: nounwind readnone10define fastcc <256 x double> @vmrg_vvvml(<256 x double> %0, <256 x double> %1, <256 x i1> %2) {11; CHECK-LABEL: vmrg_vvvml:12; CHECK: # %bb.0:13; CHECK-NEXT: lea %s0, 25614; CHECK-NEXT: lvl %s015; CHECK-NEXT: vmrg %v0, %v0, %v1, %vm116; CHECK-NEXT: b.l.t (, %s10)17 %4 = tail call fast <256 x double> @llvm.ve.vl.vmrg.vvvml(<256 x double> %0, <256 x double> %1, <256 x i1> %2, i32 256)18 ret <256 x double> %419}20 21; Function Attrs: nounwind readnone22declare <256 x double> @llvm.ve.vl.vmrg.vvvml(<256 x double>, <256 x double>, <256 x i1>, i32)23 24; Function Attrs: nounwind readnone25define fastcc <256 x double> @vmrg_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {26; CHECK-LABEL: vmrg_vvvmvl:27; CHECK: # %bb.0:28; CHECK-NEXT: lea %s0, 12829; CHECK-NEXT: lvl %s030; CHECK-NEXT: vmrg %v2, %v0, %v1, %vm131; CHECK-NEXT: lea %s16, 25632; CHECK-NEXT: lvl %s1633; CHECK-NEXT: vor %v0, (0)1, %v234; CHECK-NEXT: b.l.t (, %s10)35 %5 = tail call fast <256 x double> @llvm.ve.vl.vmrg.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)36 ret <256 x double> %537}38 39; Function Attrs: nounwind readnone40declare <256 x double> @llvm.ve.vl.vmrg.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)41 42; Function Attrs: nounwind readnone43define fastcc <256 x double> @vmrg_vsvml(i64 %0, <256 x double> %1, <256 x i1> %2) {44; CHECK-LABEL: vmrg_vsvml:45; CHECK: # %bb.0:46; CHECK-NEXT: lea %s1, 25647; CHECK-NEXT: lvl %s148; CHECK-NEXT: vmrg %v0, %s0, %v0, %vm149; CHECK-NEXT: b.l.t (, %s10)50 %4 = tail call fast <256 x double> @llvm.ve.vl.vmrg.vsvml(i64 %0, <256 x double> %1, <256 x i1> %2, i32 256)51 ret <256 x double> %452}53 54; Function Attrs: nounwind readnone55declare <256 x double> @llvm.ve.vl.vmrg.vsvml(i64, <256 x double>, <256 x i1>, i32)56 57; Function Attrs: nounwind readnone58define fastcc <256 x double> @vmrg_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {59; CHECK-LABEL: vmrg_vsvmvl:60; CHECK: # %bb.0:61; CHECK-NEXT: lea %s1, 12862; CHECK-NEXT: lvl %s163; CHECK-NEXT: vmrg %v1, %s0, %v0, %vm164; CHECK-NEXT: lea %s16, 25665; CHECK-NEXT: lvl %s1666; CHECK-NEXT: vor %v0, (0)1, %v167; CHECK-NEXT: b.l.t (, %s10)68 %5 = tail call fast <256 x double> @llvm.ve.vl.vmrg.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)69 ret <256 x double> %570}71 72; Function Attrs: nounwind readnone73declare <256 x double> @llvm.ve.vl.vmrg.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)74 75; Function Attrs: nounwind readnone76define fastcc <256 x double> @vmrg_vsvml_imm(<256 x double> %0, <256 x i1> %1) {77; CHECK-LABEL: vmrg_vsvml_imm:78; CHECK: # %bb.0:79; CHECK-NEXT: lea %s0, 25680; CHECK-NEXT: lvl %s081; CHECK-NEXT: vmrg %v0, 8, %v0, %vm182; CHECK-NEXT: b.l.t (, %s10)83 %3 = tail call fast <256 x double> @llvm.ve.vl.vmrg.vsvml(i64 8, <256 x double> %0, <256 x i1> %1, i32 256)84 ret <256 x double> %385}86 87; Function Attrs: nounwind readnone88define fastcc <256 x double> @vmrg_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {89; CHECK-LABEL: vmrg_vsvmvl_imm:90; CHECK: # %bb.0:91; CHECK-NEXT: lea %s0, 12892; CHECK-NEXT: lvl %s093; CHECK-NEXT: vmrg %v1, 8, %v0, %vm194; CHECK-NEXT: lea %s16, 25695; CHECK-NEXT: lvl %s1696; CHECK-NEXT: vor %v0, (0)1, %v197; CHECK-NEXT: b.l.t (, %s10)98 %4 = tail call fast <256 x double> @llvm.ve.vl.vmrg.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)99 ret <256 x double> %4100}101 102; Function Attrs: nounwind readnone103define fastcc <256 x double> @vmrgw_vvvMl(<256 x double> %0, <256 x double> %1, <512 x i1> %2) {104; CHECK-LABEL: vmrgw_vvvMl:105; CHECK: # %bb.0:106; CHECK-NEXT: lea %s0, 256107; CHECK-NEXT: lvl %s0108; CHECK-NEXT: vmrg.w %v0, %v0, %v1, %vm2109; CHECK-NEXT: b.l.t (, %s10)110 %4 = tail call fast <256 x double> @llvm.ve.vl.vmrgw.vvvMl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, i32 256)111 ret <256 x double> %4112}113 114; Function Attrs: nounwind readnone115declare <256 x double> @llvm.ve.vl.vmrgw.vvvMl(<256 x double>, <256 x double>, <512 x i1>, i32)116 117; Function Attrs: nounwind readnone118define fastcc <256 x double> @vmrgw_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {119; CHECK-LABEL: vmrgw_vvvMvl:120; CHECK: # %bb.0:121; CHECK-NEXT: lea %s0, 128122; CHECK-NEXT: lvl %s0123; CHECK-NEXT: vmrg.w %v2, %v0, %v1, %vm2124; CHECK-NEXT: lea %s16, 256125; CHECK-NEXT: lvl %s16126; CHECK-NEXT: vor %v0, (0)1, %v2127; CHECK-NEXT: b.l.t (, %s10)128 %5 = tail call fast <256 x double> @llvm.ve.vl.vmrgw.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)129 ret <256 x double> %5130}131 132; Function Attrs: nounwind readnone133declare <256 x double> @llvm.ve.vl.vmrgw.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)134 135; Function Attrs: nounwind readnone136define fastcc <256 x double> @vmrgw_vsvMl(i32 signext %0, <256 x double> %1, <512 x i1> %2) {137; CHECK-LABEL: vmrgw_vsvMl:138; CHECK: # %bb.0:139; CHECK-NEXT: and %s0, %s0, (32)0140; CHECK-NEXT: lea %s1, 256141; CHECK-NEXT: lvl %s1142; CHECK-NEXT: vmrg.w %v0, %s0, %v0, %vm2143; CHECK-NEXT: b.l.t (, %s10)144 %4 = tail call fast <256 x double> @llvm.ve.vl.vmrgw.vsvMl(i32 %0, <256 x double> %1, <512 x i1> %2, i32 256)145 ret <256 x double> %4146}147 148; Function Attrs: nounwind readnone149declare <256 x double> @llvm.ve.vl.vmrgw.vsvMl(i32, <256 x double>, <512 x i1>, i32)150 151; Function Attrs: nounwind readnone152define fastcc <256 x double> @vmrgw_vsvMvl(i32 signext %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {153; CHECK-LABEL: vmrgw_vsvMvl:154; CHECK: # %bb.0:155; CHECK-NEXT: and %s0, %s0, (32)0156; CHECK-NEXT: lea %s1, 128157; CHECK-NEXT: lvl %s1158; CHECK-NEXT: vmrg.w %v1, %s0, %v0, %vm2159; CHECK-NEXT: lea %s16, 256160; CHECK-NEXT: lvl %s16161; CHECK-NEXT: vor %v0, (0)1, %v1162; CHECK-NEXT: b.l.t (, %s10)163 %5 = tail call fast <256 x double> @llvm.ve.vl.vmrgw.vsvMvl(i32 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)164 ret <256 x double> %5165}166 167; Function Attrs: nounwind readnone168declare <256 x double> @llvm.ve.vl.vmrgw.vsvMvl(i32, <256 x double>, <512 x i1>, <256 x double>, i32)169