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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector multiply intrinsic instructions4;;;5;;; Note:6;;; We test VMUL*vvl, VMUL*vvl_v, VMUL*rvl, VMUL*rvl_v, VMUL*ivl, VMUL*ivl_v,7;;; VMUL*vvml_v, VMUL*rvml_v, and VMUL*ivml_v instructions.8 9; Function Attrs: nounwind readnone10define fastcc <256 x double> @vmulul_vvvl(<256 x double> %0, <256 x double> %1) {11; CHECK-LABEL: vmulul_vvvl:12; CHECK: # %bb.0:13; CHECK-NEXT: lea %s0, 25614; CHECK-NEXT: lvl %s015; CHECK-NEXT: vmulu.l %v0, %v0, %v116; CHECK-NEXT: b.l.t (, %s10)17 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vvvl(<256 x double> %0, <256 x double> %1, i32 256)18 ret <256 x double> %319}20 21; Function Attrs: nounwind readnone22declare <256 x double> @llvm.ve.vl.vmulul.vvvl(<256 x double>, <256 x double>, i32)23 24; Function Attrs: nounwind readnone25define fastcc <256 x double> @vmulul_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {26; CHECK-LABEL: vmulul_vvvvl:27; CHECK: # %bb.0:28; CHECK-NEXT: lea %s0, 12829; CHECK-NEXT: lvl %s030; CHECK-NEXT: vmulu.l %v2, %v0, %v131; CHECK-NEXT: lea %s16, 25632; CHECK-NEXT: lvl %s1633; CHECK-NEXT: vor %v0, (0)1, %v234; CHECK-NEXT: b.l.t (, %s10)35 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)36 ret <256 x double> %437}38 39; Function Attrs: nounwind readnone40declare <256 x double> @llvm.ve.vl.vmulul.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)41 42; Function Attrs: nounwind readnone43define fastcc <256 x double> @vmulul_vsvl(i64 %0, <256 x double> %1) {44; CHECK-LABEL: vmulul_vsvl:45; CHECK: # %bb.0:46; CHECK-NEXT: lea %s1, 25647; CHECK-NEXT: lvl %s148; CHECK-NEXT: vmulu.l %v0, %s0, %v049; CHECK-NEXT: b.l.t (, %s10)50 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vsvl(i64 %0, <256 x double> %1, i32 256)51 ret <256 x double> %352}53 54; Function Attrs: nounwind readnone55declare <256 x double> @llvm.ve.vl.vmulul.vsvl(i64, <256 x double>, i32)56 57; Function Attrs: nounwind readnone58define fastcc <256 x double> @vmulul_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {59; CHECK-LABEL: vmulul_vsvvl:60; CHECK: # %bb.0:61; CHECK-NEXT: lea %s1, 12862; CHECK-NEXT: lvl %s163; CHECK-NEXT: vmulu.l %v1, %s0, %v064; CHECK-NEXT: lea %s16, 25665; CHECK-NEXT: lvl %s1666; CHECK-NEXT: vor %v0, (0)1, %v167; CHECK-NEXT: b.l.t (, %s10)68 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)69 ret <256 x double> %470}71 72; Function Attrs: nounwind readnone73declare <256 x double> @llvm.ve.vl.vmulul.vsvvl(i64, <256 x double>, <256 x double>, i32)74 75; Function Attrs: nounwind readnone76define fastcc <256 x double> @vmulul_vsvl_imm(<256 x double> %0) {77; CHECK-LABEL: vmulul_vsvl_imm:78; CHECK: # %bb.0:79; CHECK-NEXT: lea %s0, 25680; CHECK-NEXT: lvl %s081; CHECK-NEXT: vmulu.l %v0, 8, %v082; CHECK-NEXT: b.l.t (, %s10)83 %2 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vsvl(i64 8, <256 x double> %0, i32 256)84 ret <256 x double> %285}86 87; Function Attrs: nounwind readnone88define fastcc <256 x double> @vmulul_vsvvl_imm(<256 x double> %0, <256 x double> %1) {89; CHECK-LABEL: vmulul_vsvvl_imm:90; CHECK: # %bb.0:91; CHECK-NEXT: lea %s0, 12892; CHECK-NEXT: lvl %s093; CHECK-NEXT: vmulu.l %v1, 8, %v094; CHECK-NEXT: lea %s16, 25695; CHECK-NEXT: lvl %s1696; CHECK-NEXT: vor %v0, (0)1, %v197; CHECK-NEXT: b.l.t (, %s10)98 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)99 ret <256 x double> %3100}101 102; Function Attrs: nounwind readnone103define fastcc <256 x double> @vmulul_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {104; CHECK-LABEL: vmulul_vvvmvl:105; CHECK: # %bb.0:106; CHECK-NEXT: lea %s0, 128107; CHECK-NEXT: lvl %s0108; CHECK-NEXT: vmulu.l %v2, %v0, %v1, %vm1109; CHECK-NEXT: lea %s16, 256110; CHECK-NEXT: lvl %s16111; CHECK-NEXT: vor %v0, (0)1, %v2112; CHECK-NEXT: b.l.t (, %s10)113 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)114 ret <256 x double> %5115}116 117; Function Attrs: nounwind readnone118declare <256 x double> @llvm.ve.vl.vmulul.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)119 120; Function Attrs: nounwind readnone121define fastcc <256 x double> @vmulul_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {122; CHECK-LABEL: vmulul_vsvmvl:123; CHECK: # %bb.0:124; CHECK-NEXT: lea %s1, 128125; CHECK-NEXT: lvl %s1126; CHECK-NEXT: vmulu.l %v1, %s0, %v0, %vm1127; CHECK-NEXT: lea %s16, 256128; CHECK-NEXT: lvl %s16129; CHECK-NEXT: vor %v0, (0)1, %v1130; CHECK-NEXT: b.l.t (, %s10)131 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)132 ret <256 x double> %5133}134 135; Function Attrs: nounwind readnone136declare <256 x double> @llvm.ve.vl.vmulul.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)137 138; Function Attrs: nounwind readnone139define fastcc <256 x double> @vmulul_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {140; CHECK-LABEL: vmulul_vsvmvl_imm:141; CHECK: # %bb.0:142; CHECK-NEXT: lea %s0, 128143; CHECK-NEXT: lvl %s0144; CHECK-NEXT: vmulu.l %v1, 8, %v0, %vm1145; CHECK-NEXT: lea %s16, 256146; CHECK-NEXT: lvl %s16147; CHECK-NEXT: vor %v0, (0)1, %v1148; CHECK-NEXT: b.l.t (, %s10)149 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulul.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)150 ret <256 x double> %4151}152 153; Function Attrs: nounwind readnone154define fastcc <256 x double> @vmuluw_vvvl(<256 x double> %0, <256 x double> %1) {155; CHECK-LABEL: vmuluw_vvvl:156; CHECK: # %bb.0:157; CHECK-NEXT: lea %s0, 256158; CHECK-NEXT: lvl %s0159; CHECK-NEXT: vmulu.w %v0, %v0, %v1160; CHECK-NEXT: b.l.t (, %s10)161 %3 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vvvl(<256 x double> %0, <256 x double> %1, i32 256)162 ret <256 x double> %3163}164 165; Function Attrs: nounwind readnone166declare <256 x double> @llvm.ve.vl.vmuluw.vvvl(<256 x double>, <256 x double>, i32)167 168; Function Attrs: nounwind readnone169define fastcc <256 x double> @vmuluw_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {170; CHECK-LABEL: vmuluw_vvvvl:171; CHECK: # %bb.0:172; CHECK-NEXT: lea %s0, 128173; CHECK-NEXT: lvl %s0174; CHECK-NEXT: vmulu.w %v2, %v0, %v1175; CHECK-NEXT: lea %s16, 256176; CHECK-NEXT: lvl %s16177; CHECK-NEXT: vor %v0, (0)1, %v2178; CHECK-NEXT: b.l.t (, %s10)179 %4 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)180 ret <256 x double> %4181}182 183; Function Attrs: nounwind readnone184declare <256 x double> @llvm.ve.vl.vmuluw.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)185 186; Function Attrs: nounwind readnone187define fastcc <256 x double> @vmuluw_vsvl(i32 signext %0, <256 x double> %1) {188; CHECK-LABEL: vmuluw_vsvl:189; CHECK: # %bb.0:190; CHECK-NEXT: and %s0, %s0, (32)0191; CHECK-NEXT: lea %s1, 256192; CHECK-NEXT: lvl %s1193; CHECK-NEXT: vmulu.w %v0, %s0, %v0194; CHECK-NEXT: b.l.t (, %s10)195 %3 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vsvl(i32 %0, <256 x double> %1, i32 256)196 ret <256 x double> %3197}198 199; Function Attrs: nounwind readnone200declare <256 x double> @llvm.ve.vl.vmuluw.vsvl(i32, <256 x double>, i32)201 202; Function Attrs: nounwind readnone203define fastcc <256 x double> @vmuluw_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {204; CHECK-LABEL: vmuluw_vsvvl:205; CHECK: # %bb.0:206; CHECK-NEXT: and %s0, %s0, (32)0207; CHECK-NEXT: lea %s1, 128208; CHECK-NEXT: lvl %s1209; CHECK-NEXT: vmulu.w %v1, %s0, %v0210; CHECK-NEXT: lea %s16, 256211; CHECK-NEXT: lvl %s16212; CHECK-NEXT: vor %v0, (0)1, %v1213; CHECK-NEXT: b.l.t (, %s10)214 %4 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)215 ret <256 x double> %4216}217 218; Function Attrs: nounwind readnone219declare <256 x double> @llvm.ve.vl.vmuluw.vsvvl(i32, <256 x double>, <256 x double>, i32)220 221; Function Attrs: nounwind readnone222define fastcc <256 x double> @vmuluw_vsvl_imm(<256 x double> %0) {223; CHECK-LABEL: vmuluw_vsvl_imm:224; CHECK: # %bb.0:225; CHECK-NEXT: lea %s0, 256226; CHECK-NEXT: lvl %s0227; CHECK-NEXT: vmulu.w %v0, 8, %v0228; CHECK-NEXT: b.l.t (, %s10)229 %2 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vsvl(i32 8, <256 x double> %0, i32 256)230 ret <256 x double> %2231}232 233; Function Attrs: nounwind readnone234define fastcc <256 x double> @vmuluw_vsvvl_imm(<256 x double> %0, <256 x double> %1) {235; CHECK-LABEL: vmuluw_vsvvl_imm:236; CHECK: # %bb.0:237; CHECK-NEXT: lea %s0, 128238; CHECK-NEXT: lvl %s0239; CHECK-NEXT: vmulu.w %v1, 8, %v0240; CHECK-NEXT: lea %s16, 256241; CHECK-NEXT: lvl %s16242; CHECK-NEXT: vor %v0, (0)1, %v1243; CHECK-NEXT: b.l.t (, %s10)244 %3 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)245 ret <256 x double> %3246}247 248; Function Attrs: nounwind readnone249define fastcc <256 x double> @vmuluw_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {250; CHECK-LABEL: vmuluw_vvvmvl:251; CHECK: # %bb.0:252; CHECK-NEXT: lea %s0, 128253; CHECK-NEXT: lvl %s0254; CHECK-NEXT: vmulu.w %v2, %v0, %v1, %vm1255; CHECK-NEXT: lea %s16, 256256; CHECK-NEXT: lvl %s16257; CHECK-NEXT: vor %v0, (0)1, %v2258; CHECK-NEXT: b.l.t (, %s10)259 %5 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)260 ret <256 x double> %5261}262 263; Function Attrs: nounwind readnone264declare <256 x double> @llvm.ve.vl.vmuluw.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)265 266; Function Attrs: nounwind readnone267define fastcc <256 x double> @vmuluw_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {268; CHECK-LABEL: vmuluw_vsvmvl:269; CHECK: # %bb.0:270; CHECK-NEXT: and %s0, %s0, (32)0271; CHECK-NEXT: lea %s1, 128272; CHECK-NEXT: lvl %s1273; CHECK-NEXT: vmulu.w %v1, %s0, %v0, %vm1274; CHECK-NEXT: lea %s16, 256275; CHECK-NEXT: lvl %s16276; CHECK-NEXT: vor %v0, (0)1, %v1277; CHECK-NEXT: b.l.t (, %s10)278 %5 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)279 ret <256 x double> %5280}281 282; Function Attrs: nounwind readnone283declare <256 x double> @llvm.ve.vl.vmuluw.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)284 285; Function Attrs: nounwind readnone286define fastcc <256 x double> @vmuluw_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {287; CHECK-LABEL: vmuluw_vsvmvl_imm:288; CHECK: # %bb.0:289; CHECK-NEXT: lea %s0, 128290; CHECK-NEXT: lvl %s0291; CHECK-NEXT: vmulu.w %v1, 8, %v0, %vm1292; CHECK-NEXT: lea %s16, 256293; CHECK-NEXT: lvl %s16294; CHECK-NEXT: vor %v0, (0)1, %v1295; CHECK-NEXT: b.l.t (, %s10)296 %4 = tail call fast <256 x double> @llvm.ve.vl.vmuluw.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)297 ret <256 x double> %4298}299 300; Function Attrs: nounwind readnone301define fastcc <256 x double> @vmulswsx_vvvl(<256 x double> %0, <256 x double> %1) {302; CHECK-LABEL: vmulswsx_vvvl:303; CHECK: # %bb.0:304; CHECK-NEXT: lea %s0, 256305; CHECK-NEXT: lvl %s0306; CHECK-NEXT: vmuls.w.sx %v0, %v0, %v1307; CHECK-NEXT: b.l.t (, %s10)308 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)309 ret <256 x double> %3310}311 312; Function Attrs: nounwind readnone313declare <256 x double> @llvm.ve.vl.vmulswsx.vvvl(<256 x double>, <256 x double>, i32)314 315; Function Attrs: nounwind readnone316define fastcc <256 x double> @vmulswsx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {317; CHECK-LABEL: vmulswsx_vvvvl:318; CHECK: # %bb.0:319; CHECK-NEXT: lea %s0, 128320; CHECK-NEXT: lvl %s0321; CHECK-NEXT: vmuls.w.sx %v2, %v0, %v1322; CHECK-NEXT: lea %s16, 256323; CHECK-NEXT: lvl %s16324; CHECK-NEXT: vor %v0, (0)1, %v2325; CHECK-NEXT: b.l.t (, %s10)326 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)327 ret <256 x double> %4328}329 330; Function Attrs: nounwind readnone331declare <256 x double> @llvm.ve.vl.vmulswsx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)332 333; Function Attrs: nounwind readnone334define fastcc <256 x double> @vmulswsx_vsvl(i32 signext %0, <256 x double> %1) {335; CHECK-LABEL: vmulswsx_vsvl:336; CHECK: # %bb.0:337; CHECK-NEXT: and %s0, %s0, (32)0338; CHECK-NEXT: lea %s1, 256339; CHECK-NEXT: lvl %s1340; CHECK-NEXT: vmuls.w.sx %v0, %s0, %v0341; CHECK-NEXT: b.l.t (, %s10)342 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vsvl(i32 %0, <256 x double> %1, i32 256)343 ret <256 x double> %3344}345 346; Function Attrs: nounwind readnone347declare <256 x double> @llvm.ve.vl.vmulswsx.vsvl(i32, <256 x double>, i32)348 349; Function Attrs: nounwind readnone350define fastcc <256 x double> @vmulswsx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {351; CHECK-LABEL: vmulswsx_vsvvl:352; CHECK: # %bb.0:353; CHECK-NEXT: and %s0, %s0, (32)0354; CHECK-NEXT: lea %s1, 128355; CHECK-NEXT: lvl %s1356; CHECK-NEXT: vmuls.w.sx %v1, %s0, %v0357; CHECK-NEXT: lea %s16, 256358; CHECK-NEXT: lvl %s16359; CHECK-NEXT: vor %v0, (0)1, %v1360; CHECK-NEXT: b.l.t (, %s10)361 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)362 ret <256 x double> %4363}364 365; Function Attrs: nounwind readnone366declare <256 x double> @llvm.ve.vl.vmulswsx.vsvvl(i32, <256 x double>, <256 x double>, i32)367 368; Function Attrs: nounwind readnone369define fastcc <256 x double> @vmulswsx_vsvl_imm(<256 x double> %0) {370; CHECK-LABEL: vmulswsx_vsvl_imm:371; CHECK: # %bb.0:372; CHECK-NEXT: lea %s0, 256373; CHECK-NEXT: lvl %s0374; CHECK-NEXT: vmuls.w.sx %v0, 8, %v0375; CHECK-NEXT: b.l.t (, %s10)376 %2 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vsvl(i32 8, <256 x double> %0, i32 256)377 ret <256 x double> %2378}379 380; Function Attrs: nounwind readnone381define fastcc <256 x double> @vmulswsx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {382; CHECK-LABEL: vmulswsx_vsvvl_imm:383; CHECK: # %bb.0:384; CHECK-NEXT: lea %s0, 128385; CHECK-NEXT: lvl %s0386; CHECK-NEXT: vmuls.w.sx %v1, 8, %v0387; CHECK-NEXT: lea %s16, 256388; CHECK-NEXT: lvl %s16389; CHECK-NEXT: vor %v0, (0)1, %v1390; CHECK-NEXT: b.l.t (, %s10)391 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)392 ret <256 x double> %3393}394 395; Function Attrs: nounwind readnone396define fastcc <256 x double> @vmulswsx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {397; CHECK-LABEL: vmulswsx_vvvmvl:398; CHECK: # %bb.0:399; CHECK-NEXT: lea %s0, 128400; CHECK-NEXT: lvl %s0401; CHECK-NEXT: vmuls.w.sx %v2, %v0, %v1, %vm1402; CHECK-NEXT: lea %s16, 256403; CHECK-NEXT: lvl %s16404; CHECK-NEXT: vor %v0, (0)1, %v2405; CHECK-NEXT: b.l.t (, %s10)406 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)407 ret <256 x double> %5408}409 410; Function Attrs: nounwind readnone411declare <256 x double> @llvm.ve.vl.vmulswsx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)412 413; Function Attrs: nounwind readnone414define fastcc <256 x double> @vmulswsx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {415; CHECK-LABEL: vmulswsx_vsvmvl:416; CHECK: # %bb.0:417; CHECK-NEXT: and %s0, %s0, (32)0418; CHECK-NEXT: lea %s1, 128419; CHECK-NEXT: lvl %s1420; CHECK-NEXT: vmuls.w.sx %v1, %s0, %v0, %vm1421; CHECK-NEXT: lea %s16, 256422; CHECK-NEXT: lvl %s16423; CHECK-NEXT: vor %v0, (0)1, %v1424; CHECK-NEXT: b.l.t (, %s10)425 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)426 ret <256 x double> %5427}428 429; Function Attrs: nounwind readnone430declare <256 x double> @llvm.ve.vl.vmulswsx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)431 432; Function Attrs: nounwind readnone433define fastcc <256 x double> @vmulswsx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {434; CHECK-LABEL: vmulswsx_vsvmvl_imm:435; CHECK: # %bb.0:436; CHECK-NEXT: lea %s0, 128437; CHECK-NEXT: lvl %s0438; CHECK-NEXT: vmuls.w.sx %v1, 8, %v0, %vm1439; CHECK-NEXT: lea %s16, 256440; CHECK-NEXT: lvl %s16441; CHECK-NEXT: vor %v0, (0)1, %v1442; CHECK-NEXT: b.l.t (, %s10)443 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulswsx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)444 ret <256 x double> %4445}446 447; Function Attrs: nounwind readnone448define fastcc <256 x double> @vmulswzx_vvvl(<256 x double> %0, <256 x double> %1) {449; CHECK-LABEL: vmulswzx_vvvl:450; CHECK: # %bb.0:451; CHECK-NEXT: lea %s0, 256452; CHECK-NEXT: lvl %s0453; CHECK-NEXT: vmuls.w.zx %v0, %v0, %v1454; CHECK-NEXT: b.l.t (, %s10)455 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vvvl(<256 x double> %0, <256 x double> %1, i32 256)456 ret <256 x double> %3457}458 459; Function Attrs: nounwind readnone460declare <256 x double> @llvm.ve.vl.vmulswzx.vvvl(<256 x double>, <256 x double>, i32)461 462; Function Attrs: nounwind readnone463define fastcc <256 x double> @vmulswzx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {464; CHECK-LABEL: vmulswzx_vvvvl:465; CHECK: # %bb.0:466; CHECK-NEXT: lea %s0, 128467; CHECK-NEXT: lvl %s0468; CHECK-NEXT: vmuls.w.zx %v2, %v0, %v1469; CHECK-NEXT: lea %s16, 256470; CHECK-NEXT: lvl %s16471; CHECK-NEXT: vor %v0, (0)1, %v2472; CHECK-NEXT: b.l.t (, %s10)473 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)474 ret <256 x double> %4475}476 477; Function Attrs: nounwind readnone478declare <256 x double> @llvm.ve.vl.vmulswzx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)479 480; Function Attrs: nounwind readnone481define fastcc <256 x double> @vmulswzx_vsvl(i32 signext %0, <256 x double> %1) {482; CHECK-LABEL: vmulswzx_vsvl:483; CHECK: # %bb.0:484; CHECK-NEXT: and %s0, %s0, (32)0485; CHECK-NEXT: lea %s1, 256486; CHECK-NEXT: lvl %s1487; CHECK-NEXT: vmuls.w.zx %v0, %s0, %v0488; CHECK-NEXT: b.l.t (, %s10)489 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vsvl(i32 %0, <256 x double> %1, i32 256)490 ret <256 x double> %3491}492 493; Function Attrs: nounwind readnone494declare <256 x double> @llvm.ve.vl.vmulswzx.vsvl(i32, <256 x double>, i32)495 496; Function Attrs: nounwind readnone497define fastcc <256 x double> @vmulswzx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {498; CHECK-LABEL: vmulswzx_vsvvl:499; CHECK: # %bb.0:500; CHECK-NEXT: and %s0, %s0, (32)0501; CHECK-NEXT: lea %s1, 128502; CHECK-NEXT: lvl %s1503; CHECK-NEXT: vmuls.w.zx %v1, %s0, %v0504; CHECK-NEXT: lea %s16, 256505; CHECK-NEXT: lvl %s16506; CHECK-NEXT: vor %v0, (0)1, %v1507; CHECK-NEXT: b.l.t (, %s10)508 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)509 ret <256 x double> %4510}511 512; Function Attrs: nounwind readnone513declare <256 x double> @llvm.ve.vl.vmulswzx.vsvvl(i32, <256 x double>, <256 x double>, i32)514 515; Function Attrs: nounwind readnone516define fastcc <256 x double> @vmulswzx_vsvl_imm(<256 x double> %0) {517; CHECK-LABEL: vmulswzx_vsvl_imm:518; CHECK: # %bb.0:519; CHECK-NEXT: lea %s0, 256520; CHECK-NEXT: lvl %s0521; CHECK-NEXT: vmuls.w.zx %v0, 8, %v0522; CHECK-NEXT: b.l.t (, %s10)523 %2 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vsvl(i32 8, <256 x double> %0, i32 256)524 ret <256 x double> %2525}526 527; Function Attrs: nounwind readnone528define fastcc <256 x double> @vmulswzx_vsvvl_imm(<256 x double> %0, <256 x double> %1) {529; CHECK-LABEL: vmulswzx_vsvvl_imm:530; CHECK: # %bb.0:531; CHECK-NEXT: lea %s0, 128532; CHECK-NEXT: lvl %s0533; CHECK-NEXT: vmuls.w.zx %v1, 8, %v0534; CHECK-NEXT: lea %s16, 256535; CHECK-NEXT: lvl %s16536; CHECK-NEXT: vor %v0, (0)1, %v1537; CHECK-NEXT: b.l.t (, %s10)538 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)539 ret <256 x double> %3540}541 542; Function Attrs: nounwind readnone543define fastcc <256 x double> @vmulswzx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {544; CHECK-LABEL: vmulswzx_vvvmvl:545; CHECK: # %bb.0:546; CHECK-NEXT: lea %s0, 128547; CHECK-NEXT: lvl %s0548; CHECK-NEXT: vmuls.w.zx %v2, %v0, %v1, %vm1549; CHECK-NEXT: lea %s16, 256550; CHECK-NEXT: lvl %s16551; CHECK-NEXT: vor %v0, (0)1, %v2552; CHECK-NEXT: b.l.t (, %s10)553 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)554 ret <256 x double> %5555}556 557; Function Attrs: nounwind readnone558declare <256 x double> @llvm.ve.vl.vmulswzx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)559 560; Function Attrs: nounwind readnone561define fastcc <256 x double> @vmulswzx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {562; CHECK-LABEL: vmulswzx_vsvmvl:563; CHECK: # %bb.0:564; CHECK-NEXT: and %s0, %s0, (32)0565; CHECK-NEXT: lea %s1, 128566; CHECK-NEXT: lvl %s1567; CHECK-NEXT: vmuls.w.zx %v1, %s0, %v0, %vm1568; CHECK-NEXT: lea %s16, 256569; CHECK-NEXT: lvl %s16570; CHECK-NEXT: vor %v0, (0)1, %v1571; CHECK-NEXT: b.l.t (, %s10)572 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)573 ret <256 x double> %5574}575 576; Function Attrs: nounwind readnone577declare <256 x double> @llvm.ve.vl.vmulswzx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)578 579; Function Attrs: nounwind readnone580define fastcc <256 x double> @vmulswzx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {581; CHECK-LABEL: vmulswzx_vsvmvl_imm:582; CHECK: # %bb.0:583; CHECK-NEXT: lea %s0, 128584; CHECK-NEXT: lvl %s0585; CHECK-NEXT: vmuls.w.zx %v1, 8, %v0, %vm1586; CHECK-NEXT: lea %s16, 256587; CHECK-NEXT: lvl %s16588; CHECK-NEXT: vor %v0, (0)1, %v1589; CHECK-NEXT: b.l.t (, %s10)590 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulswzx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)591 ret <256 x double> %4592}593 594; Function Attrs: nounwind readnone595define fastcc <256 x double> @vmulsl_vvvl(<256 x double> %0, <256 x double> %1) {596; CHECK-LABEL: vmulsl_vvvl:597; CHECK: # %bb.0:598; CHECK-NEXT: lea %s0, 256599; CHECK-NEXT: lvl %s0600; CHECK-NEXT: vmuls.l %v0, %v0, %v1601; CHECK-NEXT: b.l.t (, %s10)602 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vvvl(<256 x double> %0, <256 x double> %1, i32 256)603 ret <256 x double> %3604}605 606; Function Attrs: nounwind readnone607declare <256 x double> @llvm.ve.vl.vmulsl.vvvl(<256 x double>, <256 x double>, i32)608 609; Function Attrs: nounwind readnone610define fastcc <256 x double> @vmulsl_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {611; CHECK-LABEL: vmulsl_vvvvl:612; CHECK: # %bb.0:613; CHECK-NEXT: lea %s0, 128614; CHECK-NEXT: lvl %s0615; CHECK-NEXT: vmuls.l %v2, %v0, %v1616; CHECK-NEXT: lea %s16, 256617; CHECK-NEXT: lvl %s16618; CHECK-NEXT: vor %v0, (0)1, %v2619; CHECK-NEXT: b.l.t (, %s10)620 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)621 ret <256 x double> %4622}623 624; Function Attrs: nounwind readnone625declare <256 x double> @llvm.ve.vl.vmulsl.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)626 627; Function Attrs: nounwind readnone628define fastcc <256 x double> @vmulsl_vsvl(i64 %0, <256 x double> %1) {629; CHECK-LABEL: vmulsl_vsvl:630; CHECK: # %bb.0:631; CHECK-NEXT: lea %s1, 256632; CHECK-NEXT: lvl %s1633; CHECK-NEXT: vmuls.l %v0, %s0, %v0634; CHECK-NEXT: b.l.t (, %s10)635 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vsvl(i64 %0, <256 x double> %1, i32 256)636 ret <256 x double> %3637}638 639; Function Attrs: nounwind readnone640declare <256 x double> @llvm.ve.vl.vmulsl.vsvl(i64, <256 x double>, i32)641 642; Function Attrs: nounwind readnone643define fastcc <256 x double> @vmulsl_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {644; CHECK-LABEL: vmulsl_vsvvl:645; CHECK: # %bb.0:646; CHECK-NEXT: lea %s1, 128647; CHECK-NEXT: lvl %s1648; CHECK-NEXT: vmuls.l %v1, %s0, %v0649; CHECK-NEXT: lea %s16, 256650; CHECK-NEXT: lvl %s16651; CHECK-NEXT: vor %v0, (0)1, %v1652; CHECK-NEXT: b.l.t (, %s10)653 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)654 ret <256 x double> %4655}656 657; Function Attrs: nounwind readnone658declare <256 x double> @llvm.ve.vl.vmulsl.vsvvl(i64, <256 x double>, <256 x double>, i32)659 660; Function Attrs: nounwind readnone661define fastcc <256 x double> @vmulsl_vsvl_imm(<256 x double> %0) {662; CHECK-LABEL: vmulsl_vsvl_imm:663; CHECK: # %bb.0:664; CHECK-NEXT: lea %s0, 256665; CHECK-NEXT: lvl %s0666; CHECK-NEXT: vmuls.l %v0, 8, %v0667; CHECK-NEXT: b.l.t (, %s10)668 %2 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vsvl(i64 8, <256 x double> %0, i32 256)669 ret <256 x double> %2670}671 672; Function Attrs: nounwind readnone673define fastcc <256 x double> @vmulsl_vsvvl_imm(<256 x double> %0, <256 x double> %1) {674; CHECK-LABEL: vmulsl_vsvvl_imm:675; CHECK: # %bb.0:676; CHECK-NEXT: lea %s0, 128677; CHECK-NEXT: lvl %s0678; CHECK-NEXT: vmuls.l %v1, 8, %v0679; CHECK-NEXT: lea %s16, 256680; CHECK-NEXT: lvl %s16681; CHECK-NEXT: vor %v0, (0)1, %v1682; CHECK-NEXT: b.l.t (, %s10)683 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128)684 ret <256 x double> %3685}686 687; Function Attrs: nounwind readnone688define fastcc <256 x double> @vmulsl_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {689; CHECK-LABEL: vmulsl_vvvmvl:690; CHECK: # %bb.0:691; CHECK-NEXT: lea %s0, 128692; CHECK-NEXT: lvl %s0693; CHECK-NEXT: vmuls.l %v2, %v0, %v1, %vm1694; CHECK-NEXT: lea %s16, 256695; CHECK-NEXT: lvl %s16696; CHECK-NEXT: vor %v0, (0)1, %v2697; CHECK-NEXT: b.l.t (, %s10)698 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)699 ret <256 x double> %5700}701 702; Function Attrs: nounwind readnone703declare <256 x double> @llvm.ve.vl.vmulsl.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)704 705; Function Attrs: nounwind readnone706define fastcc <256 x double> @vmulsl_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {707; CHECK-LABEL: vmulsl_vsvmvl:708; CHECK: # %bb.0:709; CHECK-NEXT: lea %s1, 128710; CHECK-NEXT: lvl %s1711; CHECK-NEXT: vmuls.l %v1, %s0, %v0, %vm1712; CHECK-NEXT: lea %s16, 256713; CHECK-NEXT: lvl %s16714; CHECK-NEXT: vor %v0, (0)1, %v1715; CHECK-NEXT: b.l.t (, %s10)716 %5 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)717 ret <256 x double> %5718}719 720; Function Attrs: nounwind readnone721declare <256 x double> @llvm.ve.vl.vmulsl.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)722 723; Function Attrs: nounwind readnone724define fastcc <256 x double> @vmulsl_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) {725; CHECK-LABEL: vmulsl_vsvmvl_imm:726; CHECK: # %bb.0:727; CHECK-NEXT: lea %s0, 128728; CHECK-NEXT: lvl %s0729; CHECK-NEXT: vmuls.l %v1, 8, %v0, %vm1730; CHECK-NEXT: lea %s16, 256731; CHECK-NEXT: lvl %s16732; CHECK-NEXT: vor %v0, (0)1, %v1733; CHECK-NEXT: b.l.t (, %s10)734 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulsl.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128)735 ret <256 x double> %4736}737 738; Function Attrs: nounwind readnone739define fastcc <256 x double> @vmulslw_vvvl(<256 x double> %0, <256 x double> %1) {740; CHECK-LABEL: vmulslw_vvvl:741; CHECK: # %bb.0:742; CHECK-NEXT: lea %s0, 256743; CHECK-NEXT: lvl %s0744; CHECK-NEXT: vmuls.l.w %v0, %v0, %v1745; CHECK-NEXT: b.l.t (, %s10)746 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulslw.vvvl(<256 x double> %0, <256 x double> %1, i32 256)747 ret <256 x double> %3748}749 750; Function Attrs: nounwind readnone751declare <256 x double> @llvm.ve.vl.vmulslw.vvvl(<256 x double>, <256 x double>, i32)752 753; Function Attrs: nounwind readnone754define fastcc <256 x double> @vmulslw_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {755; CHECK-LABEL: vmulslw_vvvvl:756; CHECK: # %bb.0:757; CHECK-NEXT: lea %s0, 128758; CHECK-NEXT: lvl %s0759; CHECK-NEXT: vmuls.l.w %v2, %v0, %v1760; CHECK-NEXT: lea %s16, 256761; CHECK-NEXT: lvl %s16762; CHECK-NEXT: vor %v0, (0)1, %v2763; CHECK-NEXT: b.l.t (, %s10)764 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulslw.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)765 ret <256 x double> %4766}767 768; Function Attrs: nounwind readnone769declare <256 x double> @llvm.ve.vl.vmulslw.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)770 771; Function Attrs: nounwind readnone772define fastcc <256 x double> @vmulslw_vsvl(i32 signext %0, <256 x double> %1) {773; CHECK-LABEL: vmulslw_vsvl:774; CHECK: # %bb.0:775; CHECK-NEXT: and %s0, %s0, (32)0776; CHECK-NEXT: lea %s1, 256777; CHECK-NEXT: lvl %s1778; CHECK-NEXT: vmuls.l.w %v0, %s0, %v0779; CHECK-NEXT: b.l.t (, %s10)780 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulslw.vsvl(i32 %0, <256 x double> %1, i32 256)781 ret <256 x double> %3782}783 784; Function Attrs: nounwind readnone785declare <256 x double> @llvm.ve.vl.vmulslw.vsvl(i32, <256 x double>, i32)786 787; Function Attrs: nounwind readnone788define fastcc <256 x double> @vmulslw_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) {789; CHECK-LABEL: vmulslw_vsvvl:790; CHECK: # %bb.0:791; CHECK-NEXT: and %s0, %s0, (32)0792; CHECK-NEXT: lea %s1, 128793; CHECK-NEXT: lvl %s1794; CHECK-NEXT: vmuls.l.w %v1, %s0, %v0795; CHECK-NEXT: lea %s16, 256796; CHECK-NEXT: lvl %s16797; CHECK-NEXT: vor %v0, (0)1, %v1798; CHECK-NEXT: b.l.t (, %s10)799 %4 = tail call fast <256 x double> @llvm.ve.vl.vmulslw.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128)800 ret <256 x double> %4801}802 803; Function Attrs: nounwind readnone804declare <256 x double> @llvm.ve.vl.vmulslw.vsvvl(i32, <256 x double>, <256 x double>, i32)805 806; Function Attrs: nounwind readnone807define fastcc <256 x double> @vmulslw_vsvl_imm(<256 x double> %0) {808; CHECK-LABEL: vmulslw_vsvl_imm:809; CHECK: # %bb.0:810; CHECK-NEXT: lea %s0, 256811; CHECK-NEXT: lvl %s0812; CHECK-NEXT: vmuls.l.w %v0, 8, %v0813; CHECK-NEXT: b.l.t (, %s10)814 %2 = tail call fast <256 x double> @llvm.ve.vl.vmulslw.vsvl(i32 8, <256 x double> %0, i32 256)815 ret <256 x double> %2816}817 818; Function Attrs: nounwind readnone819define fastcc <256 x double> @vmulslw_vsvvl_imm(<256 x double> %0, <256 x double> %1) {820; CHECK-LABEL: vmulslw_vsvvl_imm:821; CHECK: # %bb.0:822; CHECK-NEXT: lea %s0, 128823; CHECK-NEXT: lvl %s0824; CHECK-NEXT: vmuls.l.w %v1, 8, %v0825; CHECK-NEXT: lea %s16, 256826; CHECK-NEXT: lvl %s16827; CHECK-NEXT: vor %v0, (0)1, %v1828; CHECK-NEXT: b.l.t (, %s10)829 %3 = tail call fast <256 x double> @llvm.ve.vl.vmulslw.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128)830 ret <256 x double> %3831}832