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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector move intrinsic instructions4;;;5;;; Note:6;;; We test VMVivl and VMVivl_v, and VMVivml_v instructions.7 8; Function Attrs: nounwind9define void @vmv_vsvl(ptr %0, i32 signext %1) {10; CHECK-LABEL: vmv_vsvl:11; CHECK: # %bb.0:12; CHECK-NEXT: lea %s2, 25613; CHECK-NEXT: lvl %s214; CHECK-NEXT: vld %v0, 8, %s015; CHECK-NEXT: and %s1, %s1, (32)016; CHECK-NEXT: vmv %v0, %s1, %v017; CHECK-NEXT: vst %v0, 8, %s018; CHECK-NEXT: b.l.t (, %s10)19 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %0, i32 256)20 %4 = tail call fast <256 x double> @llvm.ve.vl.vmv.vsvl(i32 %1, <256 x double> %3, i32 256)21 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %4, i64 8, ptr %0, i32 256)22 ret void23}24 25; Function Attrs: nounwind readonly26declare <256 x double> @llvm.ve.vl.vld.vssl(i64, ptr, i32)27 28; Function Attrs: nounwind readnone29declare <256 x double> @llvm.ve.vl.vmv.vsvl(i32, <256 x double>, i32)30 31; Function Attrs: nounwind writeonly32declare void @llvm.ve.vl.vst.vssl(<256 x double>, i64, ptr, i32)33 34; Function Attrs: nounwind35define void @vmv_vsvl_imm(ptr %0) {36; CHECK-LABEL: vmv_vsvl_imm:37; CHECK: # %bb.0:38; CHECK-NEXT: lea %s1, 25639; CHECK-NEXT: lvl %s140; CHECK-NEXT: vld %v0, 8, %s041; CHECK-NEXT: vmv %v0, 31, %v042; CHECK-NEXT: vst %v0, 8, %s043; CHECK-NEXT: b.l.t (, %s10)44 %2 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %0, i32 256)45 %3 = tail call fast <256 x double> @llvm.ve.vl.vmv.vsvl(i32 31, <256 x double> %2, i32 256)46 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %3, i64 8, ptr %0, i32 256)47 ret void48}49 50; Function Attrs: nounwind51define void @vmv_vsvvl(ptr %0, i32 signext %1) {52; CHECK-LABEL: vmv_vsvvl:53; CHECK: # %bb.0:54; CHECK-NEXT: lea %s2, 25655; CHECK-NEXT: lvl %s256; CHECK-NEXT: vld %v0, 8, %s057; CHECK-NEXT: and %s1, %s1, (32)058; CHECK-NEXT: lea %s3, 12859; CHECK-NEXT: lvl %s360; CHECK-NEXT: vmv %v0, %s1, %v061; CHECK-NEXT: lvl %s262; CHECK-NEXT: vst %v0, 8, %s063; CHECK-NEXT: b.l.t (, %s10)64 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %0, i32 256)65 %4 = tail call fast <256 x double> @llvm.ve.vl.vmv.vsvvl(i32 %1, <256 x double> %3, <256 x double> %3, i32 128)66 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %4, i64 8, ptr %0, i32 256)67 ret void68}69 70; Function Attrs: nounwind readnone71declare <256 x double> @llvm.ve.vl.vmv.vsvvl(i32, <256 x double>, <256 x double>, i32)72 73; Function Attrs: nounwind74define void @vmv_vsvvl_imm(ptr %0) {75; CHECK-LABEL: vmv_vsvvl_imm:76; CHECK: # %bb.0:77; CHECK-NEXT: lea %s1, 25678; CHECK-NEXT: lvl %s179; CHECK-NEXT: vld %v0, 8, %s080; CHECK-NEXT: lea %s2, 12881; CHECK-NEXT: lvl %s282; CHECK-NEXT: vmv %v0, 31, %v083; CHECK-NEXT: lvl %s184; CHECK-NEXT: vst %v0, 8, %s085; CHECK-NEXT: b.l.t (, %s10)86 %2 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %0, i32 256)87 %3 = tail call fast <256 x double> @llvm.ve.vl.vmv.vsvvl(i32 31, <256 x double> %2, <256 x double> %2, i32 128)88 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %3, i64 8, ptr %0, i32 256)89 ret void90}91 92; Function Attrs: nounwind93define void @vmv_vsvmvl(ptr %0, i32 signext %1) {94; CHECK-LABEL: vmv_vsvmvl:95; CHECK: # %bb.0:96; CHECK-NEXT: lea %s2, 25697; CHECK-NEXT: lvl %s298; CHECK-NEXT: vld %v0, 8, %s099; CHECK-NEXT: and %s1, %s1, (32)0100; CHECK-NEXT: lea %s3, 128101; CHECK-NEXT: lvl %s3102; CHECK-NEXT: vmv %v0, %s1, %v0, %vm1103; CHECK-NEXT: lvl %s2104; CHECK-NEXT: vst %v0, 8, %s0105; CHECK-NEXT: b.l.t (, %s10)106 %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %0, i32 256)107 %4 = tail call fast <256 x double> @llvm.ve.vl.vmv.vsvmvl(i32 %1, <256 x double> %3, <256 x i1> undef, <256 x double> %3, i32 128)108 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %4, i64 8, ptr %0, i32 256)109 ret void110}111 112; Function Attrs: nounwind readnone113declare <256 x double> @llvm.ve.vl.vmv.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32)114 115; Function Attrs: nounwind116define void @vmv_vsvmvl_imm(ptr %0) {117; CHECK-LABEL: vmv_vsvmvl_imm:118; CHECK: # %bb.0:119; CHECK-NEXT: lea %s1, 256120; CHECK-NEXT: lvl %s1121; CHECK-NEXT: vld %v0, 8, %s0122; CHECK-NEXT: lea %s2, 128123; CHECK-NEXT: lvl %s2124; CHECK-NEXT: vmv %v0, 31, %v0, %vm1125; CHECK-NEXT: lvl %s1126; CHECK-NEXT: vst %v0, 8, %s0127; CHECK-NEXT: b.l.t (, %s10)128 %2 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, ptr %0, i32 256)129 %3 = tail call fast <256 x double> @llvm.ve.vl.vmv.vsvmvl(i32 31, <256 x double> %2, <256 x i1> undef, <256 x double> %2, i32 128)130 tail call void @llvm.ve.vl.vst.vssl(<256 x double> %3, i64 8, ptr %0, i32 256)131 ret void132}133