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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3;;; Test vector xor intrinsic instructions4;;;5;;; Note:6;;; We test VXOR*vvl, VXOR*vvl_v, VXOR*rvl, VXOR*rvl_v, VXOR*vvml_v,7;;; VXOR*rvml_v, PVXOR*vvl, PVXOR*vvl_v, PVXOR*rvl, PVXOR*rvl_v, PVXOR*vvml_v,8;;; and PVXOR*rvml_v instructions.9 10; Function Attrs: nounwind readnone11define fastcc <256 x double> @vxor_vvvl(<256 x double> %0, <256 x double> %1) {12; CHECK-LABEL: vxor_vvvl:13; CHECK: # %bb.0:14; CHECK-NEXT: lea %s0, 25615; CHECK-NEXT: lvl %s016; CHECK-NEXT: vxor %v0, %v0, %v117; CHECK-NEXT: b.l.t (, %s10)18 %3 = tail call fast <256 x double> @llvm.ve.vl.vxor.vvvl(<256 x double> %0, <256 x double> %1, i32 256)19 ret <256 x double> %320}21 22; Function Attrs: nounwind readnone23declare <256 x double> @llvm.ve.vl.vxor.vvvl(<256 x double>, <256 x double>, i32)24 25; Function Attrs: nounwind readnone26define fastcc <256 x double> @vxor_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {27; CHECK-LABEL: vxor_vvvvl:28; CHECK: # %bb.0:29; CHECK-NEXT: lea %s0, 12830; CHECK-NEXT: lvl %s031; CHECK-NEXT: vxor %v2, %v0, %v132; CHECK-NEXT: lea %s16, 25633; CHECK-NEXT: lvl %s1634; CHECK-NEXT: vor %v0, (0)1, %v235; CHECK-NEXT: b.l.t (, %s10)36 %4 = tail call fast <256 x double> @llvm.ve.vl.vxor.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)37 ret <256 x double> %438}39 40; Function Attrs: nounwind readnone41declare <256 x double> @llvm.ve.vl.vxor.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)42 43; Function Attrs: nounwind readnone44define fastcc <256 x double> @vxor_vsvl(i64 %0, <256 x double> %1) {45; CHECK-LABEL: vxor_vsvl:46; CHECK: # %bb.0:47; CHECK-NEXT: lea %s1, 25648; CHECK-NEXT: lvl %s149; CHECK-NEXT: vxor %v0, %s0, %v050; CHECK-NEXT: b.l.t (, %s10)51 %3 = tail call fast <256 x double> @llvm.ve.vl.vxor.vsvl(i64 %0, <256 x double> %1, i32 256)52 ret <256 x double> %353}54 55; Function Attrs: nounwind readnone56declare <256 x double> @llvm.ve.vl.vxor.vsvl(i64, <256 x double>, i32)57 58; Function Attrs: nounwind readnone59define fastcc <256 x double> @vxor_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {60; CHECK-LABEL: vxor_vsvvl:61; CHECK: # %bb.0:62; CHECK-NEXT: lea %s1, 12863; CHECK-NEXT: lvl %s164; CHECK-NEXT: vxor %v1, %s0, %v065; CHECK-NEXT: lea %s16, 25666; CHECK-NEXT: lvl %s1667; CHECK-NEXT: vor %v0, (0)1, %v168; CHECK-NEXT: b.l.t (, %s10)69 %4 = tail call fast <256 x double> @llvm.ve.vl.vxor.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)70 ret <256 x double> %471}72 73; Function Attrs: nounwind readnone74declare <256 x double> @llvm.ve.vl.vxor.vsvvl(i64, <256 x double>, <256 x double>, i32)75 76; Function Attrs: nounwind readnone77define fastcc <256 x double> @vxor_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {78; CHECK-LABEL: vxor_vvvmvl:79; CHECK: # %bb.0:80; CHECK-NEXT: lea %s0, 12881; CHECK-NEXT: lvl %s082; CHECK-NEXT: vxor %v2, %v0, %v1, %vm183; CHECK-NEXT: lea %s16, 25684; CHECK-NEXT: lvl %s1685; CHECK-NEXT: vor %v0, (0)1, %v286; CHECK-NEXT: b.l.t (, %s10)87 %5 = tail call fast <256 x double> @llvm.ve.vl.vxor.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)88 ret <256 x double> %589}90 91; Function Attrs: nounwind readnone92declare <256 x double> @llvm.ve.vl.vxor.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)93 94; Function Attrs: nounwind readnone95define fastcc <256 x double> @vxor_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {96; CHECK-LABEL: vxor_vsvmvl:97; CHECK: # %bb.0:98; CHECK-NEXT: lea %s1, 12899; CHECK-NEXT: lvl %s1100; CHECK-NEXT: vxor %v1, %s0, %v0, %vm1101; CHECK-NEXT: lea %s16, 256102; CHECK-NEXT: lvl %s16103; CHECK-NEXT: vor %v0, (0)1, %v1104; CHECK-NEXT: b.l.t (, %s10)105 %5 = tail call fast <256 x double> @llvm.ve.vl.vxor.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)106 ret <256 x double> %5107}108 109; Function Attrs: nounwind readnone110declare <256 x double> @llvm.ve.vl.vxor.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32)111 112; Function Attrs: nounwind readnone113define fastcc <256 x double> @pvxor_vvvl(<256 x double> %0, <256 x double> %1) {114; CHECK-LABEL: pvxor_vvvl:115; CHECK: # %bb.0:116; CHECK-NEXT: lea %s0, 256117; CHECK-NEXT: lvl %s0118; CHECK-NEXT: pvxor %v0, %v0, %v1119; CHECK-NEXT: b.l.t (, %s10)120 %3 = tail call fast <256 x double> @llvm.ve.vl.pvxor.vvvl(<256 x double> %0, <256 x double> %1, i32 256)121 ret <256 x double> %3122}123 124; Function Attrs: nounwind readnone125declare <256 x double> @llvm.ve.vl.pvxor.vvvl(<256 x double>, <256 x double>, i32)126 127; Function Attrs: nounwind readnone128define fastcc <256 x double> @pvxor_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {129; CHECK-LABEL: pvxor_vvvvl:130; CHECK: # %bb.0:131; CHECK-NEXT: lea %s0, 128132; CHECK-NEXT: lvl %s0133; CHECK-NEXT: pvxor %v2, %v0, %v1134; CHECK-NEXT: lea %s16, 256135; CHECK-NEXT: lvl %s16136; CHECK-NEXT: vor %v0, (0)1, %v2137; CHECK-NEXT: b.l.t (, %s10)138 %4 = tail call fast <256 x double> @llvm.ve.vl.pvxor.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)139 ret <256 x double> %4140}141 142; Function Attrs: nounwind readnone143declare <256 x double> @llvm.ve.vl.pvxor.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)144 145; Function Attrs: nounwind readnone146define fastcc <256 x double> @pvxor_vsvl(i64 %0, <256 x double> %1) {147; CHECK-LABEL: pvxor_vsvl:148; CHECK: # %bb.0:149; CHECK-NEXT: lea %s1, 256150; CHECK-NEXT: lvl %s1151; CHECK-NEXT: pvxor %v0, %s0, %v0152; CHECK-NEXT: b.l.t (, %s10)153 %3 = tail call fast <256 x double> @llvm.ve.vl.pvxor.vsvl(i64 %0, <256 x double> %1, i32 256)154 ret <256 x double> %3155}156 157; Function Attrs: nounwind readnone158declare <256 x double> @llvm.ve.vl.pvxor.vsvl(i64, <256 x double>, i32)159 160; Function Attrs: nounwind readnone161define fastcc <256 x double> @pvxor_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {162; CHECK-LABEL: pvxor_vsvvl:163; CHECK: # %bb.0:164; CHECK-NEXT: lea %s1, 128165; CHECK-NEXT: lvl %s1166; CHECK-NEXT: pvxor %v1, %s0, %v0167; CHECK-NEXT: lea %s16, 256168; CHECK-NEXT: lvl %s16169; CHECK-NEXT: vor %v0, (0)1, %v1170; CHECK-NEXT: b.l.t (, %s10)171 %4 = tail call fast <256 x double> @llvm.ve.vl.pvxor.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)172 ret <256 x double> %4173}174 175; Function Attrs: nounwind readnone176declare <256 x double> @llvm.ve.vl.pvxor.vsvvl(i64, <256 x double>, <256 x double>, i32)177 178; Function Attrs: nounwind readnone179define fastcc <256 x double> @pvxor_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {180; CHECK-LABEL: pvxor_vvvMvl:181; CHECK: # %bb.0:182; CHECK-NEXT: lea %s0, 128183; CHECK-NEXT: lvl %s0184; CHECK-NEXT: pvxor %v2, %v0, %v1, %vm2185; CHECK-NEXT: lea %s16, 256186; CHECK-NEXT: lvl %s16187; CHECK-NEXT: vor %v0, (0)1, %v2188; CHECK-NEXT: b.l.t (, %s10)189 %5 = tail call fast <256 x double> @llvm.ve.vl.pvxor.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)190 ret <256 x double> %5191}192 193; Function Attrs: nounwind readnone194declare <256 x double> @llvm.ve.vl.pvxor.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)195 196; Function Attrs: nounwind readnone197define fastcc <256 x double> @pvxor_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {198; CHECK-LABEL: pvxor_vsvMvl:199; CHECK: # %bb.0:200; CHECK-NEXT: lea %s1, 128201; CHECK-NEXT: lvl %s1202; CHECK-NEXT: pvxor %v1, %s0, %v0, %vm2203; CHECK-NEXT: lea %s16, 256204; CHECK-NEXT: lvl %s16205; CHECK-NEXT: vor %v0, (0)1, %v1206; CHECK-NEXT: b.l.t (, %s10)207 %5 = tail call fast <256 x double> @llvm.ve.vl.pvxor.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)208 ret <256 x double> %5209}210 211; Function Attrs: nounwind readnone212declare <256 x double> @llvm.ve.vl.pvxor.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)213