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1; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s2 3 4;;; <256 x i64>5 6define fastcc i64 @extract_rr_v256i64(i32 signext %idx, <256 x i64> %v) {7; CHECK-LABEL: extract_rr_v256i64:8; CHECK: # %bb.0:9; CHECK-NEXT: and %s0, %s0, (32)010; CHECK-NEXT: lvs %s0, %v0(%s0)11; CHECK-NEXT: b.l.t (, %s10)12 %ret = extractelement <256 x i64> %v, i32 %idx13 ret i64 %ret14}15 16define fastcc i64 @extract_ri7_v256i64(<256 x i64> %v) {17; CHECK-LABEL: extract_ri7_v256i64:18; CHECK: # %bb.0:19; CHECK-NEXT: lvs %s0, %v0(127)20; CHECK-NEXT: b.l.t (, %s10)21 %ret = extractelement <256 x i64> %v, i32 12722 ret i64 %ret23}24 25define fastcc i64 @extract_ri8_v256i64(<256 x i64> %v) {26; CHECK-LABEL: extract_ri8_v256i64:27; CHECK: # %bb.0:28; CHECK-NEXT: lea %s0, 12829; CHECK-NEXT: lvs %s0, %v0(%s0)30; CHECK-NEXT: b.l.t (, %s10)31 %ret = extractelement <256 x i64> %v, i32 12832 ret i64 %ret33}34 35define fastcc i64 @extract_ri_v512i64(<512 x i64> %v) {36; CHECK-LABEL: extract_ri_v512i64:37; CHECK: # %bb.0:38; CHECK-NEXT: lvs %s0, %v1(116)39; CHECK-NEXT: b.l.t (, %s10)40 %ret = extractelement <512 x i64> %v, i32 37241 ret i64 %ret42}43 44;;; <256 x i32>45 46define fastcc i32 @extract_rr_v256i32(i32 signext %idx, <256 x i32> %v) {47; CHECK-LABEL: extract_rr_v256i32:48; CHECK: # %bb.0:49; CHECK-NEXT: and %s0, %s0, (32)050; CHECK-NEXT: lvs %s0, %v0(%s0)51; CHECK-NEXT: b.l.t (, %s10)52 %ret = extractelement <256 x i32> %v, i32 %idx53 ret i32 %ret54}55 56define fastcc i32 @extract_ri7_v256i32(<256 x i32> %v) {57; CHECK-LABEL: extract_ri7_v256i32:58; CHECK: # %bb.0:59; CHECK-NEXT: lvs %s0, %v0(127)60; CHECK-NEXT: b.l.t (, %s10)61 %ret = extractelement <256 x i32> %v, i32 12762 ret i32 %ret63}64 65define fastcc i32 @extract_ri8_v256i32(<256 x i32> %v) {66; CHECK-LABEL: extract_ri8_v256i32:67; CHECK: # %bb.0:68; CHECK-NEXT: lea %s0, 12869; CHECK-NEXT: lvs %s0, %v0(%s0)70; CHECK-NEXT: b.l.t (, %s10)71 %ret = extractelement <256 x i32> %v, i32 12872 ret i32 %ret73}74 75define fastcc i32 @extract_ri_v512i32(<512 x i32> %v) {76; CHECK-LABEL: extract_ri_v512i32:77; CHECK: # %bb.0:78; CHECK-NEXT: lea %s0, 18679; CHECK-NEXT: lvs %s0, %v0(%s0)80; CHECK-NEXT: srl %s0, %s0, 3281; CHECK-NEXT: b.l.t (, %s10)82 %ret = extractelement <512 x i32> %v, i32 37283 ret i32 %ret84}85 86define fastcc i32 @extract_rr_v512i32(<512 x i32> %v, i32 signext %idx) {87; CHECK-LABEL: extract_rr_v512i32:88; CHECK: # %bb.0:89; CHECK-NEXT: lea %s1, -290; CHECK-NEXT: and %s1, %s1, (32)091; CHECK-NEXT: and %s1, %s0, %s192; CHECK-NEXT: srl %s1, %s1, 193; CHECK-NEXT: lvs %s1, %v0(%s1)94; CHECK-NEXT: nnd %s0, %s0, (63)095; CHECK-NEXT: sla.w.sx %s0, %s0, 596; CHECK-NEXT: srl %s0, %s1, %s097; CHECK-NEXT: and %s0, %s0, (32)098; CHECK-NEXT: b.l.t (, %s10)99 %ret = extractelement <512 x i32> %v, i32 %idx100 ret i32 %ret101}102 103;;; <256 x double>104 105define fastcc double @extract_rr_v256f64(i32 signext %idx, <256 x double> %v) {106; CHECK-LABEL: extract_rr_v256f64:107; CHECK: # %bb.0:108; CHECK-NEXT: and %s0, %s0, (32)0109; CHECK-NEXT: lvs %s0, %v0(%s0)110; CHECK-NEXT: b.l.t (, %s10)111 %ret = extractelement <256 x double> %v, i32 %idx112 ret double %ret113}114 115define fastcc double @extract_ri7_v256f64(<256 x double> %v) {116; CHECK-LABEL: extract_ri7_v256f64:117; CHECK: # %bb.0:118; CHECK-NEXT: lvs %s0, %v0(127)119; CHECK-NEXT: b.l.t (, %s10)120 %ret = extractelement <256 x double> %v, i32 127121 ret double %ret122}123 124define fastcc double @extract_ri8_v256f64(<256 x double> %v) {125; CHECK-LABEL: extract_ri8_v256f64:126; CHECK: # %bb.0:127; CHECK-NEXT: lea %s0, 128128; CHECK-NEXT: lvs %s0, %v0(%s0)129; CHECK-NEXT: b.l.t (, %s10)130 %ret = extractelement <256 x double> %v, i32 128131 ret double %ret132}133 134define fastcc double @extract_ri_v512f64(<512 x double> %v) {135; CHECK-LABEL: extract_ri_v512f64:136; CHECK: # %bb.0:137; CHECK-NEXT: lvs %s0, %v1(116)138; CHECK-NEXT: b.l.t (, %s10)139 %ret = extractelement <512 x double> %v, i32 372140 ret double %ret141}142 143;;; <256 x float>144 145define fastcc float @extract_rr_v256f32(i32 signext %idx, <256 x float> %v) {146; CHECK-LABEL: extract_rr_v256f32:147; CHECK: # %bb.0:148; CHECK-NEXT: and %s0, %s0, (32)0149; CHECK-NEXT: lvs %s0, %v0(%s0)150; CHECK-NEXT: b.l.t (, %s10)151 %ret = extractelement <256 x float> %v, i32 %idx152 ret float %ret153}154 155define fastcc float @extract_ri7_v256f32(<256 x float> %v) {156; CHECK-LABEL: extract_ri7_v256f32:157; CHECK: # %bb.0:158; CHECK-NEXT: lvs %s0, %v0(127)159; CHECK-NEXT: b.l.t (, %s10)160 %ret = extractelement <256 x float> %v, i32 127161 ret float %ret162}163 164define fastcc float @extract_ri8_v256f32(<256 x float> %v) {165; CHECK-LABEL: extract_ri8_v256f32:166; CHECK: # %bb.0:167; CHECK-NEXT: lea %s0, 128168; CHECK-NEXT: lvs %s0, %v0(%s0)169; CHECK-NEXT: b.l.t (, %s10)170 %ret = extractelement <256 x float> %v, i32 128171 ret float %ret172}173 174define fastcc float @extract_ri_v512f32(<512 x float> %v) {175; CHECK-LABEL: extract_ri_v512f32:176; CHECK: # %bb.0:177; CHECK-NEXT: lea %s0, 186178; CHECK-NEXT: lvs %s0, %v0(%s0)179; CHECK-NEXT: srl %s0, %s0, 32180; CHECK-NEXT: sll %s0, %s0, 32181; CHECK-NEXT: b.l.t (, %s10)182 %ret = extractelement <512 x float> %v, i32 372183 ret float %ret184}185 186define fastcc float @extract_rr_v512f32(<512 x float> %v, i32 signext %idx) {187; CHECK-LABEL: extract_rr_v512f32:188; CHECK: # %bb.0:189; CHECK-NEXT: lea %s1, -2190; CHECK-NEXT: and %s1, %s1, (32)0191; CHECK-NEXT: and %s1, %s0, %s1192; CHECK-NEXT: srl %s1, %s1, 1193; CHECK-NEXT: lvs %s1, %v0(%s1)194; CHECK-NEXT: nnd %s0, %s0, (63)0195; CHECK-NEXT: sla.w.sx %s0, %s0, 5196; CHECK-NEXT: srl %s0, %s1, %s0197; CHECK-NEXT: and %s0, %s0, (32)0198; CHECK-NEXT: sll %s0, %s0, 32199; CHECK-NEXT: b.l.t (, %s10)200 %ret = extractelement <512 x float> %v, i32 %idx201 ret float %ret202}203