257 lines · plain
1; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s2 3 4declare i32 @sample_add(i32, i32)5declare i32 @stack_callee_int(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)6declare i32 @stack_callee_int_szext(i1 signext, i8 zeroext, i32, i32, i32, i32, i32, i32, i16 zeroext, i8 signext)7declare float @stack_callee_float(float, float, float, float, float, float, float, float, float, float)8declare void @test(i64)9 10; Scalar argument passing must not change (same tests as in VE/Scalar/call.ll below - this time with +vpu)11 12define fastcc i32 @sample_call() {13; CHECK-LABEL: sample_call:14; CHECK: .LBB{{[0-9]+}}_2:15; CHECK-NEXT: lea %s0, sample_add@lo16; CHECK-NEXT: and %s0, %s0, (32)017; CHECK-NEXT: lea.sl %s12, sample_add@hi(, %s0)18; CHECK-NEXT: or %s0, 1, (0)119; CHECK-NEXT: or %s1, 2, (0)120; CHECK-NEXT: bsic %s10, (, %s12)21; CHECK-NEXT: or %s11, 0, %s922 %r = tail call fastcc i32 @sample_add(i32 1, i32 2)23 ret i32 %r24}25 26define fastcc i32 @stack_call_int() {27; CHECK-LABEL: stack_call_int:28; CHECK: .LBB{{[0-9]+}}_2:29; CHECK-NEXT: or %s0, 10, (0)130; CHECK-NEXT: st %s0, 248(, %s11)31; CHECK-NEXT: or %s34, 9, (0)132; CHECK-NEXT: lea %s0, stack_callee_int@lo33; CHECK-NEXT: and %s0, %s0, (32)034; CHECK-NEXT: lea.sl %s12, stack_callee_int@hi(, %s0)35; CHECK-NEXT: or %s0, 1, (0)136; CHECK-NEXT: or %s1, 2, (0)137; CHECK-NEXT: or %s2, 3, (0)138; CHECK-NEXT: or %s3, 4, (0)139; CHECK-NEXT: or %s4, 5, (0)140; CHECK-NEXT: or %s5, 6, (0)141; CHECK-NEXT: or %s6, 7, (0)142; CHECK-NEXT: or %s7, 8, (0)143; CHECK-NEXT: st %s34, 240(, %s11)44; CHECK-NEXT: bsic %s10, (, %s12)45; CHECK-NEXT: or %s11, 0, %s946 %r = tail call fastcc i32 @stack_callee_int(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10)47 ret i32 %r48}49 50define fastcc i32 @stack_call_int_szext() {51; CHECK-LABEL: stack_call_int_szext:52; CHECK: .LBB{{[0-9]+}}_2:53; CHECK-NEXT: or %s0, -1, (0)154; CHECK-NEXT: st %s0, 248(, %s11)55; CHECK-NEXT: lea %s34, 6553556; CHECK-NEXT: lea %s0, stack_callee_int_szext@lo57; CHECK-NEXT: and %s0, %s0, (32)058; CHECK-NEXT: lea.sl %s12, stack_callee_int_szext@hi(, %s0)59; CHECK-NEXT: or %s0, -1, (0)160; CHECK-NEXT: lea %s1, 25561; CHECK-NEXT: or %s2, 3, (0)162; CHECK-NEXT: or %s3, 4, (0)163; CHECK-NEXT: or %s4, 5, (0)164; CHECK-NEXT: or %s5, 6, (0)165; CHECK-NEXT: or %s6, 7, (0)166; CHECK-NEXT: or %s7, 8, (0)167; CHECK-NEXT: st %s34, 240(, %s11)68; CHECK-NEXT: bsic %s10, (, %s12)69; CHECK-NEXT: or %s11, 0, %s970 %r = tail call fastcc i32 @stack_callee_int_szext(i1 -1, i8 -1, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i16 -1, i8 -1)71 ret i32 %r72}73 74define fastcc float @stack_call_float() {75; CHECK-LABEL: stack_call_float:76; CHECK: .LBB{{[0-9]+}}_2:77; CHECK-NEXT: lea.sl %s0, 109261619278; CHECK-NEXT: st %s0, 248(, %s11)79; CHECK-NEXT: lea.sl %s34, 109156761680; CHECK-NEXT: lea %s0, stack_callee_float@lo81; CHECK-NEXT: and %s0, %s0, (32)082; CHECK-NEXT: lea.sl %s12, stack_callee_float@hi(, %s0)83; CHECK-NEXT: lea.sl %s0, 106535321684; CHECK-NEXT: lea.sl %s1, 107374182485; CHECK-NEXT: lea.sl %s2, 107793612886; CHECK-NEXT: lea.sl %s3, 108213043287; CHECK-NEXT: lea.sl %s4, 108422758488; CHECK-NEXT: lea.sl %s5, 108632473689; CHECK-NEXT: lea.sl %s6, 108842188890; CHECK-NEXT: lea.sl %s7, 109051904091; CHECK-NEXT: st %s34, 240(, %s11)92; CHECK-NEXT: bsic %s10, (, %s12)93; CHECK-NEXT: or %s11, 0, %s994 %r = tail call fastcc float @stack_callee_float(float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0, float 9.0, float 10.0)95 ret float %r96}97 98define fastcc float @stack_call_float2(float %p0) {99; CHECK-LABEL: stack_call_float2:100; CHECK: .LBB{{[0-9]+}}_2:101; CHECK-NEXT: st %s0, 248(, %s11)102; CHECK-NEXT: lea %s1, stack_callee_float@lo103; CHECK-NEXT: and %s1, %s1, (32)0104; CHECK-NEXT: lea.sl %s12, stack_callee_float@hi(, %s1)105; CHECK-NEXT: st %s0, 240(, %s11)106; CHECK-NEXT: or %s1, 0, %s0107; CHECK-NEXT: or %s2, 0, %s0108; CHECK-NEXT: or %s3, 0, %s0109; CHECK-NEXT: or %s4, 0, %s0110; CHECK-NEXT: or %s5, 0, %s0111; CHECK-NEXT: or %s6, 0, %s0112; CHECK-NEXT: or %s7, 0, %s0113; CHECK-NEXT: bsic %s10, (, %s12)114; CHECK-NEXT: or %s11, 0, %s9115 %r = tail call fastcc float @stack_callee_float(float %p0, float %p0, float %p0, float %p0, float %p0, float %p0, float %p0, float %p0, float %p0, float %p0)116 ret float %r117}118 119; Vector argument passing (fastcc feature)120; 121declare fastcc <256 x i32> @get_v256i32()122declare fastcc void @vsample_v(<256 x i32>)123declare fastcc void @vsample_iv(i32, <256 x i32>)124 125define void @caller_vret() {126; CHECK: caller_vret:127; CHECK: .LBB{{[0-9]+}}_2:128; CHECK-NEXT: lea %s0, get_v256i32@lo129; CHECK-NEXT: and %s0, %s0, (32)0130; CHECK-NEXT: lea.sl %s12, get_v256i32@hi(, %s0)131; CHECK-NEXT: bsic %s10, (, %s12)132; CHECK-NEXT: or %s11, 0, %s9133 %r = tail call fastcc <256 x i32> @get_v256i32()134 ret void135}136 137define void @caller_vret_pass_p0() {138; CHECK-LABEL: caller_vret_pass_p0:139; CHECK: .LBB{{[0-9]+}}_2:140; CHECK: lea %s0, get_v256i32@lo141; CHECK-NEXT: and %s0, %s0, (32)0142; CHECK-NEXT: lea.sl %s12, get_v256i32@hi(, %s0)143; CHECK-NEXT: bsic %s10, (, %s12)144; CHECK-NEXT: lea %s0, vsample_v@lo145; CHECK-NEXT: and %s0, %s0, (32)0146; CHECK-NEXT: lea.sl %s12, vsample_v@hi(, %s0)147; CHECK-NEXT: bsic %s10, (, %s12)148; CHECK-NEXT: or %s11, 0, %s9149 %p = tail call fastcc <256 x i32> @get_v256i32()150 call fastcc void @vsample_v(<256 x i32> %p)151 ret void152}153 154define void @caller_vret_pass_p1(i32 %s) {155; CHECK-LABEL: caller_vret_pass_p1:156; CHECK: .LBB{{[0-9]+}}_2:157; CHECK: or %s18, 0, %s0158; CHECK-NEXT: lea %s0, get_v256i32@lo159; CHECK-NEXT: and %s0, %s0, (32)0160; CHECK-NEXT: lea.sl %s12, get_v256i32@hi(, %s0)161; CHECK-NEXT: bsic %s10, (, %s12)162; CHECK-NEXT: lea %s0, vsample_iv@lo163; CHECK-NEXT: and %s0, %s0, (32)0164; CHECK-NEXT: lea.sl %s12, vsample_iv@hi(, %s0)165; CHECK-NEXT: or %s0, 0, %s18166; CHECK-NEXT: bsic %s10, (, %s12)167 %p = tail call fastcc <256 x i32> @get_v256i32()168 call fastcc void @vsample_iv(i32 %s, <256 x i32> %p)169 ret void170}171 172declare fastcc void @vsample_vv(<256 x i32>, <256 x i32>)173declare fastcc void @vsample_vvv(<256 x i32>, <256 x i32>, <256 x i32>)174 175define void @caller_vret_pass_p01() {176; CHECK-LABEL: caller_vret_pass_p01:177; CHECK: .LBB{{[0-9]+}}_2:178; CHECK-NEXT: lea %s0, get_v256i32@lo179; CHECK-NEXT: and %s0, %s0, (32)0180; CHECK-NEXT: lea.sl %s12, get_v256i32@hi(, %s0)181; CHECK-NEXT: bsic %s10, (, %s12)182; CHECK-NEXT: lea %s0, vsample_vv@lo183; CHECK-NEXT: and %s0, %s0, (32)0184; CHECK-NEXT: lea.sl %s12, vsample_vv@hi(, %s0)185; CHECK-NEXT: lea %s16, 256186; CHECK-NEXT: lvl %s16187; CHECK-NEXT: vor %v1, (0)1, %v0188; CHECK-NEXT: bsic %s10, (, %s12)189; CHECK-NEXT: or %s11, 0, %s9190 %p = tail call fastcc <256 x i32> @get_v256i32()191 call fastcc void @vsample_vv(<256 x i32> %p, <256 x i32> %p)192 ret void193}194 195define void @caller_vret_pass_p012() {196; CHECK-LABEL: caller_vret_pass_p012:197; CHECK: .LBB{{[0-9]+}}_2:198; CHECK-NEXT: lea %s0, get_v256i32@lo199; CHECK-NEXT: and %s0, %s0, (32)0200; CHECK-NEXT: lea.sl %s12, get_v256i32@hi(, %s0)201; CHECK-NEXT: bsic %s10, (, %s12)202; CHECK-NEXT: lea %s0, vsample_vvv@lo203; CHECK-NEXT: and %s0, %s0, (32)0204; CHECK-NEXT: lea.sl %s12, vsample_vvv@hi(, %s0)205; CHECK-NEXT: lea %s16, 256206; CHECK-NEXT: lvl %s16207; CHECK-NEXT: vor %v1, (0)1, %v0208; CHECK-NEXT: lea %s16, 256209; CHECK-NEXT: lvl %s16210; CHECK-NEXT: vor %v2, (0)1, %v0211; CHECK-NEXT: bsic %s10, (, %s12)212; CHECK-NEXT: or %s11, 0, %s9213 %p = tail call fastcc <256 x i32> @get_v256i32()214 call fastcc void @vsample_vvv(<256 x i32> %p, <256 x i32> %p, <256 x i32> %p)215 ret void216}217 218; Expose register parameter mapping by forcing an explicit vreg move for all parameter positions219declare fastcc void @vsample_vvvvvvv(<256 x i32>, <256 x i32>, <256 x i32>, <256 x i32>, <256 x i32>, <256 x i32>, <256 x i32>)220 221; TODO improve vreg copy (redundant lea+lvl emitted)222define fastcc void @roundtrip_caller_callee(<256 x i32> %p0, <256 x i32> %p1, <256 x i32> %p2, <256 x i32> %p3, <256 x i32> %p4, <256 x i32> %p5, <256 x i32> %p6) {223; CHECK-LABEL: roundtrip_caller_callee:224; CHECK: .LBB{{[0-9]+}}_2:225; CHECK-NEXT: lea %s16, 256226; CHECK-NEXT: lvl %s16227; CHECK-NEXT: vor %v7, (0)1, %v0228; CHECK-NEXT: lea %s0, vsample_vvvvvvv@lo229; CHECK-NEXT: and %s0, %s0, (32)0230; CHECK-NEXT: lea.sl %s12, vsample_vvvvvvv@hi(, %s0)231; CHECK-NEXT: lea %s16, 256 232; CHECK-NEXT: lvl %s16233; CHECK-NEXT: vor %v0, (0)1, %v1234; CHECK-NEXT: lea %s16, 256235; CHECK-NEXT: lvl %s16236; CHECK-NEXT: vor %v1, (0)1, %v2237; CHECK-NEXT: lea %s16, 256238; CHECK-NEXT: lvl %s16239; CHECK-NEXT: vor %v2, (0)1, %v3240; CHECK-NEXT: lea %s16, 256241; CHECK-NEXT: lvl %s16242; CHECK-NEXT: vor %v3, (0)1, %v4243; CHECK-NEXT: lea %s16, 256244; CHECK-NEXT: lvl %s16245; CHECK-NEXT: vor %v4, (0)1, %v5246; CHECK-NEXT: lea %s16, 256247; CHECK-NEXT: lvl %s16248; CHECK-NEXT: vor %v5, (0)1, %v6249; CHECK-NEXT: lea %s16, 256250; CHECK-NEXT: lvl %s16251; CHECK-NEXT: vor %v6, (0)1, %v7252; CHECK-NEXT: bsic %s10, (, %s12)253; CHECK-NEXT: or %s11, 0, %s9254 call fastcc void @vsample_vvvvvvv(<256 x i32> %p1, <256 x i32> %p2, <256 x i32> %p3, <256 x i32> %p4, <256 x i32> %p5, <256 x i32> %p6, <256 x i32> %p0)255 ret void256}257