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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s3 4@v256i1 = common dso_local local_unnamed_addr global <256 x i1> zeroinitializer, align 45@v512i1 = common dso_local local_unnamed_addr global <512 x i1> zeroinitializer, align 46 7; Function Attrs: norecurse nounwind readonly8define fastcc void @storev256i1(ptr nocapture %mp, <256 x i1> %m) {9; CHECK-LABEL: storev256i1:10; CHECK: # %bb.0:11; CHECK-NEXT: svm %s1, %vm1, 312; CHECK-NEXT: st %s1, 24(, %s0)13; CHECK-NEXT: svm %s1, %vm1, 214; CHECK-NEXT: st %s1, 16(, %s0)15; CHECK-NEXT: svm %s1, %vm1, 116; CHECK-NEXT: st %s1, 8(, %s0)17; CHECK-NEXT: svm %s1, %vm1, 018; CHECK-NEXT: st %s1, (, %s0)19; CHECK-NEXT: b.l.t (, %s10)20 store <256 x i1> %m, ptr %mp, align 1621 ret void22}23 24; Function Attrs: norecurse nounwind readonly25define fastcc void @storev256i1com(<256 x i1> %m) {26; CHECK-LABEL: storev256i1com:27; CHECK: # %bb.0:28; CHECK-NEXT: svm %s0, %vm1, 329; CHECK-NEXT: lea %s1, v256i1@lo30; CHECK-NEXT: and %s1, %s1, (32)031; CHECK-NEXT: lea.sl %s1, v256i1@hi(, %s1)32; CHECK-NEXT: st %s0, 24(, %s1)33; CHECK-NEXT: svm %s0, %vm1, 234; CHECK-NEXT: st %s0, 16(, %s1)35; CHECK-NEXT: svm %s0, %vm1, 136; CHECK-NEXT: st %s0, 8(, %s1)37; CHECK-NEXT: svm %s0, %vm1, 038; CHECK-NEXT: st %s0, (, %s1)39; CHECK-NEXT: b.l.t (, %s10)40 store <256 x i1> %m, ptr @v256i1, align 1641 ret void42}43 44; Function Attrs: norecurse nounwind readonly45define fastcc void @storev512i1(ptr nocapture %mp, <512 x i1> %m) {46; CHECK-LABEL: storev512i1:47; CHECK: # %bb.0:48; CHECK-NEXT: svm %s1, %vm2, 349; CHECK-NEXT: st %s1, 56(, %s0)50; CHECK-NEXT: svm %s1, %vm2, 251; CHECK-NEXT: st %s1, 48(, %s0)52; CHECK-NEXT: svm %s1, %vm2, 153; CHECK-NEXT: st %s1, 40(, %s0)54; CHECK-NEXT: svm %s1, %vm2, 055; CHECK-NEXT: st %s1, 32(, %s0)56; CHECK-NEXT: svm %s1, %vm3, 357; CHECK-NEXT: st %s1, 24(, %s0)58; CHECK-NEXT: svm %s1, %vm3, 259; CHECK-NEXT: st %s1, 16(, %s0)60; CHECK-NEXT: svm %s1, %vm3, 161; CHECK-NEXT: st %s1, 8(, %s0)62; CHECK-NEXT: svm %s1, %vm3, 063; CHECK-NEXT: st %s1, (, %s0)64; CHECK-NEXT: b.l.t (, %s10)65 store <512 x i1> %m, ptr %mp, align 1666 ret void67}68 69; Function Attrs: norecurse nounwind readonly70define fastcc void @storev512i1com(<512 x i1> %m) {71; CHECK-LABEL: storev512i1com:72; CHECK: # %bb.0:73; CHECK-NEXT: svm %s0, %vm2, 374; CHECK-NEXT: lea %s1, v512i1@lo75; CHECK-NEXT: and %s1, %s1, (32)076; CHECK-NEXT: lea.sl %s1, v512i1@hi(, %s1)77; CHECK-NEXT: st %s0, 56(, %s1)78; CHECK-NEXT: svm %s0, %vm2, 279; CHECK-NEXT: st %s0, 48(, %s1)80; CHECK-NEXT: svm %s0, %vm2, 181; CHECK-NEXT: st %s0, 40(, %s1)82; CHECK-NEXT: svm %s0, %vm2, 083; CHECK-NEXT: st %s0, 32(, %s1)84; CHECK-NEXT: svm %s0, %vm3, 385; CHECK-NEXT: st %s0, 24(, %s1)86; CHECK-NEXT: svm %s0, %vm3, 287; CHECK-NEXT: st %s0, 16(, %s1)88; CHECK-NEXT: svm %s0, %vm3, 189; CHECK-NEXT: st %s0, 8(, %s1)90; CHECK-NEXT: svm %s0, %vm3, 091; CHECK-NEXT: st %s0, (, %s1)92; CHECK-NEXT: b.l.t (, %s10)93 store <512 x i1> %m, ptr @v512i1, align 1694 ret void95}96