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1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s2 3; <256 x i32>4 5; Function Attrs: nounwind6define fastcc <256 x i32> @add_vv_v256i32(<256 x i32> %x, <256 x i32> %y) {7; CHECK-LABEL: add_vv_v256i32:8; CHECK: # %bb.0:9; CHECK-NEXT: lea %s0, 25610; CHECK-NEXT: lvl %s011; CHECK-NEXT: vadds.w.sx %v0, %v0, %v112; CHECK-NEXT: b.l.t (, %s10)13 %z = add <256 x i32> %x, %y14 ret <256 x i32> %z15}16 17; Function Attrs: nounwind18define fastcc <256 x i32> @add_sv_v256i32(i32 %x, <256 x i32> %y) {19; CHECK-LABEL: add_sv_v256i32:20; CHECK: # %bb.0:21; CHECK-NEXT: and %s0, %s0, (32)022; CHECK-NEXT: lea %s1, 25623; CHECK-NEXT: lvl %s124; CHECK-NEXT: vadds.w.sx %v0, %s0, %v025; CHECK-NEXT: b.l.t (, %s10)26 %xins = insertelement <256 x i32> undef, i32 %x, i32 027 %vx = shufflevector <256 x i32> %xins, <256 x i32> undef, <256 x i32> zeroinitializer28 %z = add <256 x i32> %vx, %y29 ret <256 x i32> %z30}31 32; Function Attrs: nounwind33define fastcc <256 x i32> @add_vs_v256i32(<256 x i32> %x, i32 %y) {34; CHECK-LABEL: add_vs_v256i32:35; CHECK: # %bb.0:36; CHECK-NEXT: and %s0, %s0, (32)037; CHECK-NEXT: lea %s1, 25638; CHECK-NEXT: lvl %s139; CHECK-NEXT: vadds.w.sx %v0, %s0, %v040; CHECK-NEXT: b.l.t (, %s10)41 %yins = insertelement <256 x i32> undef, i32 %y, i32 042 %vy = shufflevector <256 x i32> %yins, <256 x i32> undef, <256 x i32> zeroinitializer43 %z = add <256 x i32> %x, %vy44 ret <256 x i32> %z45}46 47 48 49; <256 x i64>50 51; Function Attrs: nounwind52define fastcc <256 x i64> @add_vv_v256i64(<256 x i64> %x, <256 x i64> %y) {53; CHECK-LABEL: add_vv_v256i64:54; CHECK: # %bb.0:55; CHECK-NEXT: lea %s0, 25656; CHECK-NEXT: lvl %s057; CHECK-NEXT: vadds.l %v0, %v0, %v158; CHECK-NEXT: b.l.t (, %s10)59 %z = add <256 x i64> %x, %y60 ret <256 x i64> %z61}62 63; Function Attrs: nounwind64define fastcc <256 x i64> @add_sv_v256i64(i64 %x, <256 x i64> %y) {65; CHECK-LABEL: add_sv_v256i64:66; CHECK: # %bb.0:67; CHECK-NEXT: lea %s1, 25668; CHECK-NEXT: lvl %s169; CHECK-NEXT: vadds.l %v0, %s0, %v070; CHECK-NEXT: b.l.t (, %s10)71 %xins = insertelement <256 x i64> undef, i64 %x, i32 072 %vx = shufflevector <256 x i64> %xins, <256 x i64> undef, <256 x i32> zeroinitializer73 %z = add <256 x i64> %vx, %y74 ret <256 x i64> %z75}76 77; Function Attrs: nounwind78define fastcc <256 x i64> @add_vs_v256i64(<256 x i64> %x, i64 %y) {79; CHECK-LABEL: add_vs_v256i64:80; CHECK: # %bb.0:81; CHECK-NEXT: lea %s1, 25682; CHECK-NEXT: lvl %s183; CHECK-NEXT: vadds.l %v0, %s0, %v084; CHECK-NEXT: b.l.t (, %s10)85 %yins = insertelement <256 x i64> undef, i64 %y, i32 086 %vy = shufflevector <256 x i64> %yins, <256 x i64> undef, <256 x i32> zeroinitializer87 %z = add <256 x i64> %x, %vy88 ret <256 x i64> %z89}90 91; <128 x i64>92; We expect this to be widened.93 94; Function Attrs: nounwind95define fastcc <128 x i64> @add_vv_v128i64(<128 x i64> %x, <128 x i64> %y) {96; CHECK-LABEL: add_vv_v128i64:97; CHECK: # %bb.0:98; CHECK-NEXT: lea %s0, 25699; CHECK-NEXT: lvl %s0100; CHECK-NEXT: vadds.l %v0, %v0, %v1101; CHECK-NEXT: b.l.t (, %s10)102 %z = add <128 x i64> %x, %y103 ret <128 x i64> %z104}105 106; <256 x i16>107; We expect promotion.108 109; Function Attrs: nounwind110define fastcc <256 x i16> @add_vv_v256i16(<256 x i16> %x, <256 x i16> %y) {111; CHECK-LABEL: add_vv_v256i16:112; CHECK: # %bb.0:113; CHECK-NEXT: lea %s0, 256114; CHECK-NEXT: lvl %s0115; CHECK-NEXT: vadds.w.sx %v0, %v0, %v1116; CHECK-NEXT: b.l.t (, %s10)117 %z = add <256 x i16> %x, %y118 ret <256 x i16> %z119}120 121; <128 x i16>122; We expect this to be scalarized (for now).123 124; Function Attrs: nounwind125define fastcc <128 x i16> @add_vv_v128i16(<128 x i16> %x, <128 x i16> %y) {126; CHECK-LABEL: add_vv_v128i16:127; CHECK-NOT: vadd128 %z = add <128 x i16> %x, %y129 ret <128 x i16> %z130}131 132