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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s3 4; <256 x i32>5 6; Function Attrs: nounwind7define fastcc <256 x i32> @and_vv_v256i32(<256 x i32> %x, <256 x i32> %y) {8; CHECK-LABEL: and_vv_v256i32:9; CHECK: # %bb.0:10; CHECK-NEXT: lea %s0, 25611; CHECK-NEXT: lvl %s012; CHECK-NEXT: pvand.lo %v0, %v0, %v113; CHECK-NEXT: b.l.t (, %s10)14 %z = and <256 x i32> %x, %y15 ret <256 x i32> %z16}17 18; Function Attrs: nounwind19define fastcc <256 x i32> @and_sv_v256i32(i32 %x, <256 x i32> %y) {20; CHECK-LABEL: and_sv_v256i32:21; CHECK: # %bb.0:22; CHECK-NEXT: and %s0, %s0, (32)023; CHECK-NEXT: lea %s1, 25624; CHECK-NEXT: lvl %s125; CHECK-NEXT: pvand.lo %v0, %s0, %v026; CHECK-NEXT: b.l.t (, %s10)27 %xins = insertelement <256 x i32> undef, i32 %x, i32 028 %vx = shufflevector <256 x i32> %xins, <256 x i32> undef, <256 x i32> zeroinitializer29 %z = and <256 x i32> %vx, %y30 ret <256 x i32> %z31}32 33; Function Attrs: nounwind34define fastcc <256 x i32> @and_vs_v256i32(<256 x i32> %x, i32 %y) {35; CHECK-LABEL: and_vs_v256i32:36; CHECK: # %bb.0:37; CHECK-NEXT: and %s0, %s0, (32)038; CHECK-NEXT: lea %s1, 25639; CHECK-NEXT: lvl %s140; CHECK-NEXT: pvand.lo %v0, %s0, %v041; CHECK-NEXT: b.l.t (, %s10)42 %yins = insertelement <256 x i32> undef, i32 %y, i32 043 %vy = shufflevector <256 x i32> %yins, <256 x i32> undef, <256 x i32> zeroinitializer44 %z = and <256 x i32> %x, %vy45 ret <256 x i32> %z46}47 48 49 50; <256 x i64>51 52; Function Attrs: nounwind53define fastcc <256 x i64> @and_vv_v256i64(<256 x i64> %x, <256 x i64> %y) {54; CHECK-LABEL: and_vv_v256i64:55; CHECK: # %bb.0:56; CHECK-NEXT: lea %s0, 25657; CHECK-NEXT: lvl %s058; CHECK-NEXT: vand %v0, %v0, %v159; CHECK-NEXT: b.l.t (, %s10)60 %z = and <256 x i64> %x, %y61 ret <256 x i64> %z62}63 64; Function Attrs: nounwind65define fastcc <256 x i64> @and_sv_v256i64(i64 %x, <256 x i64> %y) {66; CHECK-LABEL: and_sv_v256i64:67; CHECK: # %bb.0:68; CHECK-NEXT: lea %s1, 25669; CHECK-NEXT: lvl %s170; CHECK-NEXT: vand %v0, %s0, %v071; CHECK-NEXT: b.l.t (, %s10)72 %xins = insertelement <256 x i64> undef, i64 %x, i32 073 %vx = shufflevector <256 x i64> %xins, <256 x i64> undef, <256 x i32> zeroinitializer74 %z = and <256 x i64> %vx, %y75 ret <256 x i64> %z76}77 78; Function Attrs: nounwind79define fastcc <256 x i64> @and_vs_v256i64(<256 x i64> %x, i64 %y) {80; CHECK-LABEL: and_vs_v256i64:81; CHECK: # %bb.0:82; CHECK-NEXT: lea %s1, 25683; CHECK-NEXT: lvl %s184; CHECK-NEXT: vand %v0, %s0, %v085; CHECK-NEXT: b.l.t (, %s10)86 %yins = insertelement <256 x i64> undef, i64 %y, i32 087 %vy = shufflevector <256 x i64> %yins, <256 x i64> undef, <256 x i32> zeroinitializer88 %z = and <256 x i64> %x, %vy89 ret <256 x i64> %z90}91 92; <128 x i64>93; We expect this to be widened.94 95; Function Attrs: nounwind96define fastcc <128 x i64> @and_vv_v128i64(<128 x i64> %x, <128 x i64> %y) {97; CHECK-LABEL: and_vv_v128i64:98; CHECK: # %bb.0:99; CHECK-NEXT: lea %s0, 256100; CHECK-NEXT: lvl %s0101; CHECK-NEXT: vand %v0, %v0, %v1102; CHECK-NEXT: b.l.t (, %s10)103 %z = and <128 x i64> %x, %y104 ret <128 x i64> %z105}106 107; <256 x i16>108; We expect promotion.109 110; Function Attrs: nounwind111define fastcc <256 x i16> @and_vv_v256i16(<256 x i16> %x, <256 x i16> %y) {112; CHECK-LABEL: and_vv_v256i16:113; CHECK: # %bb.0:114; CHECK-NEXT: lea %s0, 256115; CHECK-NEXT: lvl %s0116; CHECK-NEXT: pvand.lo %v0, %v0, %v1117; CHECK-NEXT: b.l.t (, %s10)118 %z = and <256 x i16> %x, %y119 ret <256 x i16> %z120}121 122; <128 x i16>123; We expect this to be scalarized (for now).124 125; Function Attrs: nounwind126define fastcc <128 x i16> @and_vv_v128i16(<128 x i16> %x, <128 x i16> %y) {127; CHECK-LABEL: and_vv_v128i16:128; CHECK-NOT: vand129 %z = and <128 x i16> %x, %y130 ret <128 x i16> %z131}132 133