44 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s3 4declare void @llvm.masked.store.v256f64.p0(<256 x double>, ptr, i32 immarg, <256 x i1>)5 6define fastcc void @vec_mstore_v256f64(ptr %P, <256 x double> %V, <256 x i1> %M) {7; CHECK-LABEL: vec_mstore_v256f64:8; CHECK: # %bb.0:9; CHECK-NEXT: lea %s1, 25610; CHECK-NEXT: lvl %s111; CHECK-NEXT: vst %v0, 8, %s012; CHECK-NEXT: b.l.t (, %s10)13 call void @llvm.masked.store.v256f64.p0(<256 x double> %V, ptr %P, i32 16, <256 x i1> %M)14 ret void15}16 17 18declare void @llvm.masked.store.v256f32.p0(<256 x float>, ptr, i32 immarg, <256 x i1>)19 20define fastcc void @vec_mstore_v256f32(ptr %P, <256 x float> %V, <256 x i1> %M) {21; CHECK-LABEL: vec_mstore_v256f32:22; CHECK: # %bb.0:23; CHECK-NEXT: lea %s1, 25624; CHECK-NEXT: lvl %s125; CHECK-NEXT: vstu %v0, 4, %s026; CHECK-NEXT: b.l.t (, %s10)27 call void @llvm.masked.store.v256f32.p0(<256 x float> %V, ptr %P, i32 16, <256 x i1> %M)28 ret void29}30 31 32declare void @llvm.masked.store.v256i32.p0(<256 x i32>, ptr, i32 immarg, <256 x i1>)33 34define fastcc void @vec_mstore_v256i32(ptr %P, <256 x i32> %V, <256 x i1> %M) {35; CHECK-LABEL: vec_mstore_v256i32:36; CHECK: # %bb.0:37; CHECK-NEXT: lea %s1, 25638; CHECK-NEXT: lvl %s139; CHECK-NEXT: vstl %v0, 4, %s040; CHECK-NEXT: b.l.t (, %s10)41 call void @llvm.masked.store.v256i32.p0(<256 x i32> %V, ptr %P, i32 16, <256 x i1> %M)42 ret void43}44