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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s3 4declare <256 x float> @llvm.vp.fdiv.v256f32(<256 x float>, <256 x float>, <256 x i1>, i32)5 6define fastcc <256 x float> @test_vp_fdiv_v256f32_vv(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n) {7; CHECK-LABEL: test_vp_fdiv_v256f32_vv:8; CHECK: # %bb.0:9; CHECK-NEXT: and %s0, %s0, (32)010; CHECK-NEXT: lvl %s011; CHECK-NEXT: vfdiv.s %v0, %v0, %v1, %vm112; CHECK-NEXT: b.l.t (, %s10)13 %r0 = call <256 x float> @llvm.vp.fdiv.v256f32(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n)14 ret <256 x float> %r015}16 17define fastcc <256 x float> @test_vp_fdiv_v256f32_rv(float %s0, <256 x float> %i1, <256 x i1> %m, i32 %n) {18; CHECK-LABEL: test_vp_fdiv_v256f32_rv:19; CHECK: # %bb.0:20; CHECK-NEXT: and %s1, %s1, (32)021; CHECK-NEXT: lvl %s122; CHECK-NEXT: vfdiv.s %v0, %s0, %v0, %vm123; CHECK-NEXT: b.l.t (, %s10)24 %xins = insertelement <256 x float> undef, float %s0, i32 025 %i0 = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer26 %r0 = call <256 x float> @llvm.vp.fdiv.v256f32(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n)27 ret <256 x float> %r028}29 30define fastcc <256 x float> @test_vp_fdiv_v256f32_vr(<256 x float> %i0, float %s1, <256 x i1> %m, i32 %n) {31; CHECK-LABEL: test_vp_fdiv_v256f32_vr:32; CHECK: # %bb.0:33; CHECK-NEXT: and %s1, %s1, (32)034; CHECK-NEXT: lvl %s135; CHECK-NEXT: vfdiv.s %v0, %v0, %s0, %vm136; CHECK-NEXT: b.l.t (, %s10)37 %yins = insertelement <256 x float> undef, float %s1, i32 038 %i1 = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer39 %r0 = call <256 x float> @llvm.vp.fdiv.v256f32(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n)40 ret <256 x float> %r041}42 43 44declare <256 x double> @llvm.vp.fdiv.v256f64(<256 x double>, <256 x double>, <256 x i1>, i32)45 46define fastcc <256 x double> @test_vp_fdiv_v256f64_vv(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n) {47; CHECK-LABEL: test_vp_fdiv_v256f64_vv:48; CHECK: # %bb.0:49; CHECK-NEXT: and %s0, %s0, (32)050; CHECK-NEXT: lvl %s051; CHECK-NEXT: vfdiv.d %v0, %v0, %v1, %vm152; CHECK-NEXT: b.l.t (, %s10)53 %r0 = call <256 x double> @llvm.vp.fdiv.v256f64(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n)54 ret <256 x double> %r055}56 57define fastcc <256 x double> @test_vp_fdiv_v256f64_rv(double %s0, <256 x double> %i1, <256 x i1> %m, i32 %n) {58; CHECK-LABEL: test_vp_fdiv_v256f64_rv:59; CHECK: # %bb.0:60; CHECK-NEXT: and %s1, %s1, (32)061; CHECK-NEXT: lvl %s162; CHECK-NEXT: vfdiv.d %v0, %s0, %v0, %vm163; CHECK-NEXT: b.l.t (, %s10)64 %xins = insertelement <256 x double> undef, double %s0, i32 065 %i0 = shufflevector <256 x double> %xins, <256 x double> undef, <256 x i32> zeroinitializer66 %r0 = call <256 x double> @llvm.vp.fdiv.v256f64(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n)67 ret <256 x double> %r068}69 70define fastcc <256 x double> @test_vp_fdiv_v256f64_vr(<256 x double> %i0, double %s1, <256 x i1> %m, i32 %n) {71; CHECK-LABEL: test_vp_fdiv_v256f64_vr:72; CHECK: # %bb.0:73; CHECK-NEXT: and %s1, %s1, (32)074; CHECK-NEXT: lvl %s175; CHECK-NEXT: vfdiv.d %v0, %v0, %s0, %vm176; CHECK-NEXT: b.l.t (, %s10)77 %yins = insertelement <256 x double> undef, double %s1, i32 078 %i1 = shufflevector <256 x double> %yins, <256 x double> undef, <256 x i32> zeroinitializer79 %r0 = call <256 x double> @llvm.vp.fdiv.v256f64(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n)80 ret <256 x double> %r081}82