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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s3 4declare <256 x i32> @llvm.vp.select.v256i32(<256 x i1>, <256 x i32>, <256 x i32>, i32)5 6define fastcc <256 x i32> @test_vp_select_v256i32_vv(<256 x i32> %i0, <256 x i32> %i1, <256 x i1> %m, i32 %pivot) {7; CHECK-LABEL: test_vp_select_v256i32_vv:8; CHECK: # %bb.0:9; CHECK-NEXT: and %s0, %s0, (32)010; CHECK-NEXT: lvl %s011; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm112; CHECK-NEXT: lea %s16, 25613; CHECK-NEXT: lvl %s1614; CHECK-NEXT: vor %v0, (0)1, %v115; CHECK-NEXT: b.l.t (, %s10)16 %r0 = call <256 x i32> @llvm.vp.select.v256i32(<256 x i1> %m, <256 x i32> %i0, <256 x i32> %i1, i32 %pivot)17 ret <256 x i32> %r018}19 20define fastcc <256 x i32> @test_vp_select_v256i32_vr(<256 x i32> %i0, i32 %s1, <256 x i1> %m, i32 %pivot) {21; CHECK-LABEL: test_vp_select_v256i32_vr:22; CHECK: # %bb.0:23; CHECK-NEXT: and %s1, %s1, (32)024; CHECK-NEXT: and %s0, %s0, (32)025; CHECK-NEXT: lea %s2, 25626; CHECK-NEXT: lvl %s227; CHECK-NEXT: vbrd %v1, %s028; CHECK-NEXT: lvl %s129; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm130; CHECK-NEXT: lea %s16, 25631; CHECK-NEXT: lvl %s1632; CHECK-NEXT: vor %v0, (0)1, %v133; CHECK-NEXT: b.l.t (, %s10)34 %xins = insertelement <256 x i32> undef, i32 %s1, i32 035 %i1 = shufflevector <256 x i32> %xins, <256 x i32> undef, <256 x i32> zeroinitializer36 %r0 = call <256 x i32> @llvm.vp.select.v256i32(<256 x i1> %m, <256 x i32> %i0, <256 x i32> %i1, i32 %pivot)37 ret <256 x i32> %r038}39 40declare <256 x float> @llvm.vp.select.v256f32(<256 x i1>, <256 x float>, <256 x float>, i32)41 42define fastcc <256 x float> @test_vp_select_v256f32_vv(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %pivot) {43; CHECK-LABEL: test_vp_select_v256f32_vv:44; CHECK: # %bb.0:45; CHECK-NEXT: and %s0, %s0, (32)046; CHECK-NEXT: lvl %s047; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm148; CHECK-NEXT: lea %s16, 25649; CHECK-NEXT: lvl %s1650; CHECK-NEXT: vor %v0, (0)1, %v151; CHECK-NEXT: b.l.t (, %s10)52 %r0 = call <256 x float> @llvm.vp.select.v256f32(<256 x i1> %m, <256 x float> %i0, <256 x float> %i1, i32 %pivot)53 ret <256 x float> %r054}55 56define fastcc <256 x float> @test_vp_select_v256f32_vr(<256 x float> %i0, float %s1, <256 x i1> %m, i32 %pivot) {57; CHECK-LABEL: test_vp_select_v256f32_vr:58; CHECK: # %bb.0:59; CHECK-NEXT: and %s1, %s1, (32)060; CHECK-NEXT: lea %s2, 25661; CHECK-NEXT: lvl %s262; CHECK-NEXT: vbrd %v1, %s063; CHECK-NEXT: lvl %s164; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm165; CHECK-NEXT: lea %s16, 25666; CHECK-NEXT: lvl %s1667; CHECK-NEXT: vor %v0, (0)1, %v168; CHECK-NEXT: b.l.t (, %s10)69 %xins = insertelement <256 x float> undef, float %s1, i32 070 %i1 = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer71 %r0 = call <256 x float> @llvm.vp.select.v256f32(<256 x i1> %m, <256 x float> %i0, <256 x float> %i1, i32 %pivot)72 ret <256 x float> %r073}74 75declare <256 x double> @llvm.vp.select.v256f64(<256 x i1>, <256 x double>, <256 x double>, i32)76 77define fastcc <256 x double> @test_vp_select_v256f64_vv(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %pivot) {78; CHECK-LABEL: test_vp_select_v256f64_vv:79; CHECK: # %bb.0:80; CHECK-NEXT: and %s0, %s0, (32)081; CHECK-NEXT: lvl %s082; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm183; CHECK-NEXT: lea %s16, 25684; CHECK-NEXT: lvl %s1685; CHECK-NEXT: vor %v0, (0)1, %v186; CHECK-NEXT: b.l.t (, %s10)87 %r0 = call <256 x double> @llvm.vp.select.v256f64(<256 x i1> %m, <256 x double> %i0, <256 x double> %i1, i32 %pivot)88 ret <256 x double> %r089}90 91define fastcc <256 x double> @test_vp_select_v256f64_vr(<256 x double> %i0, double %s1, <256 x i1> %m, i32 %pivot) {92; CHECK-LABEL: test_vp_select_v256f64_vr:93; CHECK: # %bb.0:94; CHECK-NEXT: and %s1, %s1, (32)095; CHECK-NEXT: lea %s2, 25696; CHECK-NEXT: lvl %s297; CHECK-NEXT: vbrd %v1, %s098; CHECK-NEXT: lvl %s199; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm1100; CHECK-NEXT: lea %s16, 256101; CHECK-NEXT: lvl %s16102; CHECK-NEXT: vor %v0, (0)1, %v1103; CHECK-NEXT: b.l.t (, %s10)104 %xins = insertelement <256 x double> undef, double %s1, i32 0105 %i1 = shufflevector <256 x double> %xins, <256 x double> undef, <256 x i32> zeroinitializer106 %r0 = call <256 x double> @llvm.vp.select.v256f64(<256 x i1> %m, <256 x double> %i0, <256 x double> %i1, i32 %pivot)107 ret <256 x double> %r0108}109 110declare <256 x i64> @llvm.vp.select.v256i64(<256 x i1>, <256 x i64>, <256 x i64>, i32)111 112define fastcc <256 x i64> @test_vp_select_v256i64_vv(<256 x i64> %i0, <256 x i64> %i1, <256 x i1> %m, i32 %pivot) {113; CHECK-LABEL: test_vp_select_v256i64_vv:114; CHECK: # %bb.0:115; CHECK-NEXT: and %s0, %s0, (32)0116; CHECK-NEXT: lvl %s0117; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm1118; CHECK-NEXT: lea %s16, 256119; CHECK-NEXT: lvl %s16120; CHECK-NEXT: vor %v0, (0)1, %v1121; CHECK-NEXT: b.l.t (, %s10)122 %r0 = call <256 x i64> @llvm.vp.select.v256i64(<256 x i1> %m, <256 x i64> %i0, <256 x i64> %i1, i32 %pivot)123 ret <256 x i64> %r0124}125 126define fastcc <256 x i64> @test_vp_select_v256i64_vr(<256 x i64> %i0, i64 %s1, <256 x i1> %m, i32 %pivot) {127; CHECK-LABEL: test_vp_select_v256i64_vr:128; CHECK: # %bb.0:129; CHECK-NEXT: and %s1, %s1, (32)0130; CHECK-NEXT: lea %s2, 256131; CHECK-NEXT: lvl %s2132; CHECK-NEXT: vbrd %v1, %s0133; CHECK-NEXT: lvl %s1134; CHECK-NEXT: vmrg %v1, %v1, %v0, %vm1135; CHECK-NEXT: lea %s16, 256136; CHECK-NEXT: lvl %s16137; CHECK-NEXT: vor %v0, (0)1, %v1138; CHECK-NEXT: b.l.t (, %s10)139 %xins = insertelement <256 x i64> undef, i64 %s1, i32 0140 %i1 = shufflevector <256 x i64> %xins, <256 x i64> undef, <256 x i32> zeroinitializer141 %r0 = call <256 x i64> @llvm.vp.select.v256i64(<256 x i1> %m, <256 x i64> %i0, <256 x i64> %i1, i32 %pivot)142 ret <256 x i64> %r0143}144