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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s3 4declare void @llvm.experimental.vp.strided.store.v256f32.p0.i64(<256 x float> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)5 6define fastcc void @vp_strided_store_v256f32_rrm(<256 x float> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl) {7; CHECK-LABEL: vp_strided_store_v256f32_rrm:8; CHECK: # %bb.0:9; CHECK-NEXT: and %s2, %s2, (32)010; CHECK-NEXT: lvl %s211; CHECK-NEXT: vstu %v0, %s1, %s0, %vm112; CHECK-NEXT: b.l.t (, %s10)13 call void @llvm.experimental.vp.strided.store.v256f32.p0.i64(<256 x float> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)14 ret void15}16 17define fastcc void @vp_strided_store_v256f32_rr(<256 x float> %val, ptr %ptr, i64 %stride, i32 %evl) {18; CHECK-LABEL: vp_strided_store_v256f32_rr:19; CHECK: # %bb.0:20; CHECK-NEXT: and %s2, %s2, (32)021; CHECK-NEXT: lvl %s222; CHECK-NEXT: vstu %v0, %s1, %s023; CHECK-NEXT: b.l.t (, %s10)24 %one = insertelement <256 x i1> undef, i1 1, i32 025 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer26 call void @llvm.experimental.vp.strided.store.v256f32.p0.i64(<256 x float> %val, ptr %ptr, i64 %stride, <256 x i1> %allones, i32 %evl)27 ret void28}29 30define fastcc void @vp_strided_store_v256f32_ri(<256 x float> %val, ptr %ptr, i32 %evl) {31; CHECK-LABEL: vp_strided_store_v256f32_ri:32; CHECK: # %bb.0:33; CHECK-NEXT: and %s1, %s1, (32)034; CHECK-NEXT: lvl %s135; CHECK-NEXT: vstu %v0, 24, %s036; CHECK-NEXT: b.l.t (, %s10)37 %one = insertelement <256 x i1> undef, i1 1, i32 038 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer39 call void @llvm.experimental.vp.strided.store.v256f32.p0.i64(<256 x float> %val, ptr %ptr, i64 24, <256 x i1> %allones, i32 %evl)40 ret void41}42 43declare void @llvm.experimental.vp.strided.store.v256i32.p0.i64(<256 x i32> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)44 45define fastcc void @vp_strided_store_v256i32_rrm(<256 x i32> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl) {46; CHECK-LABEL: vp_strided_store_v256i32_rrm:47; CHECK: # %bb.0:48; CHECK-NEXT: and %s2, %s2, (32)049; CHECK-NEXT: lvl %s250; CHECK-NEXT: vstl %v0, %s1, %s0, %vm151; CHECK-NEXT: b.l.t (, %s10)52 call void @llvm.experimental.vp.strided.store.v256i32.p0.i64(<256 x i32> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)53 ret void54}55 56define fastcc void @vp_strided_store_v256i32_rr(<256 x i32> %val, ptr %ptr, i64 %stride, i32 %evl) {57; CHECK-LABEL: vp_strided_store_v256i32_rr:58; CHECK: # %bb.0:59; CHECK-NEXT: and %s2, %s2, (32)060; CHECK-NEXT: lvl %s261; CHECK-NEXT: vstl %v0, %s1, %s062; CHECK-NEXT: b.l.t (, %s10)63 %one = insertelement <256 x i1> undef, i1 1, i32 064 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer65 call void @llvm.experimental.vp.strided.store.v256i32.p0.i64(<256 x i32> %val, ptr %ptr, i64 %stride, <256 x i1> %allones, i32 %evl)66 ret void67}68 69define fastcc void @vp_strided_store_v256i32_ri(<256 x i32> %val, ptr %ptr, i32 %evl) {70; CHECK-LABEL: vp_strided_store_v256i32_ri:71; CHECK: # %bb.0:72; CHECK-NEXT: and %s1, %s1, (32)073; CHECK-NEXT: lvl %s174; CHECK-NEXT: vstl %v0, 24, %s075; CHECK-NEXT: b.l.t (, %s10)76 %one = insertelement <256 x i1> undef, i1 1, i32 077 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer78 call void @llvm.experimental.vp.strided.store.v256i32.p0.i64(<256 x i32> %val, ptr %ptr, i64 24, <256 x i1> %allones, i32 %evl)79 ret void80}81 82declare void @llvm.experimental.vp.strided.store.v256f64.p0.i64(<256 x double> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)83 84define fastcc void @vp_strided_store_v256f64_rrm(<256 x double> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl) {85; CHECK-LABEL: vp_strided_store_v256f64_rrm:86; CHECK: # %bb.0:87; CHECK-NEXT: and %s2, %s2, (32)088; CHECK-NEXT: lvl %s289; CHECK-NEXT: vst %v0, %s1, %s0, %vm190; CHECK-NEXT: b.l.t (, %s10)91 call void @llvm.experimental.vp.strided.store.v256f64.p0.i64(<256 x double> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)92 ret void93}94 95define fastcc void @vp_strided_store_v256f64_rr(<256 x double> %val, ptr %ptr, i64 %stride, i32 %evl) {96; CHECK-LABEL: vp_strided_store_v256f64_rr:97; CHECK: # %bb.0:98; CHECK-NEXT: and %s2, %s2, (32)099; CHECK-NEXT: lvl %s2100; CHECK-NEXT: vst %v0, %s1, %s0101; CHECK-NEXT: b.l.t (, %s10)102 %one = insertelement <256 x i1> undef, i1 1, i32 0103 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer104 call void @llvm.experimental.vp.strided.store.v256f64.p0.i64(<256 x double> %val, ptr %ptr, i64 %stride, <256 x i1> %allones, i32 %evl)105 ret void106}107 108define fastcc void @vp_strided_store_v256f64_ri(<256 x double> %val, ptr %ptr, i32 %evl) {109; CHECK-LABEL: vp_strided_store_v256f64_ri:110; CHECK: # %bb.0:111; CHECK-NEXT: and %s1, %s1, (32)0112; CHECK-NEXT: lvl %s1113; CHECK-NEXT: vst %v0, 24, %s0114; CHECK-NEXT: b.l.t (, %s10)115 %one = insertelement <256 x i1> undef, i1 1, i32 0116 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer117 call void @llvm.experimental.vp.strided.store.v256f64.p0.i64(<256 x double> %val, ptr %ptr, i64 24, <256 x i1> %allones, i32 %evl)118 ret void119}120 121declare void @llvm.experimental.vp.strided.store.v256i64.p0.i64(<256 x i64> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)122 123define fastcc void @vp_strided_store_v256i64_rrm(<256 x i64> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl) {124; CHECK-LABEL: vp_strided_store_v256i64_rrm:125; CHECK: # %bb.0:126; CHECK-NEXT: and %s2, %s2, (32)0127; CHECK-NEXT: lvl %s2128; CHECK-NEXT: vst %v0, %s1, %s0, %vm1129; CHECK-NEXT: b.l.t (, %s10)130 call void @llvm.experimental.vp.strided.store.v256i64.p0.i64(<256 x i64> %val, ptr %ptr, i64 %stride, <256 x i1> %mask, i32 %evl)131 ret void132}133 134define fastcc void @vp_strided_store_v256i64_rr(<256 x i64> %val, ptr %ptr, i64 %stride, i32 %evl) {135; CHECK-LABEL: vp_strided_store_v256i64_rr:136; CHECK: # %bb.0:137; CHECK-NEXT: and %s2, %s2, (32)0138; CHECK-NEXT: lvl %s2139; CHECK-NEXT: vst %v0, %s1, %s0140; CHECK-NEXT: b.l.t (, %s10)141 %one = insertelement <256 x i1> undef, i1 1, i32 0142 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer143 call void @llvm.experimental.vp.strided.store.v256i64.p0.i64(<256 x i64> %val, ptr %ptr, i64 %stride, <256 x i1> %allones, i32 %evl)144 ret void145}146 147define fastcc void @vp_strided_store_v256i64_ri(<256 x i64> %val, ptr %ptr, i32 %evl) {148; CHECK-LABEL: vp_strided_store_v256i64_ri:149; CHECK: # %bb.0:150; CHECK-NEXT: and %s1, %s1, (32)0151; CHECK-NEXT: lvl %s1152; CHECK-NEXT: vst %v0, 24, %s0153; CHECK-NEXT: b.l.t (, %s10)154 %one = insertelement <256 x i1> undef, i1 1, i32 0155 %allones = shufflevector <256 x i1> %one, <256 x i1> undef, <256 x i32> zeroinitializer156 call void @llvm.experimental.vp.strided.store.v256i64.p0.i64(<256 x i64> %val, ptr %ptr, i64 24, <256 x i1> %allones, i32 %evl)157 ret void158}159