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1; RUN: llc < %s -asm-verbose=false -relocation-model=pic -fast-isel -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s2; RUN: llc < %s -asm-verbose=false -relocation-model=pic -fast-isel=false -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s3 4; Test that atomic operations in PIC mode. Specifically we verify5; that atomic operations on global address load addres via @GOT or6; @MBREL relocations.7 8target triple = "wasm32-unknown-emscripten"9 10@external_global = external global i3211@hidden_global = external hidden global i3212 13define i32 @rmw_add_external_global() {14; CHECK-LABEL: rmw_add_external_global:15; CHECK: global.get $push[[L0:[0-9]+]]=, external_global@GOT{{$}}16; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, 42{{$}}17; CHECK-NEXT: i32.atomic.rmw.add $push[[L2:[0-9]+]]=, 0($pop[[L0]]), $pop[[L1]]{{$}}18; CHECK-NEXT: end_function19 %1 = atomicrmw add ptr @external_global, i32 42 seq_cst20 ret i32 %121}22 23define i32 @rmw_add_hidden_global() {24; CHECK-LABEL: rmw_add_hidden_global:25; CHECK: global.get $push[[L0:[0-9]+]]=, __memory_base{{$}}26; CHECK-NEXT: i32.const $push[[L1:[0-9]+]]=, hidden_global@MBREL{{$}}27; CHECK-NEXT: i32.add $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}28; CHECK-NEXT: i32.const $push[[L3:[0-9]+]]=, 42{{$}}29; CHECK-NEXT: i32.atomic.rmw.add $push[[L4:[0-9]+]]=, 0($pop[[L2]]), $pop[[L3]]{{$}}30; CHECK-NEXT: end_function31 %1 = atomicrmw add ptr @hidden_global, i32 42 seq_cst32 ret i32 %133}34