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1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s2 3; Test that operations that are not supported by SIMD are properly4; unrolled.5 6target triple = "wasm32-unknown-unknown"7 8; ==============================================================================9; 16 x i810; ==============================================================================11 12; CHECK-LABEL: ctlz_v16i8:13; CHECK: i8x16.popcnt14declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1)15define <16 x i8> @ctlz_v16i8(<16 x i8> %x) {16 %v = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x, i1 false)17 ret <16 x i8> %v18}19 20; CHECK-LABEL: ctlz_v16i8_undef:21; CHECK: i8x16.popcnt22define <16 x i8> @ctlz_v16i8_undef(<16 x i8> %x) {23 %v = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x, i1 true)24 ret <16 x i8> %v25}26 27; CHECK-LABEL: cttz_v16i8:28; CHECK: i8x16.popcnt29declare <16 x i8> @llvm.cttz.v16i8(<16 x i8>, i1)30define <16 x i8> @cttz_v16i8(<16 x i8> %x) {31 %v = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %x, i1 false)32 ret <16 x i8> %v33}34 35; CHECK-LABEL: cttz_v16i8_undef:36; CHECK: i8x16.popcnt37define <16 x i8> @cttz_v16i8_undef(<16 x i8> %x) {38 %v = call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %x, i1 true)39 ret <16 x i8> %v40}41 42; CHECK-LABEL: sdiv_v16i8:43; CHECK: i32.div_s44define <16 x i8> @sdiv_v16i8(<16 x i8> %x, <16 x i8> %y) {45 %v = sdiv <16 x i8> %x, %y46 ret <16 x i8> %v47}48 49; CHECK-LABEL: udiv_v16i8:50; CHECK: i32.div_u51define <16 x i8> @udiv_v16i8(<16 x i8> %x, <16 x i8> %y) {52 %v = udiv <16 x i8> %x, %y53 ret <16 x i8> %v54}55 56; CHECK-LABEL: srem_v16i8:57; CHECK: i32.rem_s58define <16 x i8> @srem_v16i8(<16 x i8> %x, <16 x i8> %y) {59 %v = srem <16 x i8> %x, %y60 ret <16 x i8> %v61}62 63; CHECK-LABEL: urem_v16i8:64; CHECK: i32.rem_u65define <16 x i8> @urem_v16i8(<16 x i8> %x, <16 x i8> %y) {66 %v = urem <16 x i8> %x, %y67 ret <16 x i8> %v68}69 70; CHECK-LABEL: rotl_v16i8:71; Note: expansion does not use i32.rotl72; CHECK: i32.shl73declare <16 x i8> @llvm.fshl.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)74define <16 x i8> @rotl_v16i8(<16 x i8> %x, <16 x i8> %y) {75 %v = call <16 x i8> @llvm.fshl.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %y)76 ret <16 x i8> %v77}78 79; CHECK-LABEL: rotr_v16i8:80; Note: expansion does not use i32.rotr81; CHECK: i32.shr_u82declare <16 x i8> @llvm.fshr.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)83define <16 x i8> @rotr_v16i8(<16 x i8> %x, <16 x i8> %y) {84 %v = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %y)85 ret <16 x i8> %v86}87 88; ==============================================================================89; 8 x i1690; ==============================================================================91 92; CHECK-LABEL: ctlz_v8i16:93; CHECK: i32.clz94declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1)95define <8 x i16> @ctlz_v8i16(<8 x i16> %x) {96 %v = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x, i1 false)97 ret <8 x i16> %v98}99 100; CHECK-LABEL: ctlz_v8i16_undef:101; CHECK: i32.clz102define <8 x i16> @ctlz_v8i16_undef(<8 x i16> %x) {103 %v = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x, i1 true)104 ret <8 x i16> %v105}106 107; CHECK-LABEL: cttz_v8i16:108; CHECK: i32.ctz109declare <8 x i16> @llvm.cttz.v8i16(<8 x i16>, i1)110define <8 x i16> @cttz_v8i16(<8 x i16> %x) {111 %v = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %x, i1 false)112 ret <8 x i16> %v113}114 115; CHECK-LABEL: cttz_v8i16_undef:116; CHECK: i32.ctz117define <8 x i16> @cttz_v8i16_undef(<8 x i16> %x) {118 %v = call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %x, i1 true)119 ret <8 x i16> %v120}121 122; CHECK-LABEL: ctpop_v8i16:123; CHECK: i32.popcnt124declare <8 x i16> @llvm.ctpop.v8i16(<8 x i16>)125define <8 x i16> @ctpop_v8i16(<8 x i16> %x) {126 %v = call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %x)127 ret <8 x i16> %v128}129 130; CHECK-LABEL: sdiv_v8i16:131; CHECK: i32.div_s132define <8 x i16> @sdiv_v8i16(<8 x i16> %x, <8 x i16> %y) {133 %v = sdiv <8 x i16> %x, %y134 ret <8 x i16> %v135}136 137; CHECK-LABEL: udiv_v8i16:138; CHECK: i32.div_u139define <8 x i16> @udiv_v8i16(<8 x i16> %x, <8 x i16> %y) {140 %v = udiv <8 x i16> %x, %y141 ret <8 x i16> %v142}143 144; CHECK-LABEL: srem_v8i16:145; CHECK: i32.rem_s146define <8 x i16> @srem_v8i16(<8 x i16> %x, <8 x i16> %y) {147 %v = srem <8 x i16> %x, %y148 ret <8 x i16> %v149}150 151; CHECK-LABEL: urem_v8i16:152; CHECK: i32.rem_u153define <8 x i16> @urem_v8i16(<8 x i16> %x, <8 x i16> %y) {154 %v = urem <8 x i16> %x, %y155 ret <8 x i16> %v156}157 158; CHECK-LABEL: rotl_v8i16:159; Note: expansion does not use i32.rotl160; CHECK: i32.shl161declare <8 x i16> @llvm.fshl.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)162define <8 x i16> @rotl_v8i16(<8 x i16> %x, <8 x i16> %y) {163 %v = call <8 x i16> @llvm.fshl.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %y)164 ret <8 x i16> %v165}166 167; CHECK-LABEL: rotr_v8i16:168; Note: expansion does not use i32.rotr169; CHECK: i32.shr_u170declare <8 x i16> @llvm.fshr.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)171define <8 x i16> @rotr_v8i16(<8 x i16> %x, <8 x i16> %y) {172 %v = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %y)173 ret <8 x i16> %v174}175 176; ==============================================================================177; 4 x i32178; ==============================================================================179 180; CHECK-LABEL: ctlz_v4i32:181; CHECK: i32.clz182declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1)183define <4 x i32> @ctlz_v4i32(<4 x i32> %x) {184 %v = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x, i1 false)185 ret <4 x i32> %v186}187 188; CHECK-LABEL: ctlz_v4i32_undef:189; CHECK: i32.clz190define <4 x i32> @ctlz_v4i32_undef(<4 x i32> %x) {191 %v = call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x, i1 true)192 ret <4 x i32> %v193}194 195; CHECK-LABEL: cttz_v4i32:196; CHECK: i32.ctz197declare <4 x i32> @llvm.cttz.v4i32(<4 x i32>, i1)198define <4 x i32> @cttz_v4i32(<4 x i32> %x) {199 %v = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %x, i1 false)200 ret <4 x i32> %v201}202 203; CHECK-LABEL: cttz_v4i32_undef:204; CHECK: i32.ctz205define <4 x i32> @cttz_v4i32_undef(<4 x i32> %x) {206 %v = call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %x, i1 true)207 ret <4 x i32> %v208}209 210; CHECK-LABEL: ctpop_v4i32:211; CHECK: i32.popcnt212declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>)213define <4 x i32> @ctpop_v4i32(<4 x i32> %x) {214 %v = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %x)215 ret <4 x i32> %v216}217 218; CHECK-LABEL: sdiv_v4i32:219; CHECK: i32.div_s220define <4 x i32> @sdiv_v4i32(<4 x i32> %x, <4 x i32> %y) {221 %v = sdiv <4 x i32> %x, %y222 ret <4 x i32> %v223}224 225; CHECK-LABEL: udiv_v4i32:226; CHECK: i32.div_u227define <4 x i32> @udiv_v4i32(<4 x i32> %x, <4 x i32> %y) {228 %v = udiv <4 x i32> %x, %y229 ret <4 x i32> %v230}231 232; CHECK-LABEL: srem_v4i32:233; CHECK: i32.rem_s234define <4 x i32> @srem_v4i32(<4 x i32> %x, <4 x i32> %y) {235 %v = srem <4 x i32> %x, %y236 ret <4 x i32> %v237}238 239; CHECK-LABEL: urem_v4i32:240; CHECK: i32.rem_u241define <4 x i32> @urem_v4i32(<4 x i32> %x, <4 x i32> %y) {242 %v = urem <4 x i32> %x, %y243 ret <4 x i32> %v244}245 246; CHECK-LABEL: rotl_v4i32:247; Note: expansion does not use i32.rotl248; CHECK: i32.shl249declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)250define <4 x i32> @rotl_v4i32(<4 x i32> %x, <4 x i32> %y) {251 %v = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %y)252 ret <4 x i32> %v253}254 255; CHECK-LABEL: rotr_v4i32:256; Note: expansion does not use i32.rotr257; CHECK: i32.shr_u258declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)259define <4 x i32> @rotr_v4i32(<4 x i32> %x, <4 x i32> %y) {260 %v = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %y)261 ret <4 x i32> %v262}263 264; ==============================================================================265; 2 x i64266; ==============================================================================267 268; CHECK-LABEL: ctlz_v2i64:269; CHECK: i64.clz270declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)271define <2 x i64> @ctlz_v2i64(<2 x i64> %x) {272 %v = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x, i1 false)273 ret <2 x i64> %v274}275 276; CHECK-LABEL: ctlz_v2i64_undef:277; CHECK: i64.clz278define <2 x i64> @ctlz_v2i64_undef(<2 x i64> %x) {279 %v = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x, i1 true)280 ret <2 x i64> %v281}282 283; CHECK-LABEL: cttz_v2i64:284; CHECK: i64.ctz285declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)286define <2 x i64> @cttz_v2i64(<2 x i64> %x) {287 %v = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %x, i1 false)288 ret <2 x i64> %v289}290 291; CHECK-LABEL: cttz_v2i64_undef:292; CHECK: i64.ctz293define <2 x i64> @cttz_v2i64_undef(<2 x i64> %x) {294 %v = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %x, i1 true)295 ret <2 x i64> %v296}297 298; CHECK-LABEL: ctpop_v2i64:299; CHECK: i64.popcnt300declare <2 x i64> @llvm.ctpop.v2i64(<2 x i64>)301define <2 x i64> @ctpop_v2i64(<2 x i64> %x) {302 %v = call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %x)303 ret <2 x i64> %v304}305 306; CHECK-LABEL: sdiv_v2i64:307; CHECK: i64.div_s308define <2 x i64> @sdiv_v2i64(<2 x i64> %x, <2 x i64> %y) {309 %v = sdiv <2 x i64> %x, %y310 ret <2 x i64> %v311}312 313; CHECK-LABEL: udiv_v2i64:314; CHECK: i64.div_u315define <2 x i64> @udiv_v2i64(<2 x i64> %x, <2 x i64> %y) {316 %v = udiv <2 x i64> %x, %y317 ret <2 x i64> %v318}319 320; CHECK-LABEL: srem_v2i64:321; CHECK: i64.rem_s322define <2 x i64> @srem_v2i64(<2 x i64> %x, <2 x i64> %y) {323 %v = srem <2 x i64> %x, %y324 ret <2 x i64> %v325}326 327; CHECK-LABEL: urem_v2i64:328; CHECK: i64.rem_u329define <2 x i64> @urem_v2i64(<2 x i64> %x, <2 x i64> %y) {330 %v = urem <2 x i64> %x, %y331 ret <2 x i64> %v332}333 334; CHECK-LABEL: rotl_v2i64:335; Note: expansion does not use i64.rotl336; CHECK: i64.shl337declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)338define <2 x i64> @rotl_v2i64(<2 x i64> %x, <2 x i64> %y) {339 %v = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %y)340 ret <2 x i64> %v341}342 343; CHECK-LABEL: rotr_v2i64:344; Note: expansion does not use i64.rotr345; CHECK: i64.shr_u346declare <2 x i64> @llvm.fshr.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)347define <2 x i64> @rotr_v2i64(<2 x i64> %x, <2 x i64> %y) {348 %v = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %y)349 ret <2 x i64> %v350}351 352; ==============================================================================353; 4 x f32354; ==============================================================================355 356; CHECK-LABEL: copysign_v4f32:357; CHECK: v128.const358; CHECK-NEXT: v128.and359; CHECK-NEXT: v128.const360; CHECK-NEXT: v128.and361; CHECK-NEXT: v128.or362declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>)363define <4 x float> @copysign_v4f32(<4 x float> %x, <4 x float> %y) {364 %v = call <4 x float> @llvm.copysign.v4f32(<4 x float> %x, <4 x float> %y)365 ret <4 x float> %v366}367 368; CHECK-LABEL: sin_v4f32:369; CHECK: call $push[[L:[0-9]+]]=, sinf370declare <4 x float> @llvm.sin.v4f32(<4 x float>)371define <4 x float> @sin_v4f32(<4 x float> %x) {372 %v = call <4 x float> @llvm.sin.v4f32(<4 x float> %x)373 ret <4 x float> %v374}375 376; CHECK-LABEL: cos_v4f32:377; CHECK: call $push[[L:[0-9]+]]=, cosf378declare <4 x float> @llvm.cos.v4f32(<4 x float>)379define <4 x float> @cos_v4f32(<4 x float> %x) {380 %v = call <4 x float> @llvm.cos.v4f32(<4 x float> %x)381 ret <4 x float> %v382}383 384; CHECK-LABEL: tan_v4f32:385; CHECK: call $push[[L:[0-9]+]]=, tanf386declare <4 x float> @llvm.tan.v4f32(<4 x float>)387define <4 x float> @tan_v4f32(<4 x float> %x) {388 %v = call <4 x float> @llvm.tan.v4f32(<4 x float> %x)389 ret <4 x float> %v390}391 392; CHECK-LABEL: powi_v4f32:393; CHECK: call $push[[L:[0-9]+]]=, __powisf2394declare <4 x float> @llvm.powi.v4f32.i32(<4 x float>, i32)395define <4 x float> @powi_v4f32(<4 x float> %x, i32 %y) {396 %v = call <4 x float> @llvm.powi.v4f32.i32(<4 x float> %x, i32 %y)397 ret <4 x float> %v398}399 400; CHECK-LABEL: pow_v4f32:401; CHECK: call $push[[L:[0-9]+]]=, powf402declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)403define <4 x float> @pow_v4f32(<4 x float> %x, <4 x float> %y) {404 %v = call <4 x float> @llvm.pow.v4f32(<4 x float> %x, <4 x float> %y)405 ret <4 x float> %v406}407 408; CHECK-LABEL: log_v4f32:409; CHECK: call $push[[L:[0-9]+]]=, logf410declare <4 x float> @llvm.log.v4f32(<4 x float>)411define <4 x float> @log_v4f32(<4 x float> %x) {412 %v = call <4 x float> @llvm.log.v4f32(<4 x float> %x)413 ret <4 x float> %v414}415 416; CHECK-LABEL: log2_v4f32:417; CHECK: call $push[[L:[0-9]+]]=, log2f418declare <4 x float> @llvm.log2.v4f32(<4 x float>)419define <4 x float> @log2_v4f32(<4 x float> %x) {420 %v = call <4 x float> @llvm.log2.v4f32(<4 x float> %x)421 ret <4 x float> %v422}423 424; CHECK-LABEL: log10_v4f32:425; CHECK: call $push[[L:[0-9]+]]=, log10f426declare <4 x float> @llvm.log10.v4f32(<4 x float>)427define <4 x float> @log10_v4f32(<4 x float> %x) {428 %v = call <4 x float> @llvm.log10.v4f32(<4 x float> %x)429 ret <4 x float> %v430}431 432; CHECK-LABEL: exp_v4f32:433; CHECK: call $push[[L:[0-9]+]]=, expf434declare <4 x float> @llvm.exp.v4f32(<4 x float>)435define <4 x float> @exp_v4f32(<4 x float> %x) {436 %v = call <4 x float> @llvm.exp.v4f32(<4 x float> %x)437 ret <4 x float> %v438}439 440; CHECK-LABEL: exp2_v4f32:441; CHECK: call $push[[L:[0-9]+]]=, exp2f442declare <4 x float> @llvm.exp2.v4f32(<4 x float>)443define <4 x float> @exp2_v4f32(<4 x float> %x) {444 %v = call <4 x float> @llvm.exp2.v4f32(<4 x float> %x)445 ret <4 x float> %v446}447 448; CHECK-LABEL: round_v4f32:449; CHECK: call $push[[L:[0-9]+]]=, roundf450declare <4 x float> @llvm.round.v4f32(<4 x float>)451define <4 x float> @round_v4f32(<4 x float> %x) {452 %v = call <4 x float> @llvm.round.v4f32(<4 x float> %x)453 ret <4 x float> %v454}455 456; ==============================================================================457; 2 x f64458; ==============================================================================459 460; CHECK-LABEL: copysign_v2f64:461; CHECK: v128.const462; CHECK-NEXT: v128.and463; CHECK-NEXT: v128.const464; CHECK-NEXT: v128.and465; CHECK-NEXT: v128.or466declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>)467define <2 x double> @copysign_v2f64(<2 x double> %x, <2 x double> %y) {468 %v = call <2 x double> @llvm.copysign.v2f64(<2 x double> %x, <2 x double> %y)469 ret <2 x double> %v470}471 472; CHECK-LABEL: sin_v2f64:473; CHECK: call $push[[L:[0-9]+]]=, sin474declare <2 x double> @llvm.sin.v2f64(<2 x double>)475define <2 x double> @sin_v2f64(<2 x double> %x) {476 %v = call <2 x double> @llvm.sin.v2f64(<2 x double> %x)477 ret <2 x double> %v478}479 480; CHECK-LABEL: cos_v2f64:481; CHECK: call $push[[L:[0-9]+]]=, cos482declare <2 x double> @llvm.cos.v2f64(<2 x double>)483define <2 x double> @cos_v2f64(<2 x double> %x) {484 %v = call <2 x double> @llvm.cos.v2f64(<2 x double> %x)485 ret <2 x double> %v486}487 488; CHECK-LABEL: tan_v2f64:489; CHECK: call $push[[L:[0-9]+]]=, tan490declare <2 x double> @llvm.tan.v2f64(<2 x double>)491define <2 x double> @tan_v2f64(<2 x double> %x) {492 %v = call <2 x double> @llvm.tan.v2f64(<2 x double> %x)493 ret <2 x double> %v494}495 496; CHECK-LABEL: powi_v2f64:497; CHECK: call $push[[L:[0-9]+]]=, __powidf2498declare <2 x double> @llvm.powi.v2f64.i32(<2 x double>, i32)499define <2 x double> @powi_v2f64(<2 x double> %x, i32 %y) {500 %v = call <2 x double> @llvm.powi.v2f64.i32(<2 x double> %x, i32 %y)501 ret <2 x double> %v502}503 504; CHECK-LABEL: pow_v2f64:505; CHECK: call $push[[L:[0-9]+]]=, pow506declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)507define <2 x double> @pow_v2f64(<2 x double> %x, <2 x double> %y) {508 %v = call <2 x double> @llvm.pow.v2f64(<2 x double> %x, <2 x double> %y)509 ret <2 x double> %v510}511 512; CHECK-LABEL: log_v2f64:513; CHECK: call $push[[L:[0-9]+]]=, log514declare <2 x double> @llvm.log.v2f64(<2 x double>)515define <2 x double> @log_v2f64(<2 x double> %x) {516 %v = call <2 x double> @llvm.log.v2f64(<2 x double> %x)517 ret <2 x double> %v518}519 520; CHECK-LABEL: log2_v2f64:521; CHECK: call $push[[L:[0-9]+]]=, log2522declare <2 x double> @llvm.log2.v2f64(<2 x double>)523define <2 x double> @log2_v2f64(<2 x double> %x) {524 %v = call <2 x double> @llvm.log2.v2f64(<2 x double> %x)525 ret <2 x double> %v526}527 528; CHECK-LABEL: log10_v2f64:529; CHECK: call $push[[L:[0-9]+]]=, log10530declare <2 x double> @llvm.log10.v2f64(<2 x double>)531define <2 x double> @log10_v2f64(<2 x double> %x) {532 %v = call <2 x double> @llvm.log10.v2f64(<2 x double> %x)533 ret <2 x double> %v534}535 536; CHECK-LABEL: exp_v2f64:537; CHECK: call $push[[L:[0-9]+]]=, exp538declare <2 x double> @llvm.exp.v2f64(<2 x double>)539define <2 x double> @exp_v2f64(<2 x double> %x) {540 %v = call <2 x double> @llvm.exp.v2f64(<2 x double> %x)541 ret <2 x double> %v542}543 544; CHECK-LABEL: exp2_v2f64:545; CHECK: call $push[[L:[0-9]+]]=, exp2546declare <2 x double> @llvm.exp2.v2f64(<2 x double>)547define <2 x double> @exp2_v2f64(<2 x double> %x) {548 %v = call <2 x double> @llvm.exp2.v2f64(<2 x double> %x)549 ret <2 x double> %v550}551 552; CHECK-LABEL: round_v2f64:553; CHECK: call $push[[L:[0-9]+]]=, round554declare <2 x double> @llvm.round.v2f64(<2 x double>)555define <2 x double> @round_v2f64(<2 x double> %x) {556 %v = call <2 x double> @llvm.round.v2f64(<2 x double> %x)557 ret <2 x double> %v558}559