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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc < %s -mtriple=wasm32 -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s --check-prefix=SIMD1283 4define i64 @pairwise_add_v2i64(<2 x i64> %arg) {5; SIMD128-LABEL: pairwise_add_v2i64:6; SIMD128: .functype pairwise_add_v2i64 (v128) -> (i64)7; SIMD128-NEXT: # %bb.0:8; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 79; SIMD128-NEXT: i64x2.add $push1=, $0, $pop010; SIMD128-NEXT: i64x2.extract_lane $push2=, $pop1, 011; SIMD128-NEXT: return $pop212 %res = tail call i64 @llvm.vector.reduce.add.i64.v4i64(<2 x i64> %arg)13 ret i64 %res14}15 16define i32 @pairwise_add_v4i32(<4 x i32> %arg) {17; SIMD128-LABEL: pairwise_add_v4i32:18; SIMD128: .functype pairwise_add_v4i32 (v128) -> (i32)19; SIMD128-NEXT: # %bb.0:20; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 321; SIMD128-NEXT: i32x4.add $push5=, $0, $pop022; SIMD128-NEXT: local.tee $push4=, $0=, $pop523; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 324; SIMD128-NEXT: i32x4.add $push2=, $pop4, $pop125; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 026; SIMD128-NEXT: return $pop327 %res = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %arg)28 ret i32 %res29}30 31define i16 @pairwise_add_v8i16(<8 x i16> %arg) {32; SIMD128-LABEL: pairwise_add_v8i16:33; SIMD128: .functype pairwise_add_v8i16 (v128) -> (i32)34; SIMD128-NEXT: # %bb.0:35; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 136; SIMD128-NEXT: i16x8.add $push8=, $0, $pop037; SIMD128-NEXT: local.tee $push7=, $0=, $pop838; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 139; SIMD128-NEXT: i16x8.add $push6=, $pop7, $pop140; SIMD128-NEXT: local.tee $push5=, $0=, $pop641; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 142; SIMD128-NEXT: i16x8.add $push3=, $pop5, $pop243; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 044; SIMD128-NEXT: return $pop445 %res = tail call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %arg)46 ret i16 %res47}48 49define i8 @pairwise_add_v16i8(<16 x i8> %arg) {50; SIMD128-LABEL: pairwise_add_v16i8:51; SIMD128: .functype pairwise_add_v16i8 (v128) -> (i32)52; SIMD128-NEXT: # %bb.0:53; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 054; SIMD128-NEXT: i8x16.add $push11=, $0, $pop055; SIMD128-NEXT: local.tee $push10=, $0=, $pop1156; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 057; SIMD128-NEXT: i8x16.add $push9=, $pop10, $pop158; SIMD128-NEXT: local.tee $push8=, $0=, $pop959; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 060; SIMD128-NEXT: i8x16.add $push7=, $pop8, $pop261; SIMD128-NEXT: local.tee $push6=, $0=, $pop762; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 063; SIMD128-NEXT: i8x16.add $push4=, $pop6, $pop364; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 065; SIMD128-NEXT: return $pop566 %res = tail call i8 @llvm.vector.reduce.add.v16i8(<16 x i8> %arg)67 ret i8 %res68}69 70define i64 @pairwise_mul_v2i64(<2 x i64> %arg) {71; SIMD128-LABEL: pairwise_mul_v2i64:72; SIMD128: .functype pairwise_mul_v2i64 (v128) -> (i64)73; SIMD128-NEXT: # %bb.0:74; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 775; SIMD128-NEXT: i64x2.mul $push1=, $0, $pop076; SIMD128-NEXT: i64x2.extract_lane $push2=, $pop1, 077; SIMD128-NEXT: return $pop278 %res = tail call i64 @llvm.vector.reduce.mul.v2i64(<2 x i64> %arg)79 ret i64 %res80}81 82define i32 @pairwise_mul_v4i32(<4 x i32> %arg) {83; SIMD128-LABEL: pairwise_mul_v4i32:84; SIMD128: .functype pairwise_mul_v4i32 (v128) -> (i32)85; SIMD128-NEXT: # %bb.0:86; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 387; SIMD128-NEXT: i32x4.mul $push5=, $0, $pop088; SIMD128-NEXT: local.tee $push4=, $0=, $pop589; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 390; SIMD128-NEXT: i32x4.mul $push2=, $pop4, $pop191; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 092; SIMD128-NEXT: return $pop393 %res = tail call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %arg)94 ret i32 %res95}96 97define i16 @pairwise_mul_v8i16(<8 x i16> %arg) {98; SIMD128-LABEL: pairwise_mul_v8i16:99; SIMD128: .functype pairwise_mul_v8i16 (v128) -> (i32)100; SIMD128-NEXT: # %bb.0:101; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1102; SIMD128-NEXT: i16x8.mul $push8=, $0, $pop0103; SIMD128-NEXT: local.tee $push7=, $0=, $pop8104; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1105; SIMD128-NEXT: i16x8.mul $push6=, $pop7, $pop1106; SIMD128-NEXT: local.tee $push5=, $0=, $pop6107; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1108; SIMD128-NEXT: i16x8.mul $push3=, $pop5, $pop2109; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0110; SIMD128-NEXT: return $pop4111 %res = tail call i16 @llvm.vector.reduce.mul.v8i16(<8 x i16> %arg)112 ret i16 %res113}114 115define i8 @pairwise_mul_v16i8(<16 x i8> %arg) {116; SIMD128-LABEL: pairwise_mul_v16i8:117; SIMD128: .functype pairwise_mul_v16i8 (v128) -> (i32)118; SIMD128-NEXT: # %bb.0:119; SIMD128-NEXT: i8x16.shuffle $push20=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0120; SIMD128-NEXT: local.tee $push19=, $1=, $pop20121; SIMD128-NEXT: i16x8.extmul_low_i8x16_u $push1=, $0, $pop19122; SIMD128-NEXT: i16x8.extmul_high_i8x16_u $push0=, $0, $1123; SIMD128-NEXT: i8x16.shuffle $push18=, $pop1, $pop0, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30124; SIMD128-NEXT: local.tee $push17=, $0=, $pop18125; SIMD128-NEXT: i8x16.shuffle $push16=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0126; SIMD128-NEXT: local.tee $push15=, $1=, $pop16127; SIMD128-NEXT: i16x8.extmul_low_i8x16_u $push3=, $pop17, $pop15128; SIMD128-NEXT: i16x8.extmul_high_i8x16_u $push2=, $0, $1129; SIMD128-NEXT: i8x16.shuffle $push14=, $pop3, $pop2, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30130; SIMD128-NEXT: local.tee $push13=, $0=, $pop14131; SIMD128-NEXT: i8x16.shuffle $push12=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0132; SIMD128-NEXT: local.tee $push11=, $1=, $pop12133; SIMD128-NEXT: i16x8.extmul_low_i8x16_u $push5=, $pop13, $pop11134; SIMD128-NEXT: i16x8.extmul_high_i8x16_u $push4=, $0, $1135; SIMD128-NEXT: i8x16.shuffle $push10=, $pop5, $pop4, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30136; SIMD128-NEXT: local.tee $push9=, $0=, $pop10137; SIMD128-NEXT: i8x16.shuffle $push6=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0138; SIMD128-NEXT: i16x8.extmul_low_i8x16_u $push7=, $pop9, $pop6139; SIMD128-NEXT: i8x16.extract_lane_u $push8=, $pop7, 0140; SIMD128-NEXT: return $pop8141 %res = tail call i8 @llvm.vector.reduce.mul.v16i8(<16 x i8> %arg)142 ret i8 %res143}144 145define i64 @pairwise_and_v2i64(<2 x i64> %arg) {146; SIMD128-LABEL: pairwise_and_v2i64:147; SIMD128: .functype pairwise_and_v2i64 (v128) -> (i64)148; SIMD128-NEXT: # %bb.0:149; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7150; SIMD128-NEXT: v128.and $push1=, $0, $pop0151; SIMD128-NEXT: i64x2.extract_lane $push2=, $pop1, 0152; SIMD128-NEXT: return $pop2153 %res = tail call i64 @llvm.vector.reduce.and.v2i64(<2 x i64> %arg)154 ret i64 %res155}156 157define i32 @pairwise_and_v4i32(<4 x i32> %arg) {158; SIMD128-LABEL: pairwise_and_v4i32:159; SIMD128: .functype pairwise_and_v4i32 (v128) -> (i32)160; SIMD128-NEXT: # %bb.0:161; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3162; SIMD128-NEXT: v128.and $push5=, $0, $pop0163; SIMD128-NEXT: local.tee $push4=, $0=, $pop5164; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3165; SIMD128-NEXT: v128.and $push2=, $pop4, $pop1166; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 0167; SIMD128-NEXT: return $pop3168 %res = tail call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %arg)169 ret i32 %res170}171 172define i16 @pairwise_and_v8i16(<8 x i16> %arg) {173; SIMD128-LABEL: pairwise_and_v8i16:174; SIMD128: .functype pairwise_and_v8i16 (v128) -> (i32)175; SIMD128-NEXT: # %bb.0:176; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1177; SIMD128-NEXT: v128.and $push8=, $0, $pop0178; SIMD128-NEXT: local.tee $push7=, $0=, $pop8179; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1180; SIMD128-NEXT: v128.and $push6=, $pop7, $pop1181; SIMD128-NEXT: local.tee $push5=, $0=, $pop6182; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1183; SIMD128-NEXT: v128.and $push3=, $pop5, $pop2184; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0185; SIMD128-NEXT: return $pop4186 %res = tail call i16 @llvm.vector.reduce.and.v8i16(<8 x i16> %arg)187 ret i16 %res188}189 190define i8 @pairwise_and_v16i8(<16 x i8> %arg) {191; SIMD128-LABEL: pairwise_and_v16i8:192; SIMD128: .functype pairwise_and_v16i8 (v128) -> (i32)193; SIMD128-NEXT: # %bb.0:194; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0195; SIMD128-NEXT: v128.and $push11=, $0, $pop0196; SIMD128-NEXT: local.tee $push10=, $0=, $pop11197; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0198; SIMD128-NEXT: v128.and $push9=, $pop10, $pop1199; SIMD128-NEXT: local.tee $push8=, $0=, $pop9200; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0201; SIMD128-NEXT: v128.and $push7=, $pop8, $pop2202; SIMD128-NEXT: local.tee $push6=, $0=, $pop7203; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0204; SIMD128-NEXT: v128.and $push4=, $pop6, $pop3205; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0206; SIMD128-NEXT: return $pop5207 %res = tail call i8 @llvm.vector.reduce.and.v16i8(<16 x i8> %arg)208 ret i8 %res209}210 211define i64 @pairwise_or_v2i64(<2 x i64> %arg) {212; SIMD128-LABEL: pairwise_or_v2i64:213; SIMD128: .functype pairwise_or_v2i64 (v128) -> (i64)214; SIMD128-NEXT: # %bb.0:215; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7216; SIMD128-NEXT: v128.or $push1=, $0, $pop0217; SIMD128-NEXT: i64x2.extract_lane $push2=, $pop1, 0218; SIMD128-NEXT: return $pop2219 %res = tail call i64 @llvm.vector.reduce.or.v2i64(<2 x i64> %arg)220 ret i64 %res221}222 223define i32 @pairwise_or_v4i32(<4 x i32> %arg) {224; SIMD128-LABEL: pairwise_or_v4i32:225; SIMD128: .functype pairwise_or_v4i32 (v128) -> (i32)226; SIMD128-NEXT: # %bb.0:227; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3228; SIMD128-NEXT: v128.or $push5=, $0, $pop0229; SIMD128-NEXT: local.tee $push4=, $0=, $pop5230; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3231; SIMD128-NEXT: v128.or $push2=, $pop4, $pop1232; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 0233; SIMD128-NEXT: return $pop3234 %res = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %arg)235 ret i32 %res236}237 238define i16 @pairwise_or_v8i16(<8 x i16> %arg) {239; SIMD128-LABEL: pairwise_or_v8i16:240; SIMD128: .functype pairwise_or_v8i16 (v128) -> (i32)241; SIMD128-NEXT: # %bb.0:242; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1243; SIMD128-NEXT: v128.or $push8=, $0, $pop0244; SIMD128-NEXT: local.tee $push7=, $0=, $pop8245; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1246; SIMD128-NEXT: v128.or $push6=, $pop7, $pop1247; SIMD128-NEXT: local.tee $push5=, $0=, $pop6248; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1249; SIMD128-NEXT: v128.or $push3=, $pop5, $pop2250; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0251; SIMD128-NEXT: return $pop4252 %res = tail call i16 @llvm.vector.reduce.or.v8i16(<8 x i16> %arg)253 ret i16 %res254}255 256define i8 @pairwise_or_v16i8(<16 x i8> %arg) {257; SIMD128-LABEL: pairwise_or_v16i8:258; SIMD128: .functype pairwise_or_v16i8 (v128) -> (i32)259; SIMD128-NEXT: # %bb.0:260; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0261; SIMD128-NEXT: v128.or $push11=, $0, $pop0262; SIMD128-NEXT: local.tee $push10=, $0=, $pop11263; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0264; SIMD128-NEXT: v128.or $push9=, $pop10, $pop1265; SIMD128-NEXT: local.tee $push8=, $0=, $pop9266; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0267; SIMD128-NEXT: v128.or $push7=, $pop8, $pop2268; SIMD128-NEXT: local.tee $push6=, $0=, $pop7269; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0270; SIMD128-NEXT: v128.or $push4=, $pop6, $pop3271; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0272; SIMD128-NEXT: return $pop5273 %res = tail call i8 @llvm.vector.reduce.or.v16i8(<16 x i8> %arg)274 ret i8 %res275}276 277define i64 @pairwise_xor_v2i64(<2 x i64> %arg) {278; SIMD128-LABEL: pairwise_xor_v2i64:279; SIMD128: .functype pairwise_xor_v2i64 (v128) -> (i64)280; SIMD128-NEXT: # %bb.0:281; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7282; SIMD128-NEXT: v128.xor $push1=, $0, $pop0283; SIMD128-NEXT: i64x2.extract_lane $push2=, $pop1, 0284; SIMD128-NEXT: return $pop2285 %res = tail call i64 @llvm.vector.reduce.xor.v2i64(<2 x i64> %arg)286 ret i64 %res287}288 289define i32 @pairwise_xor_v4i32(<4 x i32> %arg) {290; SIMD128-LABEL: pairwise_xor_v4i32:291; SIMD128: .functype pairwise_xor_v4i32 (v128) -> (i32)292; SIMD128-NEXT: # %bb.0:293; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3294; SIMD128-NEXT: v128.xor $push5=, $0, $pop0295; SIMD128-NEXT: local.tee $push4=, $0=, $pop5296; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3297; SIMD128-NEXT: v128.xor $push2=, $pop4, $pop1298; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 0299; SIMD128-NEXT: return $pop3300 %res = tail call i32 @llvm.vector.reduce.xor.v4i32(<4 x i32> %arg)301 ret i32 %res302}303 304define i16 @pairwise_xor_v8i16(<8 x i16> %arg) {305; SIMD128-LABEL: pairwise_xor_v8i16:306; SIMD128: .functype pairwise_xor_v8i16 (v128) -> (i32)307; SIMD128-NEXT: # %bb.0:308; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1309; SIMD128-NEXT: v128.xor $push8=, $0, $pop0310; SIMD128-NEXT: local.tee $push7=, $0=, $pop8311; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1312; SIMD128-NEXT: v128.xor $push6=, $pop7, $pop1313; SIMD128-NEXT: local.tee $push5=, $0=, $pop6314; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1315; SIMD128-NEXT: v128.xor $push3=, $pop5, $pop2316; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0317; SIMD128-NEXT: return $pop4318 %res = tail call i16 @llvm.vector.reduce.xor.v8i16(<8 x i16> %arg)319 ret i16 %res320}321 322define i8 @pairwise_xor_v16i8(<16 x i8> %arg) {323; SIMD128-LABEL: pairwise_xor_v16i8:324; SIMD128: .functype pairwise_xor_v16i8 (v128) -> (i32)325; SIMD128-NEXT: # %bb.0:326; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0327; SIMD128-NEXT: v128.xor $push11=, $0, $pop0328; SIMD128-NEXT: local.tee $push10=, $0=, $pop11329; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0330; SIMD128-NEXT: v128.xor $push9=, $pop10, $pop1331; SIMD128-NEXT: local.tee $push8=, $0=, $pop9332; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0333; SIMD128-NEXT: v128.xor $push7=, $pop8, $pop2334; SIMD128-NEXT: local.tee $push6=, $0=, $pop7335; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0336; SIMD128-NEXT: v128.xor $push4=, $pop6, $pop3337; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0338; SIMD128-NEXT: return $pop5339 %res = tail call i8 @llvm.vector.reduce.xor.v16i8(<16 x i8> %arg)340 ret i8 %res341}342 343define i64 @pairwise_smax_v2i64(<2 x i64> %arg) {344; SIMD128-LABEL: pairwise_smax_v2i64:345; SIMD128: .functype pairwise_smax_v2i64 (v128) -> (i64)346; SIMD128-NEXT: # %bb.0:347; SIMD128-NEXT: i8x16.shuffle $push4=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7348; SIMD128-NEXT: local.tee $push3=, $1=, $pop4349; SIMD128-NEXT: i64x2.gt_s $push0=, $0, $1350; SIMD128-NEXT: v128.bitselect $push1=, $0, $pop3, $pop0351; SIMD128-NEXT: i64x2.extract_lane $push2=, $pop1, 0352; SIMD128-NEXT: return $pop2353 %res = tail call i64 @llvm.vector.reduce.smax.v2i64(<2 x i64> %arg)354 ret i64 %res355}356 357define i32 @pairwise_smax_v4i32(<4 x i32> %arg) {358; SIMD128-LABEL: pairwise_smax_v4i32:359; SIMD128: .functype pairwise_smax_v4i32 (v128) -> (i32)360; SIMD128-NEXT: # %bb.0:361; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3362; SIMD128-NEXT: i32x4.max_s $push5=, $0, $pop0363; SIMD128-NEXT: local.tee $push4=, $0=, $pop5364; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3365; SIMD128-NEXT: i32x4.max_s $push2=, $pop4, $pop1366; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 0367; SIMD128-NEXT: return $pop3368 %res = tail call i32 @llvm.vector.reduce.smax.v4i32(<4 x i32> %arg)369 ret i32 %res370}371 372define i16 @pairwise_smax_v8i16(<8 x i16> %arg) {373; SIMD128-LABEL: pairwise_smax_v8i16:374; SIMD128: .functype pairwise_smax_v8i16 (v128) -> (i32)375; SIMD128-NEXT: # %bb.0:376; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1377; SIMD128-NEXT: i16x8.max_s $push8=, $0, $pop0378; SIMD128-NEXT: local.tee $push7=, $0=, $pop8379; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1380; SIMD128-NEXT: i16x8.max_s $push6=, $pop7, $pop1381; SIMD128-NEXT: local.tee $push5=, $0=, $pop6382; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1383; SIMD128-NEXT: i16x8.max_s $push3=, $pop5, $pop2384; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0385; SIMD128-NEXT: return $pop4386 %res = tail call i16 @llvm.vector.reduce.smax.v8i16(<8 x i16> %arg)387 ret i16 %res388}389 390define i8 @pairwise_smax_v16i8(<16 x i8> %arg) {391; SIMD128-LABEL: pairwise_smax_v16i8:392; SIMD128: .functype pairwise_smax_v16i8 (v128) -> (i32)393; SIMD128-NEXT: # %bb.0:394; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0395; SIMD128-NEXT: i8x16.max_s $push11=, $0, $pop0396; SIMD128-NEXT: local.tee $push10=, $0=, $pop11397; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0398; SIMD128-NEXT: i8x16.max_s $push9=, $pop10, $pop1399; SIMD128-NEXT: local.tee $push8=, $0=, $pop9400; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0401; SIMD128-NEXT: i8x16.max_s $push7=, $pop8, $pop2402; SIMD128-NEXT: local.tee $push6=, $0=, $pop7403; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0404; SIMD128-NEXT: i8x16.max_s $push4=, $pop6, $pop3405; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0406; SIMD128-NEXT: return $pop5407 %res = tail call i8 @llvm.vector.reduce.smax.v16i8(<16 x i8> %arg)408 ret i8 %res409}410 411define i64 @pairwise_smin_v2i64(<2 x i64> %arg) {412; SIMD128-LABEL: pairwise_smin_v2i64:413; SIMD128: .functype pairwise_smin_v2i64 (v128) -> (i64)414; SIMD128-NEXT: # %bb.0:415; SIMD128-NEXT: i8x16.shuffle $push4=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7416; SIMD128-NEXT: local.tee $push3=, $1=, $pop4417; SIMD128-NEXT: i64x2.lt_s $push0=, $0, $1418; SIMD128-NEXT: v128.bitselect $push1=, $0, $pop3, $pop0419; SIMD128-NEXT: i64x2.extract_lane $push2=, $pop1, 0420; SIMD128-NEXT: return $pop2421 %res = tail call i64 @llvm.vector.reduce.smin.v2i64(<2 x i64> %arg)422 ret i64 %res423}424 425define i32 @pairwise_smin_v4i32(<4 x i32> %arg) {426; SIMD128-LABEL: pairwise_smin_v4i32:427; SIMD128: .functype pairwise_smin_v4i32 (v128) -> (i32)428; SIMD128-NEXT: # %bb.0:429; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3430; SIMD128-NEXT: i32x4.min_s $push5=, $0, $pop0431; SIMD128-NEXT: local.tee $push4=, $0=, $pop5432; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3433; SIMD128-NEXT: i32x4.min_s $push2=, $pop4, $pop1434; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 0435; SIMD128-NEXT: return $pop3436 %res = tail call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> %arg)437 ret i32 %res438}439 440define i16 @pairwise_smin_v8i16(<8 x i16> %arg) {441; SIMD128-LABEL: pairwise_smin_v8i16:442; SIMD128: .functype pairwise_smin_v8i16 (v128) -> (i32)443; SIMD128-NEXT: # %bb.0:444; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1445; SIMD128-NEXT: i16x8.min_s $push8=, $0, $pop0446; SIMD128-NEXT: local.tee $push7=, $0=, $pop8447; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1448; SIMD128-NEXT: i16x8.min_s $push6=, $pop7, $pop1449; SIMD128-NEXT: local.tee $push5=, $0=, $pop6450; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1451; SIMD128-NEXT: i16x8.min_s $push3=, $pop5, $pop2452; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0453; SIMD128-NEXT: return $pop4454 %res = tail call i16 @llvm.vector.reduce.smin.v8i16(<8 x i16> %arg)455 ret i16 %res456}457 458define i8 @pairwise_smin_v16i8(<16 x i8> %arg) {459; SIMD128-LABEL: pairwise_smin_v16i8:460; SIMD128: .functype pairwise_smin_v16i8 (v128) -> (i32)461; SIMD128-NEXT: # %bb.0:462; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0463; SIMD128-NEXT: i8x16.min_s $push11=, $0, $pop0464; SIMD128-NEXT: local.tee $push10=, $0=, $pop11465; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0466; SIMD128-NEXT: i8x16.min_s $push9=, $pop10, $pop1467; SIMD128-NEXT: local.tee $push8=, $0=, $pop9468; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0469; SIMD128-NEXT: i8x16.min_s $push7=, $pop8, $pop2470; SIMD128-NEXT: local.tee $push6=, $0=, $pop7471; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0472; SIMD128-NEXT: i8x16.min_s $push4=, $pop6, $pop3473; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0474; SIMD128-NEXT: return $pop5475 %res = tail call i8 @llvm.vector.reduce.smin.v16i8(<16 x i8> %arg)476 ret i8 %res477}478 479define i64 @pairwise_umax_v2i64(<2 x i64> %arg) {480; SIMD128-LABEL: pairwise_umax_v2i64:481; SIMD128: .functype pairwise_umax_v2i64 (v128) -> (i64)482; SIMD128-NEXT: # %bb.0:483; SIMD128-NEXT: i8x16.shuffle $push10=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7484; SIMD128-NEXT: local.tee $push9=, $1=, $pop10485; SIMD128-NEXT: i64.const $push4=, -1486; SIMD128-NEXT: i64.const $push3=, 0487; SIMD128-NEXT: i64x2.extract_lane $push1=, $0, 0488; SIMD128-NEXT: i64x2.extract_lane $push0=, $1, 0489; SIMD128-NEXT: i64.gt_u $push2=, $pop1, $pop0490; SIMD128-NEXT: i64.select $push5=, $pop4, $pop3, $pop2491; SIMD128-NEXT: i64x2.replace_lane $push6=, $0, 0, $pop5492; SIMD128-NEXT: v128.bitselect $push7=, $0, $pop9, $pop6493; SIMD128-NEXT: i64x2.extract_lane $push8=, $pop7, 0494; SIMD128-NEXT: return $pop8495 %res = tail call i64 @llvm.vector.reduce.umax.v2i64(<2 x i64> %arg)496 ret i64 %res497}498 499define i32 @pairwise_umax_v4i32(<4 x i32> %arg) {500; SIMD128-LABEL: pairwise_umax_v4i32:501; SIMD128: .functype pairwise_umax_v4i32 (v128) -> (i32)502; SIMD128-NEXT: # %bb.0:503; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3504; SIMD128-NEXT: i32x4.max_u $push5=, $0, $pop0505; SIMD128-NEXT: local.tee $push4=, $0=, $pop5506; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3507; SIMD128-NEXT: i32x4.max_u $push2=, $pop4, $pop1508; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 0509; SIMD128-NEXT: return $pop3510 %res = tail call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %arg)511 ret i32 %res512}513 514define i16 @pairwise_umax_v8i16(<8 x i16> %arg) {515; SIMD128-LABEL: pairwise_umax_v8i16:516; SIMD128: .functype pairwise_umax_v8i16 (v128) -> (i32)517; SIMD128-NEXT: # %bb.0:518; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1519; SIMD128-NEXT: i16x8.max_u $push8=, $0, $pop0520; SIMD128-NEXT: local.tee $push7=, $0=, $pop8521; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1522; SIMD128-NEXT: i16x8.max_u $push6=, $pop7, $pop1523; SIMD128-NEXT: local.tee $push5=, $0=, $pop6524; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1525; SIMD128-NEXT: i16x8.max_u $push3=, $pop5, $pop2526; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0527; SIMD128-NEXT: return $pop4528 %res = tail call i16 @llvm.vector.reduce.umax.v8i16(<8 x i16> %arg)529 ret i16 %res530}531 532define i8 @pairwise_umax_v16i8(<16 x i8> %arg) {533; SIMD128-LABEL: pairwise_umax_v16i8:534; SIMD128: .functype pairwise_umax_v16i8 (v128) -> (i32)535; SIMD128-NEXT: # %bb.0:536; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0537; SIMD128-NEXT: i8x16.max_u $push11=, $0, $pop0538; SIMD128-NEXT: local.tee $push10=, $0=, $pop11539; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0540; SIMD128-NEXT: i8x16.max_u $push9=, $pop10, $pop1541; SIMD128-NEXT: local.tee $push8=, $0=, $pop9542; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0543; SIMD128-NEXT: i8x16.max_u $push7=, $pop8, $pop2544; SIMD128-NEXT: local.tee $push6=, $0=, $pop7545; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0546; SIMD128-NEXT: i8x16.max_u $push4=, $pop6, $pop3547; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0548; SIMD128-NEXT: return $pop5549 %res = tail call i8 @llvm.vector.reduce.umax.v16i8(<16 x i8> %arg)550 ret i8 %res551}552 553define i64 @pairwise_umin_v2i64(<2 x i64> %arg) {554; SIMD128-LABEL: pairwise_umin_v2i64:555; SIMD128: .functype pairwise_umin_v2i64 (v128) -> (i64)556; SIMD128-NEXT: # %bb.0:557; SIMD128-NEXT: i8x16.shuffle $push10=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7558; SIMD128-NEXT: local.tee $push9=, $1=, $pop10559; SIMD128-NEXT: i64.const $push4=, -1560; SIMD128-NEXT: i64.const $push3=, 0561; SIMD128-NEXT: i64x2.extract_lane $push1=, $0, 0562; SIMD128-NEXT: i64x2.extract_lane $push0=, $1, 0563; SIMD128-NEXT: i64.lt_u $push2=, $pop1, $pop0564; SIMD128-NEXT: i64.select $push5=, $pop4, $pop3, $pop2565; SIMD128-NEXT: i64x2.replace_lane $push6=, $0, 0, $pop5566; SIMD128-NEXT: v128.bitselect $push7=, $0, $pop9, $pop6567; SIMD128-NEXT: i64x2.extract_lane $push8=, $pop7, 0568; SIMD128-NEXT: return $pop8569 %res = tail call i64 @llvm.vector.reduce.umin.v2i64(<2 x i64> %arg)570 ret i64 %res571}572 573define i32 @pairwise_umin_v4i32(<4 x i32> %arg) {574; SIMD128-LABEL: pairwise_umin_v4i32:575; SIMD128: .functype pairwise_umin_v4i32 (v128) -> (i32)576; SIMD128-NEXT: # %bb.0:577; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3578; SIMD128-NEXT: i32x4.min_u $push5=, $0, $pop0579; SIMD128-NEXT: local.tee $push4=, $0=, $pop5580; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3581; SIMD128-NEXT: i32x4.min_u $push2=, $pop4, $pop1582; SIMD128-NEXT: i32x4.extract_lane $push3=, $pop2, 0583; SIMD128-NEXT: return $pop3584 %res = tail call i32 @llvm.vector.reduce.umin.v4i32(<4 x i32> %arg)585 ret i32 %res586}587 588define i16 @pairwise_umin_v8i16(<8 x i16> %arg) {589; SIMD128-LABEL: pairwise_umin_v8i16:590; SIMD128: .functype pairwise_umin_v8i16 (v128) -> (i32)591; SIMD128-NEXT: # %bb.0:592; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 0, 1, 0, 1, 0, 1593; SIMD128-NEXT: i16x8.min_u $push8=, $0, $pop0594; SIMD128-NEXT: local.tee $push7=, $0=, $pop8595; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1596; SIMD128-NEXT: i16x8.min_u $push6=, $pop7, $pop1597; SIMD128-NEXT: local.tee $push5=, $0=, $pop6598; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1599; SIMD128-NEXT: i16x8.min_u $push3=, $pop5, $pop2600; SIMD128-NEXT: i16x8.extract_lane_u $push4=, $pop3, 0601; SIMD128-NEXT: return $pop4602 %res = tail call i16 @llvm.vector.reduce.umin.v8i16(<8 x i16> %arg)603 ret i16 %res604}605 606define i8 @pairwise_umin_v16i8(<16 x i8> %arg) {607; SIMD128-LABEL: pairwise_umin_v16i8:608; SIMD128: .functype pairwise_umin_v16i8 (v128) -> (i32)609; SIMD128-NEXT: # %bb.0:610; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0611; SIMD128-NEXT: i8x16.min_u $push11=, $0, $pop0612; SIMD128-NEXT: local.tee $push10=, $0=, $pop11613; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0614; SIMD128-NEXT: i8x16.min_u $push9=, $pop10, $pop1615; SIMD128-NEXT: local.tee $push8=, $0=, $pop9616; SIMD128-NEXT: i8x16.shuffle $push2=, $0, $0, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0617; SIMD128-NEXT: i8x16.min_u $push7=, $pop8, $pop2618; SIMD128-NEXT: local.tee $push6=, $0=, $pop7619; SIMD128-NEXT: i8x16.shuffle $push3=, $0, $0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0620; SIMD128-NEXT: i8x16.min_u $push4=, $pop6, $pop3621; SIMD128-NEXT: i8x16.extract_lane_u $push5=, $pop4, 0622; SIMD128-NEXT: return $pop5623 %res = tail call i8 @llvm.vector.reduce.umin.v16i8(<16 x i8> %arg)624 ret i8 %res625}626 627define double @pairwise_add_v2f64(<2 x double> %arg) {628; SIMD128-LABEL: pairwise_add_v2f64:629; SIMD128: .functype pairwise_add_v2f64 (v128) -> (f64)630; SIMD128-NEXT: # %bb.0:631; SIMD128-NEXT: f64x2.extract_lane $push1=, $0, 0632; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1633; SIMD128-NEXT: f64.add $push2=, $pop1, $pop0634; SIMD128-NEXT: return $pop2635 %res = tail call double @llvm.vector.reduce.fadd.v2f64(double -0.0, <2 x double> %arg)636 ret double%res637}638 639define double @pairwise_add_v2f64_fast(<2 x double> %arg) {640; SIMD128-LABEL: pairwise_add_v2f64_fast:641; SIMD128: .functype pairwise_add_v2f64_fast (v128) -> (f64)642; SIMD128-NEXT: # %bb.0:643; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7644; SIMD128-NEXT: f64x2.add $push1=, $0, $pop0645; SIMD128-NEXT: f64x2.extract_lane $push2=, $pop1, 0646; SIMD128-NEXT: return $pop2647 %res = tail call fast double @llvm.vector.reduce.fadd.v2f64(double -0.0, <2 x double> %arg)648 ret double%res649}650 651define float @pairwise_add_v4f32(<4 x float> %arg) {652; SIMD128-LABEL: pairwise_add_v4f32:653; SIMD128: .functype pairwise_add_v4f32 (v128) -> (f32)654; SIMD128-NEXT: # %bb.0:655; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 0656; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 1657; SIMD128-NEXT: f32.add $push2=, $pop1, $pop0658; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 2659; SIMD128-NEXT: f32.add $push4=, $pop2, $pop3660; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 3661; SIMD128-NEXT: f32.add $push6=, $pop4, $pop5662; SIMD128-NEXT: return $pop6663 %res = tail call float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %arg)664 ret float %res665}666 667define float @pairwise_add_v4f32_fast(<4 x float> %arg) {668; SIMD128-LABEL: pairwise_add_v4f32_fast:669; SIMD128: .functype pairwise_add_v4f32_fast (v128) -> (f32)670; SIMD128-NEXT: # %bb.0:671; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 0, 1, 2, 3672; SIMD128-NEXT: f32x4.add $push5=, $0, $pop0673; SIMD128-NEXT: local.tee $push4=, $0=, $pop5674; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3675; SIMD128-NEXT: f32x4.add $push2=, $pop4, $pop1676; SIMD128-NEXT: f32x4.extract_lane $push3=, $pop2, 0677; SIMD128-NEXT: return $pop3678 %res = tail call fast float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %arg)679 ret float %res680}681 682define float @pairwise_add_v4f32_reassoc(<4 x float> %arg) {683; SIMD128-LABEL: pairwise_add_v4f32_reassoc:684; SIMD128: .functype pairwise_add_v4f32_reassoc (v128) -> (f32)685; SIMD128-NEXT: # %bb.0:686; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 12, 13, 14, 15, 0, 1, 2, 3687; SIMD128-NEXT: f32x4.add $push5=, $0, $pop0688; SIMD128-NEXT: local.tee $push4=, $0=, $pop5689; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 8, 9, 10, 11, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3690; SIMD128-NEXT: f32x4.add $push2=, $pop4, $pop1691; SIMD128-NEXT: f32x4.extract_lane $push3=, $pop2, 0692; SIMD128-NEXT: return $pop3693 %res = tail call reassoc float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %arg)694 ret float %res695}696 697define double @pairwise_mul_v2f64(<2 x double> %arg) {698; SIMD128-LABEL: pairwise_mul_v2f64:699; SIMD128: .functype pairwise_mul_v2f64 (v128) -> (f64)700; SIMD128-NEXT: # %bb.0:701; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 0702; SIMD128-NEXT: f64.const $push1=, -0x0p0703; SIMD128-NEXT: f64.mul $push2=, $pop0, $pop1704; SIMD128-NEXT: f64x2.extract_lane $push3=, $0, 1705; SIMD128-NEXT: f64.mul $push4=, $pop2, $pop3706; SIMD128-NEXT: return $pop4707 %res = tail call double @llvm.vector.reduce.fmul.v2f64(double -0.0, <2 x double> %arg)708 ret double%res709}710 711define double @pairwise_mul_v2f64_fast(<2 x double> %arg) {712; SIMD128-LABEL: pairwise_mul_v2f64_fast:713; SIMD128: .functype pairwise_mul_v2f64_fast (v128) -> (f64)714; SIMD128-NEXT: # %bb.0:715; SIMD128-NEXT: f64.const $push0=, 0x0p0716; SIMD128-NEXT: return $pop0717 %res = tail call fast double @llvm.vector.reduce.fmul.v2f64(double -0.0, <2 x double> %arg)718 ret double%res719}720 721define float @pairwise_mul_v4f32(<4 x float> %arg) {722; SIMD128-LABEL: pairwise_mul_v4f32:723; SIMD128: .functype pairwise_mul_v4f32 (v128) -> (f32)724; SIMD128-NEXT: # %bb.0:725; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 0726; SIMD128-NEXT: f32.const $push1=, -0x0p0727; SIMD128-NEXT: f32.mul $push2=, $pop0, $pop1728; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 1729; SIMD128-NEXT: f32.mul $push4=, $pop2, $pop3730; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 2731; SIMD128-NEXT: f32.mul $push6=, $pop4, $pop5732; SIMD128-NEXT: f32x4.extract_lane $push7=, $0, 3733; SIMD128-NEXT: f32.mul $push8=, $pop6, $pop7734; SIMD128-NEXT: return $pop8735 %res = tail call float @llvm.vector.reduce.fmul.v4f32(float -0.0, <4 x float> %arg)736 ret float %res737}738 739define float @pairwise_mul_v4f32_fast(<4 x float> %arg) {740; SIMD128-LABEL: pairwise_mul_v4f32_fast:741; SIMD128: .functype pairwise_mul_v4f32_fast (v128) -> (f32)742; SIMD128-NEXT: # %bb.0:743; SIMD128-NEXT: f32.const $push0=, 0x0p0744; SIMD128-NEXT: return $pop0745 %res = tail call fast float @llvm.vector.reduce.fmul.v4f32(float -0.0, <4 x float> %arg)746 ret float %res747}748 749define float @pairwise_mul_v4f32_reassoc(<4 x float> %arg) {750; SIMD128-LABEL: pairwise_mul_v4f32_reassoc:751; SIMD128: .functype pairwise_mul_v4f32_reassoc (v128) -> (f32)752; SIMD128-NEXT: # %bb.0:753; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3754; SIMD128-NEXT: f32x4.mul $push7=, $0, $pop0755; SIMD128-NEXT: local.tee $push6=, $0=, $pop7756; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3757; SIMD128-NEXT: f32x4.mul $push2=, $pop6, $pop1758; SIMD128-NEXT: f32x4.extract_lane $push3=, $pop2, 0759; SIMD128-NEXT: f32.const $push4=, -0x0p0760; SIMD128-NEXT: f32.mul $push5=, $pop3, $pop4761; SIMD128-NEXT: return $pop5762 %res = tail call reassoc float @llvm.vector.reduce.fmul.v4f32(float -0.0, <4 x float> %arg)763 ret float %res764}765 766define double @pairwise_max_v2f64(<2 x double> %arg) {767; SIMD128-LABEL: pairwise_max_v2f64:768; SIMD128: .functype pairwise_max_v2f64 (v128) -> (f64)769; SIMD128-NEXT: # %bb.0:770; SIMD128-NEXT: f64x2.extract_lane $push1=, $0, 0771; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1772; SIMD128-NEXT: call $push2=, fmax, $pop1, $pop0773; SIMD128-NEXT: return $pop2774 %res = tail call double @llvm.vector.reduce.fmax.v2f64(<2 x double> %arg)775 ret double%res776}777 778define double @pairwise_max_v2f64_fast(<2 x double> %arg) {779; SIMD128-LABEL: pairwise_max_v2f64_fast:780; SIMD128: .functype pairwise_max_v2f64_fast (v128) -> (f64)781; SIMD128-NEXT: # %bb.0:782; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7783; SIMD128-NEXT: f64x2.pmax $push1=, $0, $pop0784; SIMD128-NEXT: f64x2.extract_lane $push2=, $pop1, 0785; SIMD128-NEXT: return $pop2786 %res = tail call fast double @llvm.vector.reduce.fmax.v2f64(<2 x double> %arg)787 ret double%res788}789 790define float @pairwise_max_v4f32(<4 x float> %arg) {791; SIMD128-LABEL: pairwise_max_v4f32:792; SIMD128: .functype pairwise_max_v4f32 (v128) -> (f32)793; SIMD128-NEXT: # %bb.0:794; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 0795; SIMD128-NEXT: f32x4.extract_lane $push2=, $0, 1796; SIMD128-NEXT: call $push4=, fmaxf, $pop3, $pop2797; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 2798; SIMD128-NEXT: call $push5=, fmaxf, $pop4, $pop1799; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 3800; SIMD128-NEXT: call $push6=, fmaxf, $pop5, $pop0801; SIMD128-NEXT: return $pop6802 %res = tail call float @llvm.vector.reduce.fmax.v4f32(<4 x float> %arg)803 ret float %res804}805 806define float @pairwise_max_v4f32_fast(<4 x float> %arg) {807; SIMD128-LABEL: pairwise_max_v4f32_fast:808; SIMD128: .functype pairwise_max_v4f32_fast (v128) -> (f32)809; SIMD128-NEXT: # %bb.0:810; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3811; SIMD128-NEXT: f32x4.pmax $push5=, $0, $pop0812; SIMD128-NEXT: local.tee $push4=, $0=, $pop5813; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3814; SIMD128-NEXT: f32x4.pmax $push2=, $pop4, $pop1815; SIMD128-NEXT: f32x4.extract_lane $push3=, $pop2, 0816; SIMD128-NEXT: return $pop3817 %res = tail call fast float @llvm.vector.reduce.fmax.v4f32(<4 x float> %arg)818 ret float %res819}820 821define float @pairwise_max_v4f32_reassoc(<4 x float> %arg) {822; SIMD128-LABEL: pairwise_max_v4f32_reassoc:823; SIMD128: .functype pairwise_max_v4f32_reassoc (v128) -> (f32)824; SIMD128-NEXT: # %bb.0:825; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 0826; SIMD128-NEXT: f32x4.extract_lane $push2=, $0, 1827; SIMD128-NEXT: call $push4=, fmaxf, $pop3, $pop2828; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 2829; SIMD128-NEXT: call $push5=, fmaxf, $pop4, $pop1830; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 3831; SIMD128-NEXT: call $push6=, fmaxf, $pop5, $pop0832; SIMD128-NEXT: return $pop6833 %res = tail call reassoc float @llvm.vector.reduce.fmax.v4f32(<4 x float> %arg)834 ret float %res835}836 837define double @pairwise_min_v2f64(<2 x double> %arg) {838; SIMD128-LABEL: pairwise_min_v2f64:839; SIMD128: .functype pairwise_min_v2f64 (v128) -> (f64)840; SIMD128-NEXT: # %bb.0:841; SIMD128-NEXT: f64x2.extract_lane $push1=, $0, 0842; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1843; SIMD128-NEXT: call $push2=, fmin, $pop1, $pop0844; SIMD128-NEXT: return $pop2845 %res = tail call double @llvm.vector.reduce.fmin.v2f64(<2 x double> %arg)846 ret double%res847}848 849define double @pairwise_min_v2f64_fast(<2 x double> %arg) {850; SIMD128-LABEL: pairwise_min_v2f64_fast:851; SIMD128: .functype pairwise_min_v2f64_fast (v128) -> (f64)852; SIMD128-NEXT: # %bb.0:853; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7854; SIMD128-NEXT: f64x2.pmin $push1=, $0, $pop0855; SIMD128-NEXT: f64x2.extract_lane $push2=, $pop1, 0856; SIMD128-NEXT: return $pop2857 %res = tail call fast double @llvm.vector.reduce.fmin.v2f64(<2 x double> %arg)858 ret double%res859}860 861define float @pairwise_min_v4f32(<4 x float> %arg) {862; SIMD128-LABEL: pairwise_min_v4f32:863; SIMD128: .functype pairwise_min_v4f32 (v128) -> (f32)864; SIMD128-NEXT: # %bb.0:865; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 0866; SIMD128-NEXT: f32x4.extract_lane $push2=, $0, 1867; SIMD128-NEXT: call $push4=, fminf, $pop3, $pop2868; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 2869; SIMD128-NEXT: call $push5=, fminf, $pop4, $pop1870; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 3871; SIMD128-NEXT: call $push6=, fminf, $pop5, $pop0872; SIMD128-NEXT: return $pop6873 %res = tail call float @llvm.vector.reduce.fmin.v4f32(<4 x float> %arg)874 ret float %res875}876 877define float @pairwise_min_v4f32_fast(<4 x float> %arg) {878; SIMD128-LABEL: pairwise_min_v4f32_fast:879; SIMD128: .functype pairwise_min_v4f32_fast (v128) -> (f32)880; SIMD128-NEXT: # %bb.0:881; SIMD128-NEXT: i8x16.shuffle $push0=, $0, $0, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 1, 2, 3882; SIMD128-NEXT: f32x4.pmin $push5=, $0, $pop0883; SIMD128-NEXT: local.tee $push4=, $0=, $pop5884; SIMD128-NEXT: i8x16.shuffle $push1=, $0, $0, 4, 5, 6, 7, 0, 1, 2, 3, 0, 1, 2, 3, 0, 1, 2, 3885; SIMD128-NEXT: f32x4.pmin $push2=, $pop4, $pop1886; SIMD128-NEXT: f32x4.extract_lane $push3=, $pop2, 0887; SIMD128-NEXT: return $pop3888 %res = tail call fast float @llvm.vector.reduce.fmin.v4f32(<4 x float> %arg)889 ret float %res890}891 892define float @pairwise_min_v4f32_reassoc(<4 x float> %arg) {893; SIMD128-LABEL: pairwise_min_v4f32_reassoc:894; SIMD128: .functype pairwise_min_v4f32_reassoc (v128) -> (f32)895; SIMD128-NEXT: # %bb.0:896; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 0897; SIMD128-NEXT: f32x4.extract_lane $push2=, $0, 1898; SIMD128-NEXT: call $push4=, fminf, $pop3, $pop2899; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 2900; SIMD128-NEXT: call $push5=, fminf, $pop4, $pop1901; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 3902; SIMD128-NEXT: call $push6=, fminf, $pop5, $pop0903; SIMD128-NEXT: return $pop6904 %res = tail call reassoc float @llvm.vector.reduce.fmin.v4f32(<4 x float> %arg)905 ret float %res906}907 908define double @pairwise_maximum_v2f64(<2 x double> %arg) {909; SIMD128-LABEL: pairwise_maximum_v2f64:910; SIMD128: .functype pairwise_maximum_v2f64 (v128) -> (f64)911; SIMD128-NEXT: # %bb.0:912; SIMD128-NEXT: f64x2.extract_lane $push1=, $0, 0913; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1914; SIMD128-NEXT: f64.max $push2=, $pop1, $pop0915; SIMD128-NEXT: return $pop2916 %res = tail call double @llvm.vector.reduce.fmaximum.v2f64(<2 x double> %arg)917 ret double%res918}919 920define double @pairwise_maximum_v2f64_fast(<2 x double> %arg) {921; SIMD128-LABEL: pairwise_maximum_v2f64_fast:922; SIMD128: .functype pairwise_maximum_v2f64_fast (v128) -> (f64)923; SIMD128-NEXT: # %bb.0:924; SIMD128-NEXT: f64x2.extract_lane $push1=, $0, 0925; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1926; SIMD128-NEXT: f64.max $push2=, $pop1, $pop0927; SIMD128-NEXT: return $pop2928 %res = tail call fast double @llvm.vector.reduce.fmaximum.v2f64(<2 x double> %arg)929 ret double%res930}931 932define float @pairwise_maximum_v4f32(<4 x float> %arg) {933; SIMD128-LABEL: pairwise_maximum_v4f32:934; SIMD128: .functype pairwise_maximum_v4f32 (v128) -> (f32)935; SIMD128-NEXT: # %bb.0:936; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 0937; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 1938; SIMD128-NEXT: f32.max $push2=, $pop1, $pop0939; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 2940; SIMD128-NEXT: f32.max $push4=, $pop2, $pop3941; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 3942; SIMD128-NEXT: f32.max $push6=, $pop4, $pop5943; SIMD128-NEXT: return $pop6944 %res = tail call float @llvm.vector.reduce.fmaximum.v4f32(<4 x float> %arg)945 ret float %res946}947 948define float @pairwise_maximum_v4f32_fast(<4 x float> %arg) {949; SIMD128-LABEL: pairwise_maximum_v4f32_fast:950; SIMD128: .functype pairwise_maximum_v4f32_fast (v128) -> (f32)951; SIMD128-NEXT: # %bb.0:952; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 0953; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 1954; SIMD128-NEXT: f32.max $push2=, $pop1, $pop0955; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 2956; SIMD128-NEXT: f32.max $push4=, $pop2, $pop3957; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 3958; SIMD128-NEXT: f32.max $push6=, $pop4, $pop5959; SIMD128-NEXT: return $pop6960 %res = tail call fast float @llvm.vector.reduce.fmaximum.v4f32(<4 x float> %arg)961 ret float %res962}963 964define float @pairwise_maximum_v4f32_reassoc(<4 x float> %arg) {965; SIMD128-LABEL: pairwise_maximum_v4f32_reassoc:966; SIMD128: .functype pairwise_maximum_v4f32_reassoc (v128) -> (f32)967; SIMD128-NEXT: # %bb.0:968; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 0969; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 1970; SIMD128-NEXT: f32.max $push2=, $pop1, $pop0971; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 2972; SIMD128-NEXT: f32.max $push4=, $pop2, $pop3973; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 3974; SIMD128-NEXT: f32.max $push6=, $pop4, $pop5975; SIMD128-NEXT: return $pop6976 %res = tail call reassoc float @llvm.vector.reduce.fmaximum.v4f32(<4 x float> %arg)977 ret float %res978}979 980define double @pairwise_minimum_v2f64(<2 x double> %arg) {981; SIMD128-LABEL: pairwise_minimum_v2f64:982; SIMD128: .functype pairwise_minimum_v2f64 (v128) -> (f64)983; SIMD128-NEXT: # %bb.0:984; SIMD128-NEXT: f64x2.extract_lane $push1=, $0, 0985; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1986; SIMD128-NEXT: f64.min $push2=, $pop1, $pop0987; SIMD128-NEXT: return $pop2988 %res = tail call double @llvm.vector.reduce.fminimum.v2f64(<2 x double> %arg)989 ret double%res990}991 992define double @pairwise_minimum_v2f64_fast(<2 x double> %arg) {993; SIMD128-LABEL: pairwise_minimum_v2f64_fast:994; SIMD128: .functype pairwise_minimum_v2f64_fast (v128) -> (f64)995; SIMD128-NEXT: # %bb.0:996; SIMD128-NEXT: f64x2.extract_lane $push1=, $0, 0997; SIMD128-NEXT: f64x2.extract_lane $push0=, $0, 1998; SIMD128-NEXT: f64.min $push2=, $pop1, $pop0999; SIMD128-NEXT: return $pop21000 %res = tail call fast double @llvm.vector.reduce.fminimum.v2f64(<2 x double> %arg)1001 ret double%res1002}1003 1004define float @pairwise_minimum_v4f32(<4 x float> %arg) {1005; SIMD128-LABEL: pairwise_minimum_v4f32:1006; SIMD128: .functype pairwise_minimum_v4f32 (v128) -> (f32)1007; SIMD128-NEXT: # %bb.0:1008; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 01009; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 11010; SIMD128-NEXT: f32.min $push2=, $pop1, $pop01011; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 21012; SIMD128-NEXT: f32.min $push4=, $pop2, $pop31013; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 31014; SIMD128-NEXT: f32.min $push6=, $pop4, $pop51015; SIMD128-NEXT: return $pop61016 %res = tail call float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %arg)1017 ret float %res1018}1019 1020define float @pairwise_minimum_v4f32_fast(<4 x float> %arg) {1021; SIMD128-LABEL: pairwise_minimum_v4f32_fast:1022; SIMD128: .functype pairwise_minimum_v4f32_fast (v128) -> (f32)1023; SIMD128-NEXT: # %bb.0:1024; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 01025; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 11026; SIMD128-NEXT: f32.min $push2=, $pop1, $pop01027; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 21028; SIMD128-NEXT: f32.min $push4=, $pop2, $pop31029; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 31030; SIMD128-NEXT: f32.min $push6=, $pop4, $pop51031; SIMD128-NEXT: return $pop61032 %res = tail call fast float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %arg)1033 ret float %res1034}1035 1036define float @pairwise_minimum_v4f32_reassoc(<4 x float> %arg) {1037; SIMD128-LABEL: pairwise_minimum_v4f32_reassoc:1038; SIMD128: .functype pairwise_minimum_v4f32_reassoc (v128) -> (f32)1039; SIMD128-NEXT: # %bb.0:1040; SIMD128-NEXT: f32x4.extract_lane $push1=, $0, 01041; SIMD128-NEXT: f32x4.extract_lane $push0=, $0, 11042; SIMD128-NEXT: f32.min $push2=, $pop1, $pop01043; SIMD128-NEXT: f32x4.extract_lane $push3=, $0, 21044; SIMD128-NEXT: f32.min $push4=, $pop2, $pop31045; SIMD128-NEXT: f32x4.extract_lane $push5=, $0, 31046; SIMD128-NEXT: f32.min $push6=, $pop4, $pop51047; SIMD128-NEXT: return $pop61048 %res = tail call reassoc float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %arg)1049 ret float %res1050}1051