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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s3 4define void @handle_vector_size_attribute() nounwind {5; CHECK-LABEL: handle_vector_size_attribute:6; CHECK: # %bb.0: # %entry7; CHECK-NEXT: movl 0, %eax8; CHECK-NEXT: decl %eax9; CHECK-NEXT: cmpl $1, %eax10; CHECK-NEXT: ja .LBB0_211; CHECK-NEXT: # %bb.1: # %bb7712; CHECK-NEXT: movzbl 0, %eax13; CHECK-NEXT: movzbl 0, %eax14; CHECK-NEXT: xorl %eax, %eax15; CHECK-NEXT: testb %al, %al16; CHECK-NEXT: .LBB0_2: # %bb8417; CHECK-NEXT: retq18entry:19 %tmp69 = load i32, ptr null ; <i32> [#uses=1]20 switch i32 %tmp69, label %bb84 [21 i32 2, label %bb7722 i32 1, label %bb7723 ]24 25bb77: ; preds = %entry, %entry26 %tmp99 = udiv i64 0, 0 ; <i64> [#uses=1]27 %tmp = load volatile i8, ptr null ; <i8> [#uses=1]28 %tmp114 = icmp eq i64 0, 0 ; <i1> [#uses=1]29 br label %cond_true11530 31bb84: ; preds = %entry32 ret void33 34cond_true115: ; preds = %bb7735 %tmp118 = load volatile i8, ptr null ; <i8> [#uses=1]36 br label %cond_true12037 38cond_true120: ; preds = %cond_true11539 %tmp127 = udiv i8 %tmp, %tmp118 ; <i8> [#uses=1]40 %tmp127.upgrd.1 = zext i8 %tmp127 to i64 ; <i64> [#uses=1]41 br label %cond_next12942 43cond_next129: ; preds = %cond_true120, %cond_true11544 %iftmp.30.0 = phi i64 [ %tmp127.upgrd.1, %cond_true120 ] ; <i64> [#uses=1]45 %tmp132 = icmp eq i64 %iftmp.30.0, %tmp99 ; <i1> [#uses=1]46 br i1 %tmp132, label %cond_false148, label %cond_next13647 48cond_next136: ; preds = %cond_next129, %bb7749 ret void50 51cond_false148: ; preds = %cond_next12952 ret void53}54